VNB14N04 - VNK14N04FM VNV14N04 "OMNIFET" fully autoprotected Power MOSFET Features Type Vclamp RDS(on) Ilim VNB14N04 VNK14N04FM VNV14N04 42 V 42 V 42 V 0.07 Ω 0.07 Ω 0.07 Ω 14 A 14 A 14 A ■ Linear current limitation ■ Thermal shutdown ■ Short circuit protection ■ Integrated clamp ■ Low current drawn from input pin ■ Diagnostic feedback through input pin ■ ESD protection ■ Direct access to the gate of the power MOSFET (analog driving) ■ Compatible with standard power MOSFET Description The VNB14N04, VNK14N04FM and VNV14N04 are monolithic devices made using STMicroeletronics VIPower M0 Technology, intended for replacement of standard power MOSFETS in DC to 50 kHz applications. Built-in thermal shutdown, linear current limitation and overvoltage clamp protect the chip in harsh environment. Fault feedback can be detected by monitoring the voltage at the input pin. Table 1. Device summary Part number VNB14N04 Order code VNB14N04, VNB14N04-E, VNB14N0413TR, VNB14N04TR-E VNK14N04FM VNK14N04FM VNV14N04 April 2009 Rev 6 VNV14N04, VNV14N04-E 1/17 www.st.com 17 Contents VNB14N04 - VNK14N04FM - VNV14N04 Contents 1 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2 Electrical specification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 2.1 Absolute maximum rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 2.2 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 2.3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 3 Protection features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 4 Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 5 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 2/17 VNB14N04 - VNK14N04FM - VNV14N04 1 Block diagram Block diagram Figure 1. Block diagram 1. PowerSO-10 pin configuration : INPUT = 6,7,8,9,10; SOURCE = 1,2,4,5; DRAIN = TAB 3/17 Electrical specification VNB14N04 - VNK14N04FM - VNV14N04 2 Electrical specification 2.1 Absolute maximum rating Table 2. Absolute maximum rating Value Symbol Parameter Unit PowerSO-10 SOT-82FM D2PAK VDS Drain-source voltage (Vin = 0) Internally clamped V Vin Input voltage 18 V ID Drain current Internally limited A IR Reverse DC output current -14 A 2000 V Vesd Electrostatic discharge (C = 100 pF, R=1.5 KΩ) Ptot Total dissipation at Tc = 25 °C W Operating junction temperature Internally limited °C Tc Case operating temperature Internally limited °C -55 to 150 °C Storage temperature Thermal data Table 3. Thermal data Symbol 2.3 9.5 Tj Tstg 2.2 50 Parameter PowerSO-10 SOT82-FM D2PAK Unit Rthj-case Thermal resistance junction-case max 2.5 13 2.5 °C/W Rthj-amb Thermal resistance junction-ambient max 50 100 62.5 °C/W Electrical characteristics Tcase =25 °C unless otherwise specified. Table 4. Symbol Electrical characteristics Parameter Test conditions Min. Typ. Max. Unit Off VCLAMP Drain-source clamp voltage ID = 200 mA Vin = 0 36 VCLTH Drain-source clamp threshold voltage ID = 2 mA Vin = 0 35 VINCL Input-source reverse clamp voltage Iin = -1 mA -1 4/17 42 48 V V -0.3 V VNB14N04 - VNK14N04FM - VNV14N04 Table 4. Electrical specification Electrical characteristics (continued) Symbol Parameter Test conditions Min. Typ. Max. Unit IDSS Zero input voltage drain current (Vin = 0) VDS = 13 V Vin = 0 VDS = 25 V Vin = 0 IISS Supply current from input pin VDS = 0 V Vin = 10 V VIN(th) Input threshold voltage VDS = Vin ID + Iin = 1 mA RDS(on) Static drain-source on resistance Vin = 10 V ID = 7 A Vin = 5 V ID = 7 A gfs (1) Forward transconductance VDS = 13 V ID = 7 A Coss Output capacitance VDS = 13 V f = 1 MHz Vin = 0 400 500 pF 250 50 200 µA µA 500 µA 3 V 0.7 0.1 Ω Ω On(1) 0.8 Dynamic 8 10 S Switching(2) td(on) tr td(off) tf Turn-on delay time Rise time Turn-off delay time Fall time VDD = 15 V Id = 7 A Vgen = 10 V Rgen = 10 Ω (see Figure 26) 60 160 250 100 120 300 400 200 ns ns ns ns td(on) tr td(off) tf Turn-on delay time Rise time Turn-off delay time Fall time VDD = 15 V Id = 7 A Vgen = 10 V Rgen = 1000 Ω (see Figure 26) 300 1.5 5.5 1.8 500 2.2 7.5 2.5 ns µs µs µs (di/dt)on Turn-on current slope Qi Total input charge VDD = 15 V ID = 7 A Vin = 10 V Rgen = 10 Ω 120 A/µs VDD = 12 V ID = 7 A Vin = 10 V 30 nC Source drain diode VSD (1) (2) trr Qrr (2) IRRM (2) Forward on voltage ISD = 7 A Vin = 0 Reverse recovery time Reverse recovery charge Reverse recovery current ISD = 7 A di/dt = 100 A/µs VDD = 30 V Tj = 25 °C (see test circuit, Figure 28) 1.6 110 0.34 6.1 V ns µC A Protection Drain current limit Vin = 10 V VDS = 13 V Vin = 5 V VDS = 13 V tdlim (2) Step response Current limit Vin = 10 V Vin = 5 V Tjsh (2) Overtemperature shutdown 150 °C Tjrs (2) Overtemperature reset 135 °C Ilim 10 10 14 14 20 20 A A 30 80 60 150 µs µs 5/17 Electrical specification Table 4. Symbol Igf (2) Eas (2) Electrical characteristics (continued) Parameter Test conditions Min. Typ. Max. Unit Fault sink current Vin = 10 V VDS = 13 V Vin = 5 V VDS = 13 V Single pulse avalanche energy starting Tj = 25°C V DD = 20 V 0.65 Vin = 10 V Rgen = 1 KΩ L = 10 mH 1. Pulsed: Pulse duration = 300 µs, duty cycle 1.5 % 2. Parameters guaranteed by design/characterization 6/17 VNB14N04 - VNK14N04FM - VNV14N04 50 20 mA mA J VNB14N04 - VNK14N04FM - VNV14N04 3 Protection features Protection features During normal operation, the Input pin is electrically connected to the gate of the internal power MOSFET. The device then behaves like a standard power MOSFET and can be used as a switch from DC to 50 kHz. The only difference from the user’s standpoint is that a small DC current (Iiss) flows into the Input pin in order to supply the internal circuitry. The device integrates: ● Overvoltage clamp protection: internally set at 42 V, along with the rugged avalanche characteristics of the Power MOSFET stage give this device unrivalled ruggedness and energy handling capability. This feature is mainly important when driving inductive loads. ● Linear current limiter circuit: limits the drain current Id to Ilim whatever the Input pin voltage. When the current limiter is active, the device operates in the linear region, so power dissipation may exceed the capability of the heatsink. Both case and junction temperatures increase, and if this phase lasts long enough, junction temperature may reach the overtemperature threshold Tjsh. ● Overtemperature and short circuit protection: these are based on sensing the chip temperature and are not dependent on the input voltage. The location of the sensing element on the chip in the power stage area ensures fast, accurate detection of the junction temperature. Overtemperature cutout occurs at minimum 150 °C. The device is automatically restarted when the chip temperature falls below 135 °C. ● Status feedback: in the case of an overtemperature fault condition, a Status Feedback is provided through the Input pin. The internal protection circuit disconnects the input from the gate and connects it instead to ground via an equivalent resistance of 100 Ω. The failure can be detected by monitoring the voltage at the Input pin, which will be close to ground potential. Additional features of this device are ESD protection according to the Human Body model and the ability to be driven from a TTL Logic circuit (with a small increase in RDS(on)). 7/17 Protection features VNB14N04 - VNK14N04FM - VNV14N04 Figure 2. Thermal impedance for D2PAK/PowerSO-10 Figure 3. Derating curve Figure 4. Output characteristics Figure 5. Transconductance Figure 6. Static drain-source on resistance vs input voltage Figure 7. Static drain-source on resistance (part 1/2) 8/17 VNB14N04 - VNK14N04FM - VNV14N04 Figure 8. Static drain-source on resistance (part 2/2) Protection features Figure 9. Input charge vs input voltage Figure 10. Capacitance variations Figure 11. Normalized input threshold voltage vs temperature Figure 12. Normalized on resistance vs temperature (part 1/2) Figure 13. Normalized on resistance vs temperature (part 2/2) 9/17 Protection features Figure 14. Turn-on current slope(part 1/2) VNB14N04 - VNK14N04FM - VNV14N04 Figure 15. Turn-on current slope (part 2/2) Figure 16. Turn-off drain-source voltage slope Figure 17. Turn-off drain-source voltage slope (part 1/2) (part 2/2) Figure 18. Switching time resistive load (part 1/3) 10/17 Figure 19. Switching time resistive load (part 2/3) VNB14N04 - VNK14N04FM - VNV14N04 Protection features Figure 20. Switching time resistive load (part 3/3) Figure 21. Current limit vs junction temperature Figure 22. Step response current limit Figure 23. Source drain diode forward characteristics 11/17 Protection features VNB14N04 - VNK14N04FM - VNV14N04 Figure 24. Unclamped inductive load test circuits Figure 25. Unclamped inductive waveforms Figure 26. Switching times test circuits for resistive load Figure 27. Input charge test circuit Figure 28. Test circuit for inductive load Figure 29. Waveforms switching and diode recovery times 12/17 VNB14N04 - VNK14N04FM - VNV14N04 4 Package information Package information In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK® specifications, grade definitions and product status are available at: www.st.com. ECOPACK® is an ST trademark. Figure 30. TO-263 (D2PAK) mechanical data 13/17 Package information Figure 31. SOT82-FM mechanical data 14/17 VNB14N04 - VNK14N04FM - VNV14N04 VNB14N04 - VNK14N04FM - VNV14N04 Package information Figure 32. PowerSO-10 mechanical data 15/17 Revision history 5 VNB14N04 - VNK14N04FM - VNV14N04 Revision history Table 5. Document revision history Date Revision 20-Jan-1998 1 Initial release. 21-Jun-2004 5 Update. 6 Document reformatted. Added Table 1: Device summary on page 1. Updated Section 4: Package information on page 13 08-Apr-2009 16/17 Changes VNB14N04 - VNK14N04FM - VNV14N04 Please Read Carefully: Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST’s terms and conditions of sale. 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