STMICROELECTRONICS VNB49N04

VNP49N04FI
/ VNB49N04 / VNV49N04

“OMNIFET”:
FULLY AUTOPROTECTED POWER MOSFET
TYPE
VNP49N04FI
VNB49N04
VCLAMP
R DS(ON)
ILIM
42 V
20 mΩ
49 A
VNV49N04
n
n
n
n
n
n
n
n
n
ISOWATT220
LINEAR CURRENT LIMITATION
THERMAL SHUT DOWN
SHORT CIRCUIT PROTECTION
INTEGRATED CLAMP
LOW CURRENT DRAWN FROM INPUT PIN
DIAGNOSTIC FEEDBACK THROUGH INPUT
PIN
ESD PROTECTION
3
1
10
3
1
TO-263 (D2PAK)
1
PowerSO-10TM
ORDER CODES:
DIRECT ACCESS TO THE GATE OF THE
POWER MOSFET (ANALOG DRIVING)
COMPATIBLE WITH STANDARD POWER
MOSFET
ISOWATT220
PowerSO-10 TM
TO-263 (D2PAK)
DESCRIPTION
The VNP49N04FI, VNB49N04, VNV49N04 are
monolithic
devices
designed
in
STMicroelectronics VIPower M0 Technology,
intended for replacement of standard Power
2
VNP49N04FI
VNV49N04
VNB49N04
MOSFETS from DC up to 50KHz applications.
Built-in thermal shutdown, linear current limitation
and overvoltage clamp protect the chip in harsh
environments.
Fault feedback can be detected by monitoring the
voltage at the input pin.
BLOCK DIAGRAM
DRAIN
Overvoltage
Clamp
INPUT
Gate
Control
Linear
Current
Limiter
Over
Temperature
Status
SOURCE
October 1999
1/14
1
VNP49N04FI / VNB49N04 / VNV49N04
ABSOLUTE MAXIMUM RATING
Symbol
Parameter
VDS
VIN
ID
IR
VESD
P tot
Drain-source Voltage (VIN=0V)
Input Voltage
Drain Current
Reverse DC Output Current
Electrostatic Discharge (R=1.5KΩ, C=100pF)
Total Dissipation at Tc=25°C
Tj
Tc
Tstg
Operating Junction Temperature
Case Operating Temperature
Storage Temperature
Value
D2PAK
ISOWATT220
PowerSO-10TM
Internally Clamped
18
Internally Limited
-50
2000
125
125
40
5
4
3
2
1
6
7
8
9
10
SOURCE
SOURCE
N.C.
SOURCE
SOURCE
3
SOURCE
2
DRAIN
1
INPUT
11
DRAIN
PowerSO-10 TM
D2PAK
3
SOURCE
2
DRAIN
1
INPUT
ISOWATT220
2/14
1
V
V
A
A
V
W
°C
°C
°C
Internally limited
Internally limited
-55 to 150
CONNECTION DIAGRAM (TOP VIEW)
INPUT
INPUT
INPUT
INPUT
INPUT
Unit
VNP49N04FI / VNB49N04 / VNV49N04
THERMAL DATA
Symbol
Parameter
Rthj-case
R thj-amb
Thermal Resistance Junction-case}}}
Thermal Resistance Junction-ambient
MAX
MAX
PowerSO-10
1
50
Value
D2PAK
1
62.5
ISOWATT220
3.12
62.5
Unit
°C/W
°C/W
ELECTRICAL CHARACTERISTICS (-40°C < Tj < 125°C, unless otherwise specified)
OFF
Symbol
VCLAMP
VCLTH
V INCL
Parameter
Drain-source Clamp
Voltage
Drain-source Clamp
Threshold Voltage
Input-Source Reverse
Clamp Voltage
Test Condit ions
Min
Typ
Max
Unit
ID=200 mA; VIN=0
34
42
50
V
ID=2mA; VIN=0
33
IIN= -1mA
-1.2
V
-0.1
V
70
µA
220
µA
250
550
µA
Typ
Max
3
0.04
Unit
V
Ω
0.05
Ω
Max
Unit
V DS=13V; VIN=0V
V DS=25V; VIN=0V
IDSS
Zero Input Voltage Drain
Current (VIN=0V)
IISS
Supply Current from Input
V DS=0V; VIN=10V
Pin
ON (*)
Symbol
VIN(th)
Parameter
Input Threshold Voltage
R DS(on)
Static Drain-source On
Resistance
Test Condit ions
V DS=VIN; ID + IIN=1mA
V IN=10V; ID=25A
Min
0.8
V IN=5V; ID=25A
DYNAMIC
Symbol
gfs (*)
C OSS
Parameter
Forward
Transconductance
Output Capacitance
Test Condit ions
VDS =13V; ID=25A; Tc=25°C
Min
Typ
25
30
VDS =13V; f=1MHz; VIN=0V; Tc=25°C
S
1100
1500
pF
Typ
200
1300
800
300
1.3
3.8
12
6.1
Max
600
3600
2400
900
3.8
10.4
24
17
Unit
ns
ns
ns
ns
µs
µs
µs
µs
SWITCHING (**)
Symbol
td(on)
tr
td(off)
tf
td(on)
tr
td(off)
tf
Parameter
Turn-on Delay Time
Rise Time
Turn-off Delay Time
Fall Time
Turn-on Delay Time
Rise Time
Turn-off Delay Time
Fall Time
(di/dt) on
Turn-on Current Slope
Qi
Total Input Charge
Test Conditions
VDS =15V; ID=25A
Vgen=10V; Rgen=10 Ω
(see figure 3)
VDS =15V; ID=25A
Vgen=10V; Rgen=1000Ω
(see figure 3)
VDS =15V; ID=25A
VIN=10V; Rgen=10 Ω
VDS =15V; ID=25A; VIN=10V
Min
25
A/µs
100
nC
3/14
1
VNP49N04FI / VNB49N04 / VNV49N04
SOURCE DRAIN DIODE
Symbol
VSD (*)
trr (**)
Q rr (**)
IRRM (**)
Parameter
Forward On Voltage
Reverse Recovery Time
Reverse Recovery Charge
Test Conditions
I SD=25A; VIN=0V
I SD=25A; di/dt=100A/µs
Min
V DS=30V; Tj=25°C
Reverse Recovery Current (see test circuit, figure 5)
Typ
Max
1.8
250
910
Unit
V
ns
nC
7.5
A
PROTECTIONS
Symbol
ILIM
tdlim (**)
Tjsh (**)
Tjrs (**)
Igf (**)
Eas (**)
Parameter
Drain Current Limit
Step Response Current
Limit
Test Conditions
V IN=10V; VDS=13V
V IN=5V; VDS=13V
V IN=10V
2
Typ
49
Max
70
Unit
A
28
49
35
70
50
A
µs
90
150
µs
V IN=5V
Overtemperature
°C
150
Shutdown
Overtemperature Reset
V IN=10V; VDS=13V
50
°C
mA
V IN=5V; VDS=13V
Starting Tj=25°C; VDS=20V
20
mA
Single Pulse
Avalanche Energy
V IN=10V; Rgen=1KΩ; L=6mH
Fault Sink Current
135
(*) Pulsed: Pulse duration = 300µs, duty cycle 1.5%
(**) Parameters guaranteed by design/characterization
4/14
Min
28
4
J
VNP49N04FI / VNB49N04 / VNV49N04
PROTECTION FEATURES
During normal operation, the INPUT pin is
electrically connected to the gate of the internal
power MOSFET. The device then behaves like a
standard power MOSFET and can be used as a
switch from DC up to 50KHz. The only difference
from the user’s standpoint is that a small DC
current (IISS) flows into the INPUT pin in order to
supply the internal circuitry.
The device integrates:
- OVERVOLTAGE CLAMP PROTECTION:
internally set at 42V, along with the rugged
avalanche characteristics of the Power MOSFET
stage give this device unrivalled ruggedness and
energy handling capability. This feature is mainly
important when driving inductive loads.
- LINEAR CURRENT LIMITER CIRCUIT:
limits the drain current ID to ILIM whatever the
INPUT pin voltage. When the current limiter is
active, the device operates in the linear region, so
power dissipation may exceed the capability of the
heatsink. Both case and junction temperatures
increase, and if this phase lasts long enough,
junction
temperature
may
reach
the
overtemperature threshold T jsh.
- OVERTEMPERATURE AND SHORT CIRCUIT
PROTECTION:
these are based on sensing the chip temperature
and are not dependent on the input voltage. The
location of the sensing element on the chip in the
power stage area ensures fast, accurate detection
of the junction temperature. Overtemperature
cutout occurs at minimum 150°C. The device is
automatically restarted when the chip temperature
falls below 135°C.
- STATUS FEEDBACK:
in the case of an overtemperature fault condition, a
status feedback is provided through the INPUT
pin. The internal protection circuit disconnects the
input from the gate and connects it instead to
ground via an equivalent resistance of 100Ω. The
failure can be detected by monitoring the voltage
at the INPUT pin, which will be close to ground
potential. Additional features of this device are
ESD protection according to the Human Body
model and the ability to be driven from a TTL Logic
circuit (with a small increase in RDS(ON)).
5/14
1
VNP49N04FI / VNB49N04 / VNV49N04
Thermal Impedance for ISOWATT220
Thermal Impedance for D2PAK / PowerSO-10
Derating Curve
Output Characteristics
Transconductance
Static Drain-Source On Resistance vs Input
Voltage
6/14
1
VNP49N04FI / VNB49N04 / VNV49N04
Static Drain-Source On Resistance
Static Drain-Source On Resistance
Input Charge vs Input Voltage
Capacitance Variations
Normalized Input
Temperature
Threshold
Voltage
vs
Normalized On Resistance vs Temperature
7/14
1
VNP49N04FI / VNB49N04 / VNV49N04
Normalized On Resistance vs Temperature
Turn-on Current Slope
Turn-on Current Slope
Turn-off Drain-Source Voltage Slope
Turn-off Drain-Source Voltage Slope
Switching Time Resistive Load
8/14
1
VNP49N04FI / VNB49N04 / VNV49N04
Switching Time Resistive Load
Switching Time Resistive Load
Current Limit vs Junction Temperature
Step Response Current Limit
Source Drain Diode Forward Characteristics
9/14
1
VNP49N04FI / VNB49N04 / VNV49N04
Fig. 1: Unclamped Inductive Load Test Circuits
Fig. 2: Unclamped Inductive Waveforms
Fig. 3: Switching Time Test Circuits for Resistive
Load
Fig. 4: Input Charge Test Circuit
Fig. 5: Test Circuit for Inductive Load Switching
and Diode Recovery Times
Fig. 6: Waveforms
10/14
1
VNP49N04FI / VNB49N04 / VNV49N04
ISOWATT220 MECHANICAL DATA
mm.
DIM.
MIN.
inch
TYP
MAX.
MIN.
TYP.
MAX.
4.6
0.173
0.181
A
4.4
B
2.5
2.7
0.098
0.106
D
2.5
2.75
0.098
0.108
E
0.4
0.7
0.015
0.027
F
0.75
1
0.030
0.039
F1
1.15
1.7
0.045
0.067
F2
1.15
1.7
0.045
0.067
G
4.95
5.2
0.195
0.204
G1
2.4
2.7
0.094
0.106
H
10
10.4
0.393
0.409
30.6
1.126
L2
16
L3
0.630
28.6
1.204
9.8
10.6
0.385
0.417
L6
15.9
16.4
0.626
0.645
L7
9
9.3
0.354
0.366
3
3.2
0.118
0.126
B
D
A
E
L4
L3
L6
F
F1
L7
F2
H
G
G1
¯
1 2 3
L2
L4
11/14
1
VNP49N04FI / VNB49N04 / VNV49N04
TO-263 (D2PAK) MECHANICAL DATA
mm.
inch
DIM.
MIN.
TYP
MAX.
MIN.
TYP.
A
4.30
4.60
0.169
0.181
A1
2.49
2.69
0.098
0.106
B
0.70
0.93
0.027
0.036
B2
1.25
1.4
0.049
0.055
C
0.45
0.6
0.017
0.023
C2
1.21
1.36
0.047
0.053
D
8.95
9.35
0.352
0.368
E
10
10.28
0.393
0.404
G
4.88
5.28
0.192
0.208
L
15
15.85
0.590
0.625
L2
1.27
1.4
0.050
0.055
L3
1.4
1.75
0.055
0.068
D
C2
A2
A
C
DETAIL ”A”
DETAIL ”A”
A1
B2
E
B
G
L2
12/14
MAX.
L
L3
VNP49N04FI / VNB49N04 / VNV49N04
PowerSO-10 MECHANICAL DATA
mm.
DIM.
MIN.
inch
TYP
MAX.
MIN.
TYP.
MAX.
A
3.35
3.65
0.132
0.144
A1
0.00
0.10
0.000
0.004
B
0.40
0.60
0.016
0.024
c
0.35
0.55
0.013
0.022
D
9.40
9.60
0.370
0.378
D1
7.40
7.60
0.291
0.300
E
9.30
9.50
0.366
0.374
E1
7.20
7.40
0.283
0.291
E2
7.20
7.60
0.283
300
E3
6.10
6.35
0.240
0.250
E4
5.90
6.10
0.232
0.240
1.35
0.049
14.40
0.543
e
1.27
F
1.25
H
13.80
h
0.050
0.50
Q
0.567
0.002
1.70
α
0.053
0.067
0º
8º
B
0.10 A B
10
=
E4
=
=
=
E1
=
E3
=
E2
=
E
=
=
=
H
6
=
=
1
5
e
0.25
B
SEATING
PLANE
DETAIL ”A”
A
C
M
Q
D
h
= D1 =
=
=
SEATING
PLANE
A
F
A1
A1
L
DETAIL ”A”
α
13/14
1
VNP49N04FI / VNB49N04 / VNV49N04
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences
of use of such information nor for any infringement of patents or other rights of third parties which may results from its use. No license is
granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are
subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products
are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics.
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 1999 STMicroelectronics - Printed in ITALY- All Rights Reserved.
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