VNN7NV04P-E, VNS7NV04P-E OMNIFET II fully autoprotected Power MOSFET Features Type RDS(on) Ilim Vclamp VNN7NV04P-E VNS7NV04P-E 60 mΩ 6A 40 V ■ Linear current limitation ■ Thermal shutdown ■ Short circuit protection ■ Integrated clamp ■ Low current drawn from input pin ■ Diagnostic feedback through input pin ■ ESD protection ■ Direct access to the gate of the Power MOSFET (analog driving) ■ Compatible with standard Power MOSFET in compliance with the 2002/95/EC European Directive 2 2 1 3 SO-8 SOT-223 Description The VNN7NV04P-E, VNS7NV04P-E, are monolithic devices designed in STMicroelectronics VIPower™ M0-3 Technology, intended for replacement of standard Power MOSFETs from DC up to 50 kHz applications. Built in thermal shutdown, linear current limitation and overvoltage clamp protect the chip in harsh environments. Fault feedback can be detected by monitoring the voltage at the input pin. Table 1. Device summary Order codes Package July 2011 Tube Tape and reel SOT-223 - VNN7NV04PTR-E SO-8 VNS7NV04P-E VNS7NV04PTR-E Doc ID 15632 Rev 3 1/29 www.st.com 1 Contents VNN7NV04P-E, VNS7NV04P-E Contents 1 Block diagram and pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 2 Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 3 4 5 6 2/29 2.1 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 2.2 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 2.3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Protection features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 3.1 Electrical characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 3.2 SO-8 maximum demagnetization energy . . . . . . . . . . . . . . . . . . . . . . . . . 16 3.3 SOT-223 maximum demagnetization energy . . . . . . . . . . . . . . . . . . . . . . 17 Package and PCB thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 4.1 SO-8 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 4.2 SOT-223 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Package and packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 5.1 SOT-223 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 5.2 SO-8 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 5.3 SOT-223 packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 5.4 SO-8 packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 Doc ID 15632 Rev 3 VNN7NV04P-E, VNS7NV04P-E List of tables List of tables Table 1. Table 2. Table 3. Table 4. Table 5. Table 6. Table 7. Table 8. Table 9. Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 SO-8 thermal parameter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 SOT-223 thermal parameter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 SOT-223 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 SO-8 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 Doc ID 15632 Rev 3 3/29 List of figures VNN7NV04P-E, VNS7NV04P-E List of figures Figure 1. Figure 2. Figure 3. Figure 4. Figure 5. Figure 6. Figure 7. Figure 8. Figure 9. Figure 10. Figure 11. Figure 12. Figure 13. Figure 14. Figure 15. Figure 16. Figure 17. Figure 18. Figure 19. Figure 20. Figure 21. Figure 22. Figure 23. Figure 24. Figure 25. Figure 26. Figure 27. Figure 28. Figure 29. Figure 30. Figure 31. Figure 32. Figure 33. Figure 34. Figure 35. Figure 36. Figure 37. Figure 38. Figure 39. Figure 40. Figure 41. Figure 42. Figure 43. Figure 44. Figure 45. Figure 46. 4/29 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Configuration diagram (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Current and voltage conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Switching time test circuit for resistive load . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Test circuit for diode recovery times . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Unclamped inductive load test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Input charge test circuit. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Unclamped inductive waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Derating curve . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Transconductance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Static drain-source on resistance vs input voltage (part 1/2) . . . . . . . . . . . . . . . . . . . . . . . 12 Static drain-source on resistance vs input voltage (part 2/2) . . . . . . . . . . . . . . . . . . . . . . . 12 Source-drain diode forward characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Static drain source on resistance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Turn-on current slope (part 1/2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Turn-on current slope (part 2/2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Transfer characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Static drain-source on resistance vs Id . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Input voltage vs input charge . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Turn-off drain source voltage slope (part 1/2). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Turn-off drain source voltage slope (part 2/2). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Capacitance variations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Output characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Normalized on resistance vs temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Switching time resistive load (part 1/2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Switching time resistive load (part 2/2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Normalized input threshold voltage vs temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Normalized current limit vs junction temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Step response current limit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 SO-8 maximum turn-off current versus load inductance. . . . . . . . . . . . . . . . . . . . . . . . . . . 16 SO-8 demagnetization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 SOT-223 maximum turn-off current versus load inductance . . . . . . . . . . . . . . . . . . . . . . . 17 SOT-223 demagnetization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 SO-8 PC board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Rthj-amb vs PCB copper area in open box free air condition . . . . . . . . . . . . . . . . . . . . . . . 18 SO-8 thermal impedance junction ambient single pulse. . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Thermal fitting model of an OMNIFET II in SO-8 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 SOT-223 PC board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Rthj-amb vs PCB copper area in open box free air condition . . . . . . . . . . . . . . . . . . . . . . . 20 SOT-223 thermal impedance junction ambient single pulse. . . . . . . . . . . . . . . . . . . . . . . . 21 Thermal fitting model of an OMNIFET II in SOT-223 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 SOT-223 package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 SO-8 package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 SOT-223 tape and reel shipment (suffix “TR”) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 SO-8 tube shipment (no suffix) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 SO-8 tape and reel shipment (suffix “TR”) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 Doc ID 15632 Rev 3 VNN7NV04P-E, VNS7NV04P-E 1 Block diagram and pin description Block diagram and pin description Figure 1. Block diagram DRAIN 2 Overvoltage Clamp INPUT 1 Gate Control Linear Current Limiter Over Temperature 3 SOURCE Figure 2. FC01000 Configuration diagram (top view) SO-8 Package(1) SOURCE 1 8 DRAIN SOURCE INPUT DRAIN DRAIN SOURCE 4 5 DRAIN 1. For the pins configuration related to SOT-223 see outlines at page 1. Doc ID 15632 Rev 3 5/29 Electrical specifications 2 VNN7NV04P-E, VNS7NV04P-E Electrical specifications Figure 3. Current and voltage conventions ID VDS DRAIN IIN RIN INPUT SOURCE VIN 2.1 Absolute maximum ratings Table 2. Absolute maximum ratings Value Symbol Parameter Unit SOT-223 VDS Drain-source voltage (VIN = 0 V) Internally clamped V VIN Input voltage Internally clamped V IIN Input current +/-20 mA 150 Ω Internally limited A RIN MIN Minimum input series impedance ID Drain current IR Reverse DC output current -10.5 A VESD1 Electrostatic discharge (R = 1.5 KΩ, C = 100 pF) 4000 V VESD2 Electrostatic discharge on output pin only (R = 330 Ω, C = 150 pF) 16500 V Total dissipation at Tc = 25 °C 7 EMAX Maximum switching energy (L = 0.7 mH; RL = 0 Ω; Vbat = 13.5 V; Tjstart = 150 °C; IL = 9 A) 40 EMAX Maximum switching energy (L = 0.6 mH; RL = 0 Ω; Vbat = 13.5 V; Tjstart = 150 °C; IL = 9 A) Ptot 4.6 W mJ 37 mJ Tj Operating junction temperature Internally limited °C Tc Case operating temperature Internally limited °C -55 to 150 °C Tstg 6/29 SO-8 Storage temperature Doc ID 15632 Rev 3 VNN7NV04P-E, VNS7NV04P-E 2.2 Electrical specifications Thermal data Table 3. Thermal data Value Symbol Parameter Unit SOT-223 Rthj-case Thermal resistance junction-case max Rthj-lead Thermal resistance junction-lead max Rthj-amb Thermal resistance junction-ambient max SO-8 18 °C/W 27 (1) °C/W (1) 96 90 °C/W 1. When mounted on a standard single-sided FR4 board with 0.5 mm2 of Cu (at least 35 µm thick) connected to all DRAIN pins. 2.3 Electrical characteristics -40 °C < Tj < 150 °C, unless otherwise specified. Table 4. Symbol Electrical characteristics Parameter Test conditions Min Typ Max Unit 45 55 V Off VCLAMP Drain-source clamp voltage VIN = 0 V; ID = 3.5 A 40 VCLTH Drain-source clamp threshold voltage VIN = 0 V; ID = 2 mA 36 VINTH Input threshold voltage VDS = VIN; ID = 1 mA 0.5 IISS Supply current from input VDS = 0 V; VIN = 5 V pin V 2.5 V 100 150 µA 6.8 8 V -0.3 V Input-source clamp voltage IIN = 1 mA 6 VINCL IIN = -1 mA -1.0 Zero input voltage drain current (VIN = 0 V) VDS = 13 V; VIN = 0 V; Tj = 25 °C 30 µA IDSS VDS = 25 V; VIN = 0 V 75 µA Static drain-source on resistance VIN = 5 V; ID = 3.5 A; Tj = 25 °C 65 mΩ VIN = 5 V; ID = 3.5 A 130 mΩ On RDS(on) Dynamic (Tj = 25 °C, unless otherwise specified) gfs(1) Forward transconductance VDD = 13 V; ID = 3.5 A COSS Output capacitance VDS = 13 V; f = 1 MHz; VIN = 0 V Doc ID 15632 Rev 3 9 S 220 pF 7/29 Electrical specifications Table 4. Symbol VNN7NV04P-E, VNS7NV04P-E Electrical characteristics (continued) Parameter Test conditions Min Typ Max Unit 100 300 ns 470 1500 ns 500 1500 ns 350 1000 ns 0.75 2.3 µs 4.6 14.0 µs 5.4 16.0 µs 3.6 11.0 µs Switching (Tj = 25 °C, unless otherwise specified) td(on) tr td(off) tf td(on) tr td(off) tf (dI/dt)on Qi Turn-on delay time Rise time Turn-off delay time VDD = 15 V; ID = 3.5 A; Vgen = 5 V; Rgen = RIN MIN = 150 Ω; (see figure Figure 4) Fall time Turn-on delay time Rise time Turn-off delay time VDD = 15 V; ID = 3.5 A; Vgen = 5 V; Rgen = 2.2 KΩ; (see figure Figure 4) Fall time Turn-on current slope VDD = 15 V; ID = 3.5 A; Vgen = 5 V; Rgen = RIN MIN = 150 Ω 6.5 A/µs Total input charge VDD = 12 V; ID = 3.5 A; VIN = 5 V; Igen = 2.13 mA (see figure Figure 7) 18 nC 0.8 V 220 ns 0.28 µC 2.5 A Source drain diode (Tj = 25 °C, unless otherwise specified) VSD(1) trr Qrr IRRM Forward on voltage ISD = 3.5 A; VIN = 0 V Reverse recovery time ISD = 3.5 A; dI/dt = 20 A/µs; Reverse recovery charge VDD = 30 V; L = 200 µH; Reverse recovery current (see test circuit, figure Figure 5) Protections (-40 °C < Tj < 150 °C, unless otherwise specified) Ilim Drain current limit VIN = 5 V; VDS = 13 V tdlim Step response current limit VIN = 5 V; VDS = 13 V Tjsh Overtemperature shutdown 150 Tjrs Overtemperature reset 135 Igf Fault sink current VIN = 5 V; VDS = 13 V; Tj = Tjsh Eas Single pulse avalanche energy starting Tj = 25 °C; VDD = 24 V; VIN = 5 V; Rgen = RIN MIN = 150 Ω; L = 24 mH; (see Figure 6 and Figure 8) 1. Pulsed: Pulse duration = 300 µs, duty cycle 1.5 % 8/29 Doc ID 15632 Rev 3 6 9 12 4.0 175 µs 200 °C °C 15 200 A mA mJ VNN7NV04P-E, VNS7NV04P-E 3 Protection features Protection features During normal operation, the input pin is electrically connected to the gate of the internal Power MOSFET through a low impedance path. The device then behaves like a standard Power MOSFET and can be used as a switch from DC up to 50 kHz. The only difference from the user’s standpoint is that a small DC current IISS (typ. 100µA) flows into the input pin in order to supply the internal circuitry. The device integrates: ● Overvoltage clamp protection: internally set at 45 V, along with the rugged avalanche characteristics of the Power MOSFET stage give this device unrivalled ruggedness and energy handling capability. This feature is mainly important when driving inductive loads. ● Linear current limiter circuit: limits the drain current ID to Ilim whatever the input pin voltages. When the current limiter is active, the device operates in the linear region, so power dissipation may exceed the capability of the heatsink. Both case and junction temperatures increase, and if this phase lasts long enough, junction temperature may reach the overtemperature threshold Tjsh. ● Overtemperature and short circuit protection: these are based on sensing the chip temperature and are not dependent on the input voltage. The location of the sensing element on the chip in the power stage area ensures fast, accurate detection of the junction temperature. Overtemperature cutout occurs in the range 150 to 190 °C, a typical value being 170 °C. The device is automatically restarted when the chip temperature falls of about 15 °C below shutdown temperature. ● Status feedback: in the case of an overtemperature fault condition (Tj > Tjsh), the device tries to sink a diagnostic current Igf through the input pin in order to indicate fault condition. If driven from a low impedance source, this current may be used in order to warn the control circuit of a device shutdown. If the drive impedance is high enough so that the input pin driver is not able to supply the current Igf, the input pin falls to 0 V. This however not affects the device operation: no requirement is put on the current capability of the input pin driver except to be able to supply the normal operation drive current IISS. Additional features of this device are ESD protection according to the Human Body model and the ability to be driven from a TTL logic circuit. Doc ID 15632 Rev 3 9/29 Protection features Figure 4. VNN7NV04P-E, VNS7NV04P-E Switching time test circuit for resistive load ID 90% tr tf 10% t td(on) Vgen td(off) t Figure 5. Test circuit for diode recovery times A A D I FAST DIODE OMNIFET S L=100uH B B 150Ω D Rgen VDD I Vgen OMNIFET S 8.5 Ω 10/29 Doc ID 15632 Rev 3 VNN7NV04P-E, VNS7NV04P-E Figure 6. Protection features Unclamped inductive load test circuits Figure 7. Input charge test circuit VIN RGEN VIN PW Figure 8. Unclamped inductive waveforms Doc ID 15632 Rev 3 11/29 Protection features VNN7NV04P-E, VNS7NV04P-E 3.1 Electrical characteristics curves Figure 9. Derating curve Figure 10. Transconductance Gfs (S) 20 18 Vds=13V 16 Tj=-40ºC Tj=25ºC 14 Tj=150ºC 12 10 8 6 4 2 0 0 1 2 3 4 5 6 7 8 Id(A) Figure 11. Static drain-source on resistance vs input voltage (part 1/2) Figure 12. Static drain-source on resistance vs input voltage (part 2/2) Rds(on) (mOhm) Rds(on) (mOhm) 140 120 110 120 Id=3.5A 100 90 Tj=150ºC 100 Tj=150ºC Id=6A Id=1A 80 80 70 60 Tj=25ºC 60 50 Tj=25ºC 40 Id=6A Id=1A Tj=-40ºC 40 30 Tj= - 40ºC 20 Id=6A Id=1A 20 10 0 0 3 3.5 4 4.5 5 5.5 6 6.5 7 3 3.5 4 4.5 Vin(V) 5 5.5 6 6.5 Vin(V) Figure 13. Source-drain diode forward characteristics Figure 14. Static drain source on resistance Vsd (mV) Rds(on) (mohms) 1000 150 950 Vin=0V 125 900 Vin=5V 850 100 Tj=150ºC 800 750 75 700 50 650 Tj=25ºC 600 Tj=-40ºC 25 550 500 0 0 2 4 6 8 10 12 14 Id(A) 12/29 0 1 2 3 Id(A) Doc ID 15632 Rev 3 4 5 6 VNN7NV04P-E, VNS7NV04P-E Protection features Figure 15. Turn-on current slope (part 1/2) Figure 16. Turn-on current slope (part 2/2) di/dt(A/us) di/dt(A/us) 2.25 8 2 7 Vin=3.5V Vdd=15V Id=3.5A 1.75 Vin=5V Vdd=15V Id=3.5A 6 1.5 5 1.25 4 1 3 0.75 2 0.5 1 0.25 0 100 200 300 400 600 500 700 800 900 1000 1100 200 100 300 400 500 Rg(ohm) 600 700 800 900 1000 1100 Rg(ohm) Figure 17. Transfer characteristics Figure 18. Static drain-source on resistance vs Id Idon(A) Rds(on) (mOhm) 10 140 Tj=25ºC 9 Tj=-40ºC Vds=13.5V 120 Tj=150ºC 8 Vin=3.5V 100 7 Tj=150ºC Vin=5V 6 80 5 60 4 Vin=3.5V Tj=25ºC 3 Vin=5V Vin=3.5V 40 Tj=-40ºC 2 Vin=5V 20 1 0 0 1 1.5 2 2.5 3 3.5 4 4.5 5 0 5.5 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 5.5 6 Id(A) Vin(V) Figure 19. Input voltage vs input charge Figure 20. Turn-off drain source voltage slope (part 1/2) dv/dt(V/us) Vin(V) 300 8 7 250 Vds=12V Id=3.5A 6 Vin=5V Vdd=15V Id=3.5A 200 5 150 4 100 3 2 50 1 0 100 0 0 5 10 15 20 200 300 400 500 600 700 800 900 1000 1100 25 Rg(ohm) Qg(nC) Doc ID 15632 Rev 3 13/29 Protection features VNN7NV04P-E, VNS7NV04P-E Figure 21. Turn-off drain source voltage slope Figure 22. Capacitance variations (part 2/2) C(pF) dv/dt(v/us) 600 300 250 500 f=1MHz Vin=0V Vin=3.5V Vdd=15V Id=3.5A 200 400 150 300 100 200 50 0 100 100 200 300 400 500 600 700 800 900 1000 1100 0 5 10 15 20 25 30 35 Vds(V) Rg(ohm) Figure 23. Output characteristics Figure 24. Normalized on resistance vs temperature v ID(A) Rds(on) 12 2.25 11 2 10 9 Vin=5V Vin=4.5V 8 Vin=4V Vin=5V Id=3.5A 1.75 7 1.5 Vin=3V 6 1.25 5 4 1 3 Vin=2.5V 2 0.75 1 Vin=2V 0 0.5 0 1 2 3 4 5 6 7 8 9 10 11 12 13 -50 -25 0 25 50 VDS(V) 75 100 125 150 175 T(ºC) Figure 25. Switching time resistive load (part 1/2) Figure 26. Switching time resistive load (part 2/2) t(us) t(ns) 5.5 1600 tr 5 Vdd=15V Id=3.5A Vin=5V 4.5 4 1400 tr Vdd=15V Id=3.5A Rg=150ohm td(off) 1200 tf 3.5 1000 3 800 2.5 2 600 1.5 td(off) 400 1 tf td(on) 0.5 200 0 td(on) 0 250 500 750 1000 1250 1500 1750 2000 2250 2500 0 3.25 Rg(ohm) 14/29 3.5 3.75 4 4.25 Vin(V) Doc ID 15632 Rev 3 4.5 4.75 5 5.25 VNN7NV04P-E, VNS7NV04P-E Protection features Figure 27. Normalized input threshold voltage Figure 28. Normalized current limit vs junction vs temperature temperature Vin(th) Ilim (A) 1.15 15 14 1.1 Vds=Vin Id=1mA 1.05 Vds=13V Vin=5V 13 12 1 11 0.95 10 0.9 9 0.85 8 0.8 7 0.75 6 5 0.7 -50 -25 0 25 50 75 100 125 150 175 -50 -25 0 25 50 75 100 125 150 175 Tj (ºC) T(ºC) Figure 29. Step response current limit Tdlim(us) 7 6.5 Vin=5V Rg=150ohm 6 5.5 5 4.5 4 3.5 5 10 15 20 25 30 35 Vdd(V) Doc ID 15632 Rev 3 15/29 Protection features 3.2 VNN7NV04P-E, VNS7NV04P-E SO-8 maximum demagnetization energy Figure 30. SO-8 maximum turn-off current versus load inductance ILMAX (A) 100 10 A B C 1 0.1 1 10 100 L(mH) Legend A = Single Pulse at TJstart = 150 °C B = Repetitive pulse at TJstart = 100 °C C = Repetitive Pulse at TJstart = 125 °C Conditions: VCC = 13.5 V Values are generated with RL = 0 Ω. In case of repetitive pulses, Tjstart (at beginning of each demagnetization) of every pulse must not exceed the temperature specified above for curves B and C. Figure 31. SO-8 demagnetization VIN, IL Demagnetization Demagnetization Demagnetization t 16/29 Doc ID 15632 Rev 3 VNN7NV04P-E, VNS7NV04P-E 3.3 Protection features SOT-223 maximum demagnetization energy Figure 32. SOT-223 maximum turn-off current versus load inductance ILMAX (A) 100 10 1 0.01 0.1 1 10 L(mH) Legend A = Single Pulse at TJstart = 150 °C B = Repetitive pulse at TJstart = 100 °C C = Repetitive Pulse at TJstart = 125 °C Conditions: VCC = 13.5 V Values are generated with RL = 0 Ω. In case of repetitive pulses, Tjstart (at beginning of each demagnetization) of every pulse must not exceed the temperature specified above for curves B and C. Figure 33. SOT-223 demagnetization VIN, IL Demagnetization Demagnetization Demagnetization t Doc ID 15632 Rev 3 17/29 Package and PCB thermal data VNN7NV04P-E, VNS7NV04P-E 4 Package and PCB thermal data 4.1 SO-8 thermal data Figure 34. SO-8 PC board Note: Layout condition of Rth and Zth measurements (PCB FR4 area = 58 mm x 58 mm, PCB thickness = 2 mm, Cu thickness = 35 µm, Copper areas: 0.14 cm2, 0.8 cm2, 2 cm2). Figure 35. Rthj-amb vs PCB copper area in open box free air condition RTHj_amb (ºC/W) SO-8 at 2 pins connected to TAB 110 105 100 95 90 85 80 75 70 0 0.5 1 1.5 PCB Cu heatsink area (cm^2) 18/29 Doc ID 15632 Rev 3 2 2.5 VNN7NV04P-E, VNS7NV04P-E Package and PCB thermal data Figure 36. SO-8 thermal impedance junction ambient single pulse ZT H (°C /W) 1000 100 10 1 0.1 0.0001 0.001 0.01 0.1 1 T ime (s) 10 100 1000 Figure 37. Thermal fitting model of an OMNIFET II in SO-8 Tj C1 C2 C3 C4 C5 C6 R1 R2 R3 R4 R5 R6 Pd T_amb Equation 1 Pulse calculation formula Z THδ = R TH ⋅ δ + Z THtp ( 1 – δ ) where δ = t p ⁄ T Table 5. SO-8 thermal parameter Area/island (cm2) Footprint R1 (°C/W) 0.2 R2 (°C/W) 0.9 R3 (°C/W) 3.5 R4 (°C/W) 21 R5 (°C/W) 16 R6 (°C/W) 58 C1 (W.s/°C) 3.00E-04 Doc ID 15632 Rev 3 2 28 19/29 Package and PCB thermal data Table 5. 4.2 VNN7NV04P-E, VNS7NV04P-E SO-8 thermal parameter (continued) Area/island (cm2) Footprint C2 (W.s/°C) 9.00E-04 C3 (W.s/°C) 7.50E-03 C4 (W.s/°C) 0.045 C5 (W.s/°C) 0.35 C6 (W.s/°C) 1.05 2 2 SOT-223 thermal data Figure 38. SOT-223 PC board Note: Layout condition of Rth and Zth measurements (PCB FR4 area = 58 mm x 58 mm, PCB thickness = 2 mm, Cu thickness = 35 µm, Copper areas: 0.11 cm2, 1 cm2, 2 cm2). Figure 39. Rthj-amb vs PCB copper area in open box free air condition RTH j-amb (°C/W) 140 130 120 110 100 90 80 70 60 0 0.5 1 1.5 Cu area (cm^2) 20/29 Doc ID 15632 Rev 3 2 2.5 VNN7NV04P-E, VNS7NV04P-E Package and PCB thermal data Figure 40. SOT-223 thermal impedance junction ambient single pulse ZT H (°C/W) 1000 100 10 1 0.1 0.0001 0.001 0.01 0.1 1 T ime (s) 10 100 1000 Figure 41. Thermal fitting model of an OMNIFET II in SOT-223 Tj C1 C2 C3 C4 C5 C6 R1 R2 R3 R4 R5 R6 Pd T_amb Equation 2 Pulse calculation formula Z THδ = R TH ⋅ δ + Z THtp ( 1 – δ ) where δ = t p ⁄ T Doc ID 15632 Rev 3 21/29 Package and PCB thermal data Table 6. 22/29 VNN7NV04P-E, VNS7NV04P-E SOT-223 thermal parameter Area/island (cm2) Footprint R1 (°C/W) 0.2 R2 (°C/W) 1.1 R3 (°C/W) 4.5 R4 (°C/W) 24 R5 (°C/W) 0.1 R6 (°C/W) 100 C1 (W.s/°C) 3.00E-04 C2 (W.s/°C) 9.00E-04 C3 (W.s/°C) 3.00E-02 C4 (W.s/°C) 0.16 C5 (W.s/°C) 1000 C6 (W.s/°C) 0.5 Doc ID 15632 Rev 3 2 45 2 VNN7NV04P-E, VNS7NV04P-E 5 Package and packing information Package and packing information In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK® specifications, grade definitions and product status are available at: www.st.com. ECOPACK® is an ST trademark. 5.1 SOT-223 mechanical data Table 7. SOT-223 mechanical data millimeters Symbol Min. Typ. Max. A 1.8 B 0.6 0.7 0.85 B1 2.9 3 3.15 c 0.24 0.26 0.35 D 6.3 6.5 6.7 e 2.3 e1 4.6 E 3.3 3.5 3.7 H 6.7 7 7.3 V A1 10 (max) 0.02 0.1 Figure 42. SOT-223 package dimensions 0046067 Doc ID 15632 Rev 3 23/29 Package and packing information 5.2 VNN7NV04P-E, VNS7NV04P-E SO-8 mechanical data Table 8. SO-8 mechanical data mm Dim. Min. Typ. A a1 1.75 0.1 0.25 a2 1.65 a3 0.65 0.85 b 0.35 0.48 b1 0.19 0.25 C 0.25 0.5 c1 45 (typ.) D 4.8 5 E 5.8 6.2 e 1.27 e3 3.81 F 3.8 4 L 0.4 1.27 M 0.6 S L1 24/29 Max. 8 (max.) 0.8 Doc ID 15632 Rev 3 1.2 VNN7NV04P-E, VNS7NV04P-E Package and packing information Figure 43. SO-8 package dimensions Doc ID 15632 Rev 3 25/29 Package and packing information 5.3 VNN7NV04P-E, VNS7NV04P-E SOT-223 packing information Figure 44. SOT-223 tape and reel shipment (suffix “TR”) REEL DIMENSIONS Base Q.ty Bulk Q.ty A (max) B (min) C (± 0.2) F G (+ 2 / -0) N (min) T (max) 1000 1000 330 1.5 13 20.2 12.4 60 18.4 TAPE DIMENSIONS According to Electronic Industries Association (EIA) Standard 481 rev. A, Feb. 1986 Tape width Tape Hole Spacing Component Spacing Hole Diameter Hole Diameter Hole Position Compartment Depth Hole Spacing W P0 (± 0.1) P D (± 0.1/-0) D1 (min) F (± 0.05) K (max) P1 (± 0.1) 12 4 8 1.5 1.5 5.5 4.5 2 All dimensions are in mm. End Start Top cover tape No components Components 500mm min Empty components pockets saled with cover tape. User direction of feed 26/29 Doc ID 15632 Rev 3 No components 500mm min VNN7NV04P-E, VNS7NV04P-E 5.4 Package and packing information SO-8 packing information Figure 45. SO-8 tube shipment (no suffix) B C Base Q.ty Bulk Q.ty Tube length (± 0.5) A B C (± 0.1) A 100 2000 532 3.2 6 0.6 Figure 46. SO-8 tape and reel shipment (suffix “TR”) REEL DIMENSIONS Base Q.ty Bulk Q.ty A (max) B (min) C (± 0.2) F G (+ 2 / -0) N (min) T (max) 2500 2500 330 1.5 13 20.2 12.4 60 18.4 All dimensions are in mm. TAPE DIMENSIONS According to Electronic Industries Association (EIA) Standard 481 rev. A, Feb 1986 Tape width Tape Hole Spacing Component Spacing Hole Diameter Hole Diameter Hole Position Compartment Depth Hole Spacing W P0 (± 0.1) P D (± 0.1/-0) D1 (min) F (± 0.05) K (max) P1 (± 0.1) All dimensions are in mm. 12 4 8 1.5 1.5 5.5 4.5 2 End Start Top No components Components No components cover tape 500mm min Empty components pockets saled with cover tape. 500mm min User direction of feed Doc ID 15632 Rev 3 27/29 Revision history 6 VNN7NV04P-E, VNS7NV04P-E Revision history Table 9. 28/29 Document revision history Date Revision Changes 15-Oct-2009 1 Initial release. 26-Oct-2009 2 Updated Figure 43: SO-8 package dimensions. Updated Table 8: SO-8 mechanical data. 05-Jul-2011 3 Table 4: Electrical characteristics: – RDS(on): updated maximum values – td(on), tr, td(off), tf: updated min, typ and max values Doc ID 15632 Rev 3 VNN7NV04P-E, VNS7NV04P-E Please Read Carefully: Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST’s terms and conditions of sale. Purchasers are solely responsible for the choice, selection and use of the ST products and services described herein, and ST assumes no liability whatsoever relating to the choice, selection or use of the ST products and services described herein. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted under this document. 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The ST logo is a registered trademark of STMicroelectronics. All other names are the property of their respective owners. © 2011 STMicroelectronics - All rights reserved STMicroelectronics group of companies Australia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan Malaysia - Malta - Morocco - Philippines - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States of America www.st.com Doc ID 15632 Rev 3 29/29