ZL40813/14/18 13.5GHz Fixed Modulus Dividers Data Sheet Features • • • • • July 2003 Very High Operating Speed Low Phase Noise (Typically better than -146dBc/Hz at 10kHz offset) 5V Single Supply Operation Low Power Dissipation: 500mW (Typ) Surface Mount Plastic Package with Exposed Pad (See Application Notes) Ordering Information ZL40813/DCE ZL40813/DCF ZL40814/DCE ZL40814/DCF ZL40818/DCE ZL40818/DCF Prescaler Modulus • • • -40°C to +85°C ZL40813 - Divide by 8 ZL40814 - Divide by 16 ZL40818 - Divide by 4 Description The ZL40813, 14 and 18 are 5V supply, very high speed low power prescalers for professional applications with a fixed modulus of 8, 16, or 4 respectively. The dividing elements are dynamic D type flip flops and allow operation from 10.5GHz to 13.5GHz with a sinewave input (Note these prescalers are not suitable for D.C. operation). The output stage has internal 50 ohm pull up giving a 1v p-p output. See application notes for more details. Applications • • • • • • (tubes) 8 pin SOIC (tape and reel) 8 pin SOIC (tubes) 8 pin SOIC (tape and reel) 8 pin SOIC (tubes) 8 pin SOIC (tape and reel) 8 pin SOIC 10.5 to 13.5GHz PLL applications LMDS Instrumentation Satellite Communications Fibre Optic Communications; OC48, OC192 Ultra Low Jitter Clock Systems VCC IN VCC OUT 1 8 50 Ohm OUTPUT 7 6 OUTPUT B Vref Div N 400 Ohm INPUT 2 INPUT B 3 20mA GND GND 5 4 Figure 1 - Functional Block Diagram 1 Zarlink Semiconductor Inc. Zarlink, ZL and the Zarlink Semiconductor logo are trademarks of Zarlink Semiconductor Inc. Copyright 2003, Zarlink Semiconductor Inc. All Rights Reserved. ZL40813/14/18 Data Sheet Vcc INPUT 1 8 Vcc OUTPUT INPUT 2 7 OUTPUT INPUT B 3 6 OUTPUT B 4 5 GND GND SOIC (N) E-Pad Figure 2 - Pin Connections - Top View 1.0 Application Configuration Figure 3 shows a recommended application configuration. This example shows the devices set up for single-ended input and differential output operation. R2:100 Ohm C8:10nF C3:100pF C4:100pF C5:100pF 1 8 2 7 3 6 4 5 C2:10nF C1:10uF C6:100pF C7:100pF R1:50 Ohm RL:50 Ohm Figure 3 - Recommended circuit configuration. The above circuit diagram shows some components in dotted lines. These are optional in many applications. 1. C1 (10 µF) and C2 (10 nF) power supply decoupling capacitors may be available on the board already. 2. R2 (100 Ohm) and C8 (10 nF) can be included if further power supply decoupling is required for the first stage biasing circuit. This may optimise the noise and jitter performance. The values are suggestions and may have to be modified if the existing supplies are particularly noisy. 3. R1 (50 Ohm), in series with C5 (100 pF), may reduce feedthrough of the input signal to the output. 2 Zarlink Semiconductor Inc. ZL40813/14/18 2.0 Data Sheet Evaluation Boards From Zarlink Semiconductor Zarlink Semiconductor provides prescaler evaluation boards. These are primarily for those interested in performing their own assessment of the operation of the prescalers. The boards are supplied unpopulated and may be assembled for single ended or differential input and output operation, type No. ZLE40008. Fully populated evaluation boards are also available, type No. ZLE40810. Once assembled, all that is required is an RF source and a DC supply for operation. The inputs and outputs are connected via side launch SMA connectors. Absolute Maximum Ratings Parameter Symbol Min 1 Supply voltage Vcc 2 Prescalar Input Voltage 2.5 3 ESD protection (Static Discharge) 2k 4 Storage Temperature 5 Maximum Junction Temp. 6 Thermal Characteristics -65 TST TJmax Max Units 6.5 V (vdd_IO+5%) Vp-p V +150 ºC +125 ºC 58.6 THJA ºC/W multi-layer PCB AC/DC Electrical Characteristics (Tamb = 25C, Vcc = 5V) † Characteristic Pin Min. Typ. Max. Units Conditions mA Input stage bias current‡ 130 mA ZL40813 Div8 96 134 mA ZL40814 Div16 100 134 mA ZL40818 Div4 Supply current 1 0.35 Supply current 8 58 93 Supply current 8 61 Supply current 8 61 † These characteristics are guaranteed by either production test or design. ‡ Pin 1 is the Vcc pin for the 1st stage bias current. In some applications e.g. if the power supply is noisy, it may be advantageous to add further supply decoupling to this pin (i.e. an additional R, C filter, see diagram of the recommended circuit configuration Figure 3,). 3 Zarlink Semiconductor Inc. ZL40813/14/18 Data Sheet Input and Output Characteristics † Characteristic Pin Input frequency 2,3 Input sensitivity 2,3 Input overload 2,3 Output voltage 6,7 Output power 6,7 Phase Noise (10kHz offset) 6,7 O/P Duty Cycle 6,7 Min. Typ. 45 Conditions GHz RMS sinewave‡ 2 dBm fin = 10.5GHz to 13.5Ghz 14 dBm fin = 10.5GHz to 13.5Ghz 1 Vp-p Differential Into 50ohm pullup resistors -1 dBm fin = 10.5GHz to 13.5GHz -140 dBc/Hz fin = 10GHz, pwr ip = 0dBm See graphs, Figure 7 to Figure 9 % Differential output -2 -6 Units 14.5 8.5 10 Max. 50 55 † These characteristics are guaranteed by either production test or design. † Input sensitivity and output power values assume 50 Ohm source and load impedances. ‡ The device characterisation test method incremented the amplitude over the entire range of frequency and ensures that there are no "holes" in the characteristic. For details of the test set-up, refer to the Application Note for RF Prescalers. ZL40814 Typical I nput Sensitivity (Sinewave Drive) @ +25DegC 20.00 10.00 Guaranteed Operating Window Vin i nto 50 Ohm(dBm) 0.00 -10.00 -20.00 -30.00 -40.00 8 9 10 11 12 13 14 Frequency (GHz) Figure 4 - Graph of Input Sensitivity @ +25 Deg C 4 Zarlink Semiconductor Inc. 15 16 ZL40813/14/18 Data Sheet Electrical Characteristics (Vcc = 5V ±5%, Tamb = -40 to +85C) The following characteristics are guaranteed by design and characterisation over the range of operating conditions unless otherwise stated: (Input Frequency range 9 to 13.5GHz rms Sinewave) Supply Current Table Characteristic Pin Min. Typ. Supply current 1 Supply current 8 51 93 Supply current 8 54 Supply current 8 54 Max. 0.35 Units Conditions mA Input stage bias current † 144 mA ZL40813 96 148 mA ZL40814 100 148 mA ZL40818 † Pin 1 is the Vcc pin for the 1st stage bias current. In some applications e.g. if the power supply is noisy, it may be advantageous to add further supply decoupling to this pin (i.e. an additional R, C filter, see diagram of the recommended circuit configuration, Figure 9). Input and Output Characteristics Table Input sensitivity and output power values assume 50 Ohm source and load impedances Characteristic Pin Min. Input sensitivity 2,3 Input sensitivity 2,3 Output voltage 6,7 Output power 6,7 -6 0 O/P Duty Cycle 6,7 45 50 Trise and Tfall 6,7 10 Typ. Max. Units -2 2 dBm fin = 10.5 to 12.5 GHz 14 dBm fin = 10.5 to 13.5 GHz 1 Vp-p Differential Into 50ohm pullup resistors 5 dBm Single-ended output, fin = 9GHz to 13GHz, pwr ip= -10dBm . See graphs, Figure 7 to Figure 9. 55 % 110 Conditions ps For details of the test set-up, refer to the Application Note for RF Prescalers. 5 Zarlink Semiconductor Inc. ZL40813/14/18 Data Sheet ZL40814 Typical Input Sensitivity (Sinewave Drive) @ -40 to +85 DegC 20.00 85 DegC Vin into 50 Ohm (dBm) 10.00 70 DegC 25 DegC Guaranteed Operating W indow 0.00 25C -40C 85C Max 70C -10.00 -20.00 -30.00 -40.00 8 9 10 11 12 13 14 15 16 Input Frequency (GHz) Figure 5 - Graph of Input Sensitivity @ -40, +25, +70 and +85 Deg C. Phase Noise vs Offset Freq in = 10GHz Pin = -1dBm, 5.25V, Temp = 25C Phase Noise in dBc/Hz -120 -125 -130 ZL40818 -135 ZL40813 -140 ZL40814 -145 -150 0.1 1 10 100 Offset Frequency in kHz Figure 6 - 13.5GHz Prescalers; Phase Noise vs Offset Frequency 6 Zarlink Semiconductor Inc. ZL40813/14/18 Data Sheet Phase Noise in dBc/Hz ZL40813 Phase Noise vs Offset Pin = -1dBm, 5.25V, Temp = 25C -120 -125 -130 10GHz -135 12GHz -140 -145 -150 0.1 1 10 100 Offset Frequency in kHz Figure 7 - ZL40813; Phase Noise vs Offset Frequency Phase Noise in dBc/Hz ZL40814 Phase Noise vs Offset Pin = -1dBm, 5.25V, Temp = 25C -120 -125 -130 13GHz -135 12GHz -140 10GHz -145 -150 0.1 1 10 100 Offset Frequency in kHz Figure 8 - ZL40814; Phase Noise vs Offset Frequency 7 Zarlink Semiconductor Inc. ZL40813/14/18 Data Sheet Phase Noise in dBc/Hz ZL40818 Phase Noise vs Offset Pin = -1dBm, 5.25V, Temp = 25C -120 -125 -130 10GHz -135 12GHz -140 -145 -150 0.1 1 10 100 Offset Frequency in kHz Figure 9 - ZL40818; Phase Noise vs Offset Frequency 3.0 Single Ended Output Power. The following graphs show how the output power varies with supply. Differential power will be 3dB greater. Frequency_sweep, Vcc = 4.75v Device 1,Temperature = -40°C Device 1,Temperature = 25°C D evice 1,Temperature = 85°C 5 4 3 2 1 0 -1 o/p level (dBm) -2 -3 -4 -5 -6 -7 -8 -9 -10 -11 -12 -13 -14 -15 8.0E+9 9.0E+9 10.0E+9 11.0E+9 12.0E+9 13.0E+9 14.0E+9 15.0E+9 16.0E+9 i/p frequency (H z) Figure 10 - ZL40813 (div by 8) Pout vs Input Frequency (Vcc = 4.75V) 8 Zarlink Semiconductor Inc. ZL40813/14/18 Data Sheet Frequency_sweep, Vcc = 5v Device 1,Temperature = -40°C Device 1,Temperature = 25°C D evice 1,Temperature = 85°C 5 4 3 2 1 0 -1 o/p level (dBm) -2 -3 -4 -5 -6 -7 -8 -9 -10 -11 -12 -13 -14 -15 8.0E+9 9.0E+9 10.0E+9 11.0E+9 12.0E+9 13.0E+9 14.0E+9 15.0E+9 16.0E+9 i/p frequency (H z) Figure 11 - ZL40813 (div by 8) Pout vs Input Frequency (Vcc = 5.0V) Frequency_sweep, Vcc = 5.25v Device 1,Temperature = -40°C Device 1,Temperature = 25°C Device 1,Tem perature = 85°C 5 4 3 2 1 0 -1 o/p level (dBm) -2 -3 -4 -5 -6 -7 -8 -9 -10 -11 -12 -13 -14 -15 8.0E+9 9.0E+9 10.0E+9 11.0E+9 12.0E+9 13.0E+9 14.0E+9 15.0E+9 16.0E+9 i/p f requency (Hz) Figure 12 - ZL40813 (div by 8) Pout vs Input Frequency (Vcc = 5.25V) 9 Zarlink Semiconductor Inc. ZL40813/14/18 Data Sheet Frequency_sweep, Vcc = 4.75v Device 1,Temperature = -40°C Device 1,Temperature = 25°C Device 1,Temperature = 85°C 5 4 3 2 1 0 -1 o/p level (dBm) -2 -3 -4 -5 -6 -7 -8 -9 -10 -11 -12 -13 -14 -15 8.0E+9 9.0E+9 10.0E+9 11.0E+9 12.0E+9 13.0E+9 14.0E+9 15.0E+9 16. 0E+9 i/p f requency (Hz) Figure 13 - ZL40818 (div by 4) Pout vs Input Frequency (Vcc = 4.75V) Frequency_sweep, Vcc = 5v Device 1,Temperature = -40°C Device 1,Temperature = 25°C D evice 1,Temperature = 85°C 5 4 3 2 1 0 -1 o/p level (dBm) -2 -3 -4 -5 -6 -7 -8 -9 -10 -11 -12 -13 -14 -15 8.0E+9 9.0E+9 10.0E+9 11.0E+9 12.0E+9 13.0E+9 14.0E+9 15.0E+9 16.0E+9 i/p frequency (H z) Figure 14 - ZL40818 (Div by 4) Pout vs Input Frequency (Vcc = 5.0V) 10 Zarlink Semiconductor Inc. ZL40813/14/18 Data Sheet Frequency_sweep, Vcc = 5.25v Device 1,Temperature = -40°C Device 1,Temperature = 25°C Device 1,Temperature = 85°C 5 4 3 2 1 0 -1 o/p level (dBm) -2 -3 -4 -5 -6 -7 -8 -9 -10 -11 -12 -13 -14 -15 8.0E+9 9.0E+9 10.0E+9 11.0E+9 12.0E+9 13.0E+9 14.0E+9 15.0E+9 16.0E+9 i/p frequency (Hz) Figure 15 - ZL40818 (Div by 4) Pout vs Input Frequency (Vcc = 5.25V) 4.0 Oscillographs of the divider output waveforms The following oscillographs show that the low-level feedthrough of the input waveform can be further reduced by summing the two output pins of the device differentially, refer to Figure 16 and Figure 17. Figure 16 - Single-ended output waveform, showing some feedthrough of the input waveform. VCC = 5V, Vin = 2dBm, Fin = 10GHz. 11 Zarlink Semiconductor Inc. ZL40813/14/18 Data Sheet Figure 17 - Differential output waveform, showing reduced feedthrough of the input waveform VCC = 5V, Vin = 2dBm, Fin = 10GHz. 5.0 Application Notes 5.1 Application Circuit Figure 3 illustrates the recommended Single Ended Application Circuit. This represents the circuit used to complete characterisation. The tabulated Electrical performance is guaranteed using this application circuit. A blank application board is available. 5.1.1 Circuit Options The application circuit includes some optional components that may be required to improve tolerance of system noise present in the application. Dummy R source may be added to the inverting input to provide a better matched source impedance at the input. This will improve the rejection of common mode noise present within the system. Dummy R load may be added to the inverting output to provide better matched load at the output. This will reduce the radiated EMI at the output and reduce the Output Noise present on the supply rail. Rfilter can be inserted between the Vcc in and the Vcc_out to provide additional filtering to the input Vcc. The input Vcc powers the input bias reference only and can be a sensitive point to system noise. The nominal input current at Vcc_IN s 0.35mA. An alternative would be to use an inductive choke. C1 is additional Supply Filtering and should be added with Rfilter. The IC includes 10pF of on Chip Supply Filtering. 12 Zarlink Semiconductor Inc. ZL40813/14/18 5.2 Data Sheet Single Ended or Differential Load Figure 16 and Figure 17 illustrate the output waveform when measured differential and single ended with a 10GHz waveform at the input at a level of +2dBm. The single ended output contains some input frequency break through which contributes to the distortion present. This is a common mode signal which is rejected if the output is taken differentially. Differential operation also provides an additional 3dBV output power. Differential Operation reduces the radiated EMI in the system and reduces the susceptibility to common mode system noise. NOTE: It is strongly recommended that these devices are used differentially for all applications. 13 Zarlink Semiconductor Inc. Package Code c Zarlink Semiconductor 2003 All rights reserved. ISSUE ACN DATE APPRD. Previous package codes For more information about all Zarlink products visit our Web Site at www.zarlink.com Information relating to products and services furnished herein by Zarlink Semiconductor Inc. or its subsidiaries (collectively “Zarlink”) is believed to be reliable. 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Manufacturing does not necessarily include testing of all functions or parameters. These products are not suitable for use in any medical products whose failure to perform may result in significant injury or death to the user. All products and materials are sold and services provided subject to Zarlink’s conditions of sale which are available on request. Purchase of Zarlink’s I2C components conveys a licence under the Philips I2C Patent rights to use these components in and I2C System, provided that the system conforms to the I2C Standard Specification as defined by Philips. Zarlink, ZL and the Zarlink Semiconductor logo are trademarks of Zarlink Semiconductor Inc. Copyright Zarlink Semiconductor Inc. All Rights Reserved. TECHNICAL DOCUMENTATION - NOT FOR RESALE