NSC 54ABT244

54ABT244
Octal Buffer/Line Driver with TRI-STATE ® Outputs
General Description
The ’ABT244 is an octal buffer and line driver with
TRI-STATE outputs designed to be employed as a memory
and address driver, clock driver, or bus-oriented transmitter/
receiver.
Features
n Non-inverting buffers
n Output sink capability of 48 mA, source capability of
24 mA
n Output switching specified for both 50 pF and 250 pF
loads
n Guaranteed simultaneous switching, noise level and
dynamic threshold performance
n Guaranteed latchup protection
n High impedance glitch free bus loading during entire
power up and power down cycle
n Nondestructive hot insertion capability
n Disable time less than enable time to avoid bus
contention
n Standard Microcircuit Drawing (SMD) 5962-9214701
Ordering Code
Military
Package
Package Description
Number
54ABT244J-QML
J20A
20-Lead Ceramic Dual-In-Line
54ABT244W-QML
W20A
20-Lead Cerpack
54ABT244E-QML
E20A
20-Lead Ceramic Leadless Chip Carrier, Type C
Connection Diagrams
Pin Assignment for
DIP and Flatpak
Pin Assignment for LCC
DS100203-2
DS100203-1
Pin
Names
OE1, OE2
Description
Output Enable Input
(Active Low)
I0–I7
Inputs
O0–O7
Outputs
Truth Table
OE1
I0–3
O0–3
OE2
I4–7
H
X
Z
H
X
O4–7
Z
L
H
H
L
H
H
L
L
L
L
L
L
H = HIGH Voltage Level
L = LOW Voltage Level
X = Immaterial
Z = High Impedance
TRI-STATE ® is a registered trademark of National Semiconductor Corporation.
© 1998 National Semiconductor Corporation
DS100203
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54ABT244 Octal Buffer/Line Driver with TRI-STATE Outputs
July 1998
Absolute Maximum Ratings (Note 1)
Current Applied to Output
in LOW State (Max)
DC Latchup Source Current
Over Voltage Latchup (I/O)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
Storage Temperature
Ambient Temperature under Bias
Junction Temperature under Bias
Ceramic
VCC Pin Potential to Ground Pin
Input Voltage (Note 2)
Input Current (Note 2)
Voltage Applied to Any Output
in the Disabled or
Power-Off State
in the HIGH State
−65˚C to +150˚C
−55˚C to +125˚C
twice the rated IOL (mA)
−500 mA
10V
Recommended Operating
Conditions
−55˚C to +175˚C
−0.5V to +7.0V
−0.5V to +7.0V
−30 mA to +5.0 mA
Free Air Ambient Temperature
Military
Supply Voltage
Military
Minimum Input Edge Rate
Data Input
Enable Input
−0.5V to 5.5V
−0.5V to VCC
−55˚C to +125˚C
+4.5V to +5.5V
(∆V/∆t)
50 mV/ns
20 mV/ns
DC Electrical Characteristics
Symbol
Parameter
ABT244
Min Typ
VIH
Input HIGH Voltage
VIL
Input LOW Voltage
VCD
Input Clamp Diode Voltage
VOH
Output HIGH Voltage
VOL
Output LOW Voltage
IIH
Input HIGH Current
Units
VCC
2.0
V
Recognized HIGH Signal
0.8
V
−1.2
V
Recognized LOW Signal
IIN = −18 mA
Min
54ABT
2.5
V
Min
54ABT
2.0
V
Min
54ABT
0.55
V
Min
5
µA
Max
5
IBVI
Input HIGH Current Breakdown Test
7
µA
Max
IIL
Input LOW Current
−5
µA
Max
V
0.0
−5
VID
Input Leakage Test
Conditions
Max
4.75
IOH = −3 mA
IOH = −24 mA
IOL = 48 mA
VIN = 2.7V (Note 4)
VIN = VCC
VIN = 7.0V
VIN = 0.5V (Note 4)
VIN = 0.0V
IID = 1.9 µA
All Other Pins Grounded
VOUT = 2.7V; OEn = 2.0V
IOZH
Output Leakage Current
50
µA
0 − 5.5V
IOZL
Output Leakage Current
−50
µA
0 − 5.5V
IOS
Output Short-Circuit Current
−275
mA
Max
ICEX
Output High Leakage Current
50
µA
Max
IZZ
Bus Drainage Test
100
µA
0.0
ICCH
Power Supply Current
50
µA
Max
All Outputs HIGH
ICCL
Power Supply Current
30
mA
Max
ICCZ
Power Supply Current
50
µA
Max
All Outputs LOW
OEn = VCC;
ICCT
Additional ICC/Input
Outputs Enabled
2.5
mA
Max
All Others at VCC or Ground
VI = VCC − 2.1V
Outputs TRI-STATE
2.5
mA
Outputs TRI-STATE
50
µA
−100
VOUT = 0.5V; OEn = 2.0V
VOUT = 0.0V
VOUT = VCC
VOUT = 5.5V; All Others GND
Enable Input VI = VCC − 2.1V
Data Input VI = VCC − 2.1V
All Others at VCC or Ground
ICCD
Dynamic ICC
No Load
mA/
(Note 4)
0.1
MHz
Max
Outputs Open
OEn = GND, (Note 3)
One Bit Toggling, 50% Duty Cycle
Note 1: Absolute maximum ratings are values beyond which the device may be damaged or have its useful life impaired. Functional operation under these conditions
is not implied.
Note 2: Either voltage limit or current limit is sufficient to protect inputs.
Note 3: For 8 bits toggling, ICCD < 0.8 mA/MHz.
Note 4: Guaranteed, but not tested.
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2
AC Electrical Characteristics
Symbol
Parameter
54ABT
TA = −55˚C to +125˚C
VCC = 4.5V–5.5V
Units
Fig.
No.
ns
Figure 5
ns
Figure 4
ns
Figure 4
CL = 50 pF
Min
Max
tPLH
Propagation Delay
1.0
5.3
tPHL
Data to Outputs
1.0
5.0
tPZH
Output Enable
0.8
6.5
tPZL
Time
1.2
7.9
tPHZ
Output Disable
1.2
7.6
tPLZ
Time
1.0
7.9
Capacitance
Symbol
Parameter
Typ
Units
CIN
Input Capacitance
5.0
pF
COUT (Note 5)
Output Capacitance
9.0
pF
Conditions
TA = 25˚C
VCC = 0V
VCC = 5.0V
Note 5: COUT is measured at frequency f = 1 MHz, per MIL-STD-883B, Method 3012.
tPLH vs Temperature (TA)
CL = 50 pF, 1 Output Switching
tPHL vs Temperature (TA)
CL = 50 pF, 1 Output Switching
DS100203-11
DS100203-12
Dashed lines represent design characteristics; for specified guarantees refer to AC Characteristics Table.
3
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Capacitance
(Continued)
tPLH vs Load Capacitance
1 Output Switching, TA = 25˚C
tPHL vs Load Capacitance
1 Output Switching, TA = 25˚C
DS100203-13
DS100203-14
tPLH vs Load Capacitance
8 Outputs Switching, TA = 25˚C
tPHL vs Load Capacitance
8 Outputs Switching, TA = 25˚C
DS100203-15
DS100203-16
tPZL vs Temperature (TA)
CL = 50 pF, 1 Output Switching
tPLZ vs Temperature (TA)
CL = 50 pF, 1 Output Switching
DS100203-17
DS100203-18
Dashed lines represent design characteristics; for specified guarantees refer to AC Characteristics Table.
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4
Capacitance
(Continued)
tPZH vs Temperature (TA)
CL = 50 pF, 1 Output Switching
tPHZ vs Temperature (TA)
CL = 50 pF, 1 Output Switching
DS100203-19
DS100203-20
tPZH vs Temperature (TA)
CL = 50 pF, 8 Outputs Switching
tPHZ vs Temperature (TA)
CL = 50 pF, 8 Outputs Switching
DS100203-21
DS100203-22
tPZL vs Temperature (TA)
CL = 50 pF, 8 Outputs Switching
tPLZ vs Temperature (TA)
CL = 50 pF, 8 Outputs Switching
DS100203-23
DS100203-24
Dashed lines represent design characteristics; for specified guarantees refer to AC Characteristics Table.
5
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Capacitance
(Continued)
tPZL vs Load Capacitance
8 Outputs Switching
TA = 25˚C
tPZH vs Load Capacitance
8 Outputs Switching
TA = 25˚C
DS100203-25
DS100203-26
tPLH and tPHL vs Number
Outputs Switching VCC = 5.0V,
TA = 25˚C, CL = 50 pF
ICC vs Frequency,
Average, TA = 25˚C,
All Outputs Unloaded/Unterminated
DS100203-27
DS100203-28
Dashed lines represent design characteristics; for specified guarantees refer to AC Characteristics Table.
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6
AC Loading
AC Waveforms
DS100203-6
FIGURE 4. TRI-STATE Output HIGH
and LOW Enable and Disable Times
DS100203-3
*Includes jig and probe capacitance
FIGURE 1. Standard AC Test Load
DS100203-7
FIGURE 5. Propagation Delay Waveforms for
Inverting and Non-Inverting Functions
DS100203-5
FIGURE 2. Test Input Signal Levels
Amplitude
Rep. Rate
tW
tr
tf
3.0V
1 MHz
500 ns
2.5 ns
2.5 ns
FIGURE 3. Test Input Signal Requirements
7
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8
Physical Dimensions
inches (millimeters) unless otherwise noted
20-Terminal Ceramic Chip Carrier (L)
NS Package Number E20A
20-Lead Ceramic Dual-In-Line (D)
NS Package Number J20A
9
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54ABT244 Octal Buffer/Line Driver with TRI-STATE Outputs
Physical Dimensions
inches (millimeters) unless otherwise noted (Continued)
20-Lead Ceramic Flatpak (F)
NS Package Number W20A
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2. A critical component in any component of a life support
1. Life support devices or systems are devices or sysdevice or system whose failure to perform can be reatems which, (a) are intended for surgical implant into
sonably expected to cause the failure of the life support
the body, or (b) support or sustain life, and whose faildevice or system, or to affect its safety or effectiveness.
ure to perform when properly used in accordance
with instructions for use provided in the labeling, can
be reasonably expected to result in a significant injury
to the user.
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