54ACTQ657 Quiet Series Octal Bidirectional Transceiver with 8-Bit Parity Generator/Checker and TRI-STATE ® Outputs General Description Features The ACTQ657 contains eight non-inverting buffers with TRI-STATE outputs and an 8-bit parity generator/checker. Intended for bus oriented applications, the device combines the ’245 and the ’280 functions in one package. The ACTQ utilizes NSC Quiet Series technology to guarantee quiet output switching and improved dynamic threshold performance. FACT Quiet Series™ features GTO™ output control and undershoot corrector in addition to a split ground bus for superior performance. n Guaranteed simultaneous switching noise level and dynamic threshold performance n Combines the ’245 and the ’280 functions in one package n Outputs source/sink 24 mA n ’ACTQ has TTL-compatible inputs n Standard Microcircuit Drawing (SMD) 5962-92197 Logic Symbols IEEE/IEC DS100244-1 DS100244-4 GTO™ is a trademark of National Semiconductor Corporation. TRI-STATE ® is a registered trademark of National Semiconductor Corporation. FACT Quiet Series™ is a trademark of Fairchild Semiconductor Corporation. © 1998 National Semiconductor Corporation DS100244 www.national.com 54ACTQ657 Quiet Series Octal Bidirectional Transceiver with 8-Bit Parity Generator/Checker and TRI-STATE Outputs September 1998 Connection Diagrams Pin Assignment for DIP and Flatpak Pin Assignment for LCC DS100244-3 DS100244-2 Pin Names www.national.com Description A0–A7 Data Inputs/TRI-STATE Outputs B0–B7 Data Inputs/TRI-STATE Outputs T/R Transmit/Receive Input OE Enable Input PARITY Parity Input/TRI-STATE Output ODD/EVEN ODD/EVEN Parity Input ERROR Error TRI-STATE Output 2 Functional Description The Transmit/Receive (T/R) input determines the direction of the data flow through the bidirectional transceivers. Transmit (active HIGH) enables data from the A port to the B port; Receive (active LOW) enables data from the B port to the A port. The Output Enable (OE) input disables the parity and ERROR outputs and both the A and B ports by placing them in a HIGH-Z condition when the Output Enable input is HIGH. When transmitting (T/R HIGH), the parity generator detects whether an even or odd number of bits on the A port are HIGH and compares these with the condition of the parity select (ODD/EVEN). If the Parity Select is HIGH and an even number of A inputs are HIGH, the Parity output is HIGH. In receiving mode (T/R LOW), the parity select and number of HIGH inputs on port B are compared to the condition of the Parity input. If an even number of bits on the B port are HIGH, the parity select is HIGH, and the PARITY input is HIGH, then ERROR will be HIGH to indicate no error. If an odd number of bits on the B port are HIGH, the parity select is HIGH, and the PARITY input is HIGH, the ERROR will be LOW indicating an error. 3 www.national.com Functional Description (Continued) Function Table Number of Inputs Input/ Inputs That Are High 0, 2, 4, 6, 8 1, 3, 5, 7 Immaterial OE T/R ODD/EVEN Parity ERROR Outputs Mode L H H H Z Transmit L H L L Z Transmit L L H H H Receive L L H L L Receive L L L H L Receive L L L L H Receive L H H L Z Transmit L H L H Z Transmit L L H H L Receive L L H L H Receive L L L H H Receive L L L L L Receive H X X Z Z Z H = HIGH Voltage Level L = LOW Voltage Level X = Immaterial Z = High Impedance Function Table Inputs OE Outputs T/R L L Bus B Data to Bus A L H Bus A Data to Bus B H X High-Z State H = HIGH Voltage Level L = LOW Voltage Level X = Immaterial www.national.com Outputs Output 4 Functional Block Diagram DS100244-5 Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays. 5 www.national.com Absolute Maximum Ratings (Note 1) Junction Temperature (TJ) CDIP If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. Supply Voltage (VCC) DC Input Diode Current (IIK) VI = −0.5V VI = VCC + 0.5V DC Input Voltage (VI) DC Output Diode Current (IOK) VO = −0.5V VO = VCC + 0.5V DC Output Voltage (VO) DC Output Source or Sink Current (IO) DC VCC or Ground Current per Output Pin (ICC or IGND) Storage Temperature (TSTG) DC Latch-up Source or Sink Current 175˚C Recommended Operating Conditions −0.5V to +7.0V Supply Voltage (VCC) ’ACTQ Input Voltage (VI) Output Voltage (VO) Operating Temperature (TA) 54ACTQ Minimum Input Edge Rate ∆V/∆t ’ACTQ Devices VIN from 0.8V to 2.0V VCC @ 4.5V, 5.5V −20 MA +20 mA −0.5V to VCC + 0.5V −20 mA +20 mA −0.5V to VCC + 0.5V ± 50 mA 4.5V to 5.5V 0V to VCC 0V to VCC −55˚C to +125˚C 125 mV/ns Note 1: Absolute maximum ratings are those values beyond which damage to the device may occur. The databook specifications should be met, without exception, to ensure that the system design is reliable over its power supply, temperature, and output/input loading variables. National does not recommend operation of FACT circuits outside databook specifications. ± 50 mA −65˚C to +150˚C ± 300 mA DC Characteristics for ’ACTQ Family Devices Symbol Parameter VCC 54ACTQ TA = (V) −55˚C to +125˚C Units Conditions Guaranteed Limits VIH VIL VOH Minimum High Level 4.5 2.0 Input Voltage 5.5 2.0 Maximum Low Level 4.5 0.8 Input Voltage 5.5 0.8 Minimum High Level 4.5 4.4 Output Voltage 5.5 5.4 V VOUT = 0.1V V or VCC − 0.1V VOUT = 0.1V V or VCC − 0.1V IOUT = −50 µA (Note 2) VIN = VIL or VIH VOL 4.5 3.70 5.5 4.70 Maximum Low Level 4.5 0.1 Output Voltage 5.5 0.1 V IOH = −24 mA V IOH = −24 mA IOUT = 50 µA (Note 2) VIN = VIL or VIH IIN 4.5 0.50 5.5 0.50 V 5.5 ± 1.0 µA 5.5 ± 11.0 µA VI = VIL, VIH VO = VCC, GND 5.5 1.6 mA VI = VCC − 2.1V Maximum Input Leakage Current IOL = 24 mA IOL = 24 mA VI = VCC, GND (T/R, OE, ODD/EVEN Inputs) IOZT Maximum I/O Leakage Current (An, Bn Inputs) ICCT www.national.com Maximum ICC/Input 6 DC Characteristics for ’ACTQ Family Devices Symbol Parameter (Continued) VCC 54ACTQ TA = (V) −55˚C to +125˚C Units Conditions Guaranteed Limits IOLD IOHD Minimum Dynamic Output Current (Note 3) ICC Maximum Quiescent Supply 5.5 50 mA VOLD = 1.65V Max 5.5 −50 mA VOHD = 3.85V Min 5.5 160.0 µA or GND (Note 4) 5.0 1.5 V (Note 5) 5.0 -1.2 V (Note 5) VIN = VCC Current VOLP Quiet Output Maximum Dynamic VOL VOLV Quiet Output Minimum Dynamic VOL Note 2: All outputs loaded; thresholds on input associated with output under test. Note 3: Maximum test duration 2.0 ms, one output loaded at a time. Note 4: ICC for 54ACTQ @ 25˚C is identical to 74ACTQ @ 25˚C. Note 5: Max number of outputs defined as (n). n−1 Data Inputs are driven 0V to 3V; one output @ GND. 7 www.national.com AC Electrical Characteristics Symbol Parameter tPLH, Propagation Delay tPHL An to Bn, Bn to An tPLH, Propagation Delay tPHL An to Parity VCC (V) (Note 6) tPLH, Propagation Delay tPHL ODD/EVEN to PARITY tPLH, Propagation Delay tPHL ODD/EVEN to ERROR tPLH, Propagation Delay tPHL Bn to ERROR tPLH, Propagation Delay tPHL PARITY to ERROR tPZH, Output Enable Time tPZL OE to An/Bn tPHZ, Output Disable Time tPLZ OE to An/Bn tPZH, Output Enable Time tPZL OE to ERROR (Note 7) tPHZ, Output Disable Time tPLZ OE to ERROR tPZH, Output Enable Time tPZL OE to PARITY tPHZ, Output Disable Time tPLZ OE to PARITY 54ACTQ TA = −55˚C to +125˚C CL = 50 pF Units Min Max 5.0 1.5 9.0 ns 5.0 1.5 13.5 ns 5.0 1.5 10.5 ns 5.0 1.5 11.0 ns 5.0 1.5 13.5 ns 5.0 1.5 10.5 ns 5.0 1.5 11.5 ns 5.0 1.5 9.0 ns 5.0 1.5 11.5 ns 5.0 1.5 9.0 ns 5.0 1.5 11.5 ns 5.0 1.5 8.5 ns Note 6: Voltage Range 5.0 is 5.0V ± 0.5V Note 7: These delay times reflect the TRI-STATE recovery time only and not the signal time through the buffers or the parity check circuitry. To assure VALID information at the ERROR pin, time must be allowed for the signal to propagate through the drivers (B to A), through the parity check circuitry (same as A to PARITY), and to the ERROR output after the ERROR pin has been enabled (Output Enable times). VALID data at the ERROR pin ≥ (A to PARITY) + (Output Enable Time). Capacitance Symbol CIN CPD Typ Units Input Capacitance Parameter 4.5 pF Power Dissipation 160.0 pF Conditions VCC = 5.0V VCC = 5.0V Capacitance www.national.com 8 Physical Dimensions inches (millimeters) unless otherwise noted 28-Terminal Ceramic Leadless Chip Carrier (L) NS Package Number E28A 24-Lead Slim Ceramic (0.300" Wide) Dual-In-Line Package (SD) NS Package Number J24F 9 www.national.com 54ACTQ657 Quiet Series Octal Bidirectional Transceiver with 8-Bit Parity Generator/Checker and TRI-STATE Outputs Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 24-Lead Ceramic Flatpak (F) NS Package Number W24C LIFE SUPPORT POLICY NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein: 2. A critical component in any component of a life support 1. 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