TI 74LVC2G07MDCKTEPG4

SN74LVC2G07-EP
www.ti.com ....................................................................................................................................................................................................... SCES719 – MAY 2008
DUAL BUFFER/DRIVER
WITH OPEN-DRAIN OUTPUTS
FEATURES
1
•
•
•
•
•
•
(1)
•
Controlled Baseline
– One Assembly Site
– One Test Site
– One Fabrication Site
Extended Temperature Performance of –55°C
to 125°C
Enhanced Diminishing Manufacturing Sources
(DMS) Support
Enhanced Product-Change Notification
Qualification Pedigree (1)
Supports 5-V VCC Operation
•
•
•
•
•
•
•
Component qualification in accordance with JEDEC and
industry standards to ensure reliable operation over an
extended temperature range. This includes, but is not limited
to, Highly Accelerated Stress Test (HAST) or biased 85/85,
temperature cycle, autoclave or unbiased HAST,
electromigration, bond intermetallic life, and mold compound
life. Such qualification testing should not be viewed as
justifying use of this component beyond specified
performance and environmental limits.
•
Inputs and Open-Drain Outputs Accept
Voltages up to 5.5 V
Max tpd of 5.7 ns at 3.3 V
Low Power Consumption, 10 µA Max ICC
±24-mA Output Drive at 3.3 V
Typical VOLP (Output Ground Bounce)
<0.8 V at VCC = 3.3 V, TA = 25°C
Typical VOHV (Output VOH Undershoot)
>2 V at VCC = 3.3 V, TA = 25°C
Ioff Supports Partial-Power-Down Mode
Operation
Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
ESD Protection Exceeds JESD 22
– 2000-V Human-Body Model (A114-A)
– 200-V Machine Model (A115-A)
– 1000-V Charged-Device Model (C101)
DCK PACKAGE
(TOP VIEW)
1A
1
6
1Y
GND
2
5
VCC
2A
3
4
2Y
See mechanical drawings for dimensions.
DESCRIPTION/ORDERING INFORMATION
This dual buffer/driver is designed for 1.65-V to 5.5-V VCC operation. The output of the SN74LVC2G07 is open
drain and can be connected to other open-drain outputs to implement active low wired OR or active high wired
AND functions. The maximum sink current is 32 mA.
This device is fully specified for partial power-down applications using Ioff. The Ioff circuitry disables the outputs,
preventing damaging current backflow through the device when it is powered down.
ORDERING INFORMATION (1)
PACKAGE (2)
TA
–55°C to 125°C
(1)
(2)
SOT (SC-70) – DCK
ORDERABLE PART NUMBER
Reel of 250
SN74LVC2G07MDCKTEP
TOP-SIDE MARKING
CHC
For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
website at www.ti.com.
Package drawings, thermal data, and symbolization are available at www.ti.com/packaging.
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2008, Texas Instruments Incorporated
SN74LVC2G07-EP
SCES719 – MAY 2008 ....................................................................................................................................................................................................... www.ti.com
FUNCTION TABLE
(EACH BUFFER/DRIVER)
INPUT
A
OUTPUT
Y
H
H
L
L
LOGIC DIAGRAM (POSITIVE LOGIC)
1A
2A
1
6
3
4
1Y
2Y
Absolute Maximum Ratings (1)
over operating free-air temperature range (unless otherwise noted)
MIN
MAX
UNIT
VCC
Supply voltage range
–0.5
6.5
V
VI
Input voltage range (2)
–0.5
6.5
V
VO
Voltage range applied to any output in the high-impedance or power-off state (2)
–0.5
6.5
V
(2) (3)
VO
Voltage range applied to any output in the high or low state
6.5
V
IIK
Input clamp current
VI < 0
–0.5
–50
mA
IOK
Output clamp current
VO < 0
–50
mA
IO
Continuous output current
±50
mA
Continuous current through VCC or GND
θJA
Package thermal impedance (4)
Tstg
Storage temperature range
(1)
(2)
(3)
(4)
2
DCK package
–65
±100
mA
259
°C/W
150
°C
Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating
conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
The input negative-voltage and output voltage ratings may be exceeded if the input and output current ratings are observed.
The value of VCC is provided in the recommended operating conditions table.
The package thermal impedance is calculated in accordance with JESD 51-7.
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Copyright © 2008, Texas Instruments Incorporated
Product Folder Link(s): SN74LVC2G07-EP
SN74LVC2G07-EP
www.ti.com ....................................................................................................................................................................................................... SCES719 – MAY 2008
Recommended Operating Conditions
VCC
Operating
Supply voltage
Data retention only
1.65
5.5
1.7
VCC = 3 V to 3.6 V
0.7 × VCC
0.35 × VCC
VCC = 1.65 V to 1.95 V
Low-level input voltage
V
V
2
VCC = 4.5 V to 5.5 V
VIL
UNIT
0.65 × VCC
VCC = 2.3 V to 2.7 V
High-level input voltage
MAX
1.5
VCC = 1.65 V to 1.95 V
VIH
MIN
VCC = 2.3 V to 2.7 V
0.7
VCC = 3 V to 3.6 V
0.8
V
0.3 × VCC
VCC = 4.5 V to 5.5 V
VI
Input voltage
0
5.5
V
VO
Output voltage
0
5.5
V
VCC = 1.65 V
4
VCC = 2.3 V
IOL
Δt/Δv
Low-level output current
8
16
VCC = 3 V
Input transition rise or fall rate
VCC = 4.5 V
24
VCC = 1.8 V ± 0.15 V, 2.5 V ± 0.2 V
20
VCC = 3.3 V ± 0.3 V
10
VCC = 5 V ± 0.5 V
TA
mA
24
ns/V
5
Operating free-air temperature
–55
125
°C
MAX
UNIT
Electrical Characteristics
over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER
TEST CONDITIONS
IOL = 100 µA
VOL
VCC
IOL = 4 mA
1.65 V
0.45
IOL = 8 mA
2.3 V
0.3
IOL = 16 mA
0.4
3V
IOL = 24 mA
A inputs
TYP
0.1
IOL = 24 mA
II
MIN
1.65 V to 5.5 V
0.55
4.5 V
VI = 5.5 V or GND
Ioff
VI or VO = 5.5 V
ICC
VI = 5.5 V or GND,
IO = 0
ΔICC
One input at VCC – 0.6 V,
Other inputs at VCC or GND
Ci
VI = VCC or GND
V
0.55
0 to 5.5 V
±5
µA
0
±10
µA
1.65 V to 5.5 V
10
µA
500
µA
3 V to 5.5 V
3.3 V
3.5
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Copyright © 2008, Texas Instruments Incorporated
Product Folder Link(s): SN74LVC2G07-EP
pF
3
SN74LVC2G07-EP
SCES719 – MAY 2008 ....................................................................................................................................................................................................... www.ti.com
Switching Characteristics
over recommended operating free-air temperature range (unless otherwise noted) (see Figure 1)
PARAMETER
tpd
FROM
(INPUT)
TO
(OUTPUT)
A
Y
VCC = 3.3 V
± 0.3 V
VCC = 5 V
± 0.5 V
MIN
MAX
MIN
MAX
1
5.7
0.5
4.9
UNIT
ns
Operating Characteristics
TA = 25°C
PARAMETER
Cpd
4
Power dissipation capacitance
TEST CONDITIONS
f = 10 MHz
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VCC = 3.3 V
VCC = 5 V
TYP
TYP
4
4
UNIT
pF
Copyright © 2008, Texas Instruments Incorporated
Product Folder Link(s): SN74LVC2G07-EP
SN74LVC2G07-EP
www.ti.com ....................................................................................................................................................................................................... SCES719 – MAY 2008
PARAMETER MEASUREMENT INFORMATION
(OPEN DRAIN)
VLOAD
S1
RL
From Output
Under Test
Open
GND
CL
(see Note A)
RL
TEST
S1
tPZL (see Notes E and F)
tPLZ (see Notes E and G)
tPHZ/tPZH
VLOAD
VLOAD
VLOAD
LOAD CIRCUIT
INPUTS
VCC
1.8 V ± 0.15 V
2.5 V ± 0.2 V
3.3 V ± 0.3 V
5 V ± 0.5 V
VI
tr/tf
VCC
VCC
3V
VCC
≤2 ns
≤2 ns
≤2.5 ns
≤2.5 ns
VM
VLOAD
CL
RL
V∆
VCC/2
VCC/2
1.5 V
VCC/2
2 × VCC
2 × VCC
6V
2 × VCC
30 pF
30 pF
50 pF
50 pF
1 kΩ
500 Ω
500 Ω
500 Ω
0.15 V
0.15 V
0.3 V
0.3 V
VI
Timing Input
VM
0V
tW
tsu
VI
Input
VM
VM
th
VI
Data Input
VM
VM
0V
0V
VOLTAGE WAVEFORMS
PULSE DURATION
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
VI
VM
Input
VM
0V
tPLH
VOH
Output
VM
VOL
tPHL
VM
VM
0V
tPLZ
Output
Waveform 1
S1 at VLOAD
(see Note B)
tPLH
VLOAD/2
VM
tPZH
VOH
Output
VM
tPZL
tPHL
VM
VI
Output
Control
VM
VOL
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
INVERTING AND NONINVERTING OUTPUTS
Output
Waveform 2
S1 at GND
(see Note B)
VOL + V∆
VOL
tPHZ
VM
VOH – V∆
VOH
≈0 V
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
LOW- AND HIGH-LEVEL ENABLING
NOTES: A. CL includes probe and jig capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control.
C. All input pulses are supplied by generators have the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω.
D. The outputs are measured one at a time, with one transition per measurement.
E. Because this device has open-drain outputs, tPLZ and tPZL are the same as tPD.
F. tPZL is measured at VM.
G. tPLZ is measured at VOL + V∆.
H. All parameters and waveforms are not applicable to all devices.
Figure 1. Load Circuit and Voltage Waveforms
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Product Folder Link(s): SN74LVC2G07-EP
5
PACKAGE OPTION ADDENDUM
www.ti.com
18-Dec-2013
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
Lead/Ball Finish
MSL Peak Temp
(2)
(6)
(3)
Op Temp (°C)
Device Marking
(4/5)
74LVC2G07MDCKTEPG4
ACTIVE
SC70
DCK
6
250
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-55 to 125
CHC
SN74LVC2G07MDCKTEP
ACTIVE
SC70
DCK
6
250
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-55 to 125
CHC
V62/08616-01XE
ACTIVE
SC70
DCK
6
250
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-55 to 125
CHC
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3)
MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4)
There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5)
Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish
value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
Addendum-Page 1
Samples
PACKAGE OPTION ADDENDUM
www.ti.com
18-Dec-2013
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
OTHER QUALIFIED VERSIONS OF SN74LVC2G07-EP :
• Catalog: SN74LVC2G07
NOTE: Qualified Version Definitions:
• Catalog - TI's standard catalog product
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
13-Jul-2011
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
SN74LVC2G07MDCKTEP
Package Package Pins
Type Drawing
SC70
DCK
6
SPQ
250
Reel
Reel
A0
Diameter Width (mm)
(mm) W1 (mm)
180.0
8.4
Pack Materials-Page 1
2.25
B0
(mm)
K0
(mm)
P1
(mm)
2.4
1.22
4.0
W
Pin1
(mm) Quadrant
8.0
Q3
PACKAGE MATERIALS INFORMATION
www.ti.com
13-Jul-2011
*All dimensions are nominal
Device
Package Type
Package Drawing
Pins
SPQ
Length (mm)
Width (mm)
Height (mm)
SN74LVC2G07MDCKTEP
SC70
DCK
6
250
202.0
201.0
28.0
Pack Materials-Page 2
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