October 1995 74LVT16652 3.3V ABT 16-Bit Transceiver/Register with TRI-STATEÉ Outputs General Description Features The LVT16652 consists of sixteen bus transceiver circuits with D-type flip-flops, and control circuitry arranged for multiplexed transmission of data directly from the input bus or from the internal registers. Each byte has separate control inputs which can be shorted together for full 16-bit operation. Data on the A or B bus will be clocked into the registers as the appropriate clock pin goes to HIGH logic level. Output Enable pins (OEAB, OEBA) are provided to control the transceiver function. The transceivers are designed for low-voltage (3.3V) VCC applications, but with the capability to provide a TTL interface to a 5V environment. The LVT16652 is fabricated with an advanced BiCMOS technology to achieve high speed operation similar to 5V ABT while maintaining a low power dissipation. Y Y Y Y Y Y Y Y Input and output interface capability to systems at 5V VCC Bus-Hold data inputs eliminate the need for external pull-up resistors to hold unused inputs Live insertion/extraction permitted Power Up/Down high impedance provides glitch-free bus loading Outputs source/sink b32 mA/ a 64 mA Available in SSOP and TSSOP Functionally compatible with the 74 series 16652 Latch-up performance exceeds 500 mA Connection Diagram Pin Assignment for SSOP and TSSOP Pin Names Description A0 – A16 Data Register A Inputs/ TRI-STATE Outputs Data Register B Inputs/ TRI-STATE Outputs Clock Pulse Inputs Select Inputs Output Enable Inputs B0 – B16 CPABn, CPBAn SABn, SBAn OEABn, OEBAn Order Number NS Package Number SSOP EIAJ TSSOP JEDEC 74LVT16652MEA 74LVT16652MEAX 74LVT16652MTD 74LVT16652MTDX MS56A MTD56 TL/F/12024 – 1 TRI-STATEÉ is a registered trademark of National Semiconductor Corporation. C1996 National Semiconductor Corporation TL/F/12024 RRD-B30M17/Printed in U. S. A. http://www.national.com 74LVT16652 3.3V ABT 16-Bit Transceiver/Register with TRI-STATE Outputs ADVANCE INFORMATION Logic Diagrams TL/F/12024 – 2 TL/F/12024 – 3 Please note that these diagrams are provided only for the understanding of logic operations and should not be used to estimate propagation delays. http://www.national.com 2 Functional Description priate Clock Inputs (CPABn, CPBAn) regardless of the Select or Output Enable Inputs. When SAB and SBA are in the real time transfer mode, it is also possible to store data without using the internal D flip-flops by simultaneously enabling OEABn and OEBAn. In this configuration each Output reinforces its Input. Thus when all other data sources to the two sets of bus lines are in a HIGH impedance state, each set of bus lines will remain at its last state. In the transceiver mode, data present at the HIGH impedance port may be stored in either the A or B register or both. The select (SABn, SBAn) controls can multiplex stored and real-time. The examples in Figure 1 demonstrate the four fundamental bus-management functions that can be performed with the LVT16652. Data on the A or B data bus, or both can be stored in the internal D flip-flop by LOW to HIGH transitions at the approReal-Time Transfer Bus B to Bus A Real-Time Transfer Bus A to Bus B Transfer Storage Data to A or B Storage TL/F/12024–4 TL/F/12024 – 5 TL/F/12024 – 6 TL/F/12024 – 7 OEAB1 OEBA1 CPAB1 CPBA1 SAB1 SBA1 OEAB1 OEBA1 CPAB1 CPBA1 SAB1 SBA1 OEAB1 OEBA1 CPAB1 CPBA1 SAB1 SBA1 OEAB1 OEBA1 CPAB1 CPBA1 SAB1 SBA1 L L X X X L H H X X L X X H L X X X L X X L X X L H L L X X H L H or L H or L H H FIGURE 1 Truth Table (Note) Inputs Inputs/Outputs OEAB1 OEBA1 CPAB1 CPBA1 SAB1 SBA1 L H H or L H or L X X L H L L X X A0 thru A7 Input Operating Mode B0 thru B7 Input Isolation Store A and B Data X H L H or L X X Input Not Specified Store A, Hold B H H L L X X Input Output Store A in Both Registers L X H or L L X X Not Specified Input Hold A, Store B L L L L X X Output Input Store B in Both Registers L L X X X L Output Input Real-Time B Data to A Bus L L X H or L X H Store B Data to A Bus H H X X L X Real-Time A Data to B Bus H H H or L X H X Stored A Data to B Bus H Stored A Data to B Bus and Stored B Data to A Bus H L H e HIGH Voltage Level H or L H or L L e LOW Voltage Level H X e Immaterial Input Output Output Output L e LOW to HIGH Clock Transition Note: The data output functions may be enabled or disabled by various signals at OEAB or OEBA inputs. Data input functions are always enabled, i.e., data at the bus pins will be stored on every LOW to HIGH transition on the clock inputs. This also applies to data I/O (A and B: 8–15) and Ý2 control pins. 3 http://www.national.com 74LVT16652 Ordering Information The device number is used to form part of a simplified purchasing code where the package type and temperature range are defined as follows: 74LVT 16652 MEA Temperature Range Family 74LVT e Commercial Special Variations ‘‘X’’ e Tape and Reel ‘‘ ’’ e Rail/Tube Device Type Package Code MEA e Molded Shrink Small Outline Package, EIAJ MTD e Molded Thin Shrink Small Outline Package, JEDEC, 4.4 mm Body Width http://www.national.com X 4 Physical Dimensions inches (millimeters) unless otherwise noted 56-Lead Molded Shrink Small Outline Package, EIAJ Order Number 74LVT16652MEA or 74LVT16652MEAX NS Package Number MS56A 5 http://www.national.com 74LVT16652 3.3V ABT 16-Bit Transceiver/Register with TRI-STATE Outputs Physical Dimensions millimeters (Continued) 56-Lead Molded Thin Shrink Small Outline Package, JEDEC, 6.1 mm Body Width Order Number 74LVT16652MTD or 74LVT16652MTDX NS Package Number MTD56 LIFE SUPPORT POLICY NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and whose failure to perform, when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. National Semiconductor Corporation Americas Tel: 1(800) 272-9959 Fax: 1(800) 737-7018 Email: support @ nsc.com http://www.national.com 2. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. National Semiconductor Europe Fax: a49 (0) 180-530 85 86 Email: europe.support @ nsc.com Deutsch Tel: a49 (0) 180-530 85 85 English Tel: a49 (0) 180-532 78 32 Fran3ais Tel: a49 (0) 180-532 93 58 Italiano Tel: a49 (0) 180-534 16 80 National Semiconductor Southeast Asia Fax: (852) 2376 3901 Email: sea.support @ nsc.com National Semiconductor Japan Ltd. Tel: 81-3-5620-7561 Fax: 81-3-5620-6179 National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications. This datasheet has been download from: www.datasheetcatalog.com Datasheets for electronics components.