IRF AUIRFS3107-7TRL

PD - 96395A
AUTOMOTIVE GRADE
AUIRFS3107-7P
Features
l
l
l
l
l
l
l
l
HEXFET® Power MOSFET
Advanced Process Technology
Ultra Low On-Resistance
Enhanced dV/dT and dI/dT capability
175°C Operating Temperature
Fast Switching
Repetitive Avalanche Allowed up to Tjmax
Lead-Free, RoHS Compliant
Automotive Qualified *
D
G
S
VDSS
RDS(on) typ.
max.
ID (Silicon Limited)
ID (Package Limited)
Description
75V
2.1mΩ
2.6mΩ
260A
240A
c
D
Specifically designed for Automotive applications, this
HEXFET® Power MOSFET utilizes the latest processing
techniques to achieve extremely low on-resistance per silicon
area. Additional features of this design are a 175°C junction
operating temperature, fast switching speed and improved
repetitive avalanche rating . These features combine to make
this design an extremely efficient and reliable device for use
in Automotive applications and a wide variety of other
applications.
S
G
S
S
S
S
D2Pak 7 Pin
AUIRFS3107-7P
G
D
S
Gate
Drain
Source
Absolute Maximum Ratings
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are
stress ratings only; and functional operation of the device at these or any other condition beyond those indicated in the
specifications is not implied.Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
The thermal resistance and power dissipation ratings are measured under board mounted and still air conditions. Ambient
temperature (TA) is 25°C, unless otherwise specified.
Parameter
Max.
ID @ TC = 25°C
Continuous Drain Current, VGS @ 10V (Silicon Limited)
ID @ TC = 100°C
ID @ TC = 25°C
IDM
PD @TC = 25°C
Continuous Drain Current, VGS @ 10V (Silicon Limited)
Continuous Drain Current, VGS @ 10V (Package Limited)
VGS
EAS
IAR
EAR
dv/dt
TJ
TSTG
d
Pulsed Drain Current
Maximum Power Dissipation
Linear Derating Factor
Gate-to-Source Voltage
Single Pulse Avalanche Energy (Thermally Limited)
Avalanche Current
Repetitive Avalanche Energy
Peak Diode Recovery
Operating Junction and
Storage Temperature Range
Soldering Temperature, for 10 seconds (1.6mm from case)
e
d
f
d
Units
c
260
190
240
1060
370
2.5
± 20
320
See Fig. 14, 15, 22a, 22b
13
-55 to + 175
A
W
W/°C
V
mJ
A
mJ
V/ns
°C
300
Thermal Resistance
Parameter
RθJC
RθJA
kl
Junction-to-Case
Junction-to-Ambient (PCB Mount)
j
Typ.
Max.
Units
–––
0.40
40
°C/W
–––
HEXFET® is a registered trademark of International Rectifier.
*Qualification standards can be found at http://www.irf.com/
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1
11/1/11
AUIRFS3107-7P
Static Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
Parameter
Min. Typ. Max. Units
V(BR)DSS
ΔV(BR)DSS/ΔTJ
RDS(on)
VGS(th)
gfs
RG
IDSS
Drain-to-Source Breakdown Voltage
Breakdown Voltage Temp. Coefficient
Static Drain-to-Source On-Resistance
Gate Threshold Voltage
Forward Transconductance
IGSS
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Internal Gate Resistance
Drain-to-Source Leakage Current
75
–––
–––
2.0
260
–––
0.083
2.1
–––
–––
–––
–––
2.6
4.0
–––
–––
2.1
–––
–––
–––
–––
–––
20
250
100
-100
–––
–––
–––
–––
Conditions
V VGS = 0V, ID = 250μA
V/°C Reference to 25°C, ID = 5mA
mΩ VGS = 10V, ID = 160A
V VDS = VGS, ID = 250μA
S VDS = 25V, ID = 160A
g
Ω
μA
nA
VDS = 75V, VGS = 0V
VDS = 75V, VGS = 0V, TJ = 125°C
VGS = 20V
VGS = -20V
Dynamic Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
Parameter
Min. Typ. Max. Units
Qg
Qgs
Qgd
Qsync
td(on)
tr
td(off)
tf
Ciss
Coss
Crss
Coss eff. (ER)
Coss eff. (TR)
Total Gate Charge
Gate-to-Source Charge
Gate-to-Drain ("Miller") Charge
Total Gate Charge Sync. (Qg - Qgd)
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
i
Effective Output Capacitance (Energy Related)
Effective Output Capacitance (Time Related)
h
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
160
38
57
103
17
80
100
64
9200
850
400
1150
1500
240
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
d
nC
ns
Conditions
ID = 160A
VDS = 38V
VGS = 10V
ID = 160A, VDS =0V, VGS = 10V
VDD = 49V
ID = 160A
RG = 2.7Ω
VGS = 10V
VGS = 0V
VDS = 50V
ƒ = 1.0MHz
VGS = 0V, VDS = 0V to 60V
VGS = 0V, VDS = 0V to 60V
g
g
pF
i
h
Diode Characteristics
Parameter
IS
Continuous Source Current
VSD
trr
(Body Diode)
Pulsed Source Current
(Body Diode)
Diode Forward Voltage
Reverse Recovery Time
Qrr
Reverse Recovery Charge
IRRM
ton
Reverse Recovery Current
Forward Turn-On Time
ISM
d
Notes:
 Calculated continuous current based on maximum allowable junction
temperature. Bond wire current limit is 240A. Note that current
limitations arising from heating of the device leads may occur with
some lead mounting arrangements.
‚ Repetitive rating; pulse width limited by max. junction
temperature.
ƒ Limited by TJmax, starting TJ = 25°C, L = 0.026mH
RG = 25Ω, IAS = 160A, VGS =10V. Part not recommended for use
above this value .
„ ISD ≤ 160A, di/dt ≤ 1420A/μs, VDD ≤ V(BR)DSS, TJ ≤ 175°C.
2
Min. Typ. Max. Units
–––
–––
––– 260
–––
c
1060
Conditions
MOSFET symbol
A
showing the
integral reverse
D
G
p-n junction diode.
TJ = 25°C, IS = 160A, VGS = 0V
TJ = 25°C
VR = 64V,
TJ = 125°C
IF = 160A
di/dt = 100A/μs
TJ = 25°C
g
S
––– –––
1.3
V
–––
52
–––
ns
–––
63
–––
––– 110 –––
nC
TJ = 125°C
––– 160 –––
–––
3.8
–––
A TJ = 25°C
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
g
… Pulse width ≤ 400μs; duty cycle ≤ 2%.
† Coss eff. (TR) is a fixed capacitance that gives the same charging time
as Coss while VDS is rising from 0 to 80% VDSS .
‡ Coss eff. (ER) is a fixed capacitance that gives the same energy as
Coss while VDS is rising from 0 to 80% VDSS.
ˆ When mounted on 1" square PCB (FR-4 or G-10 Material). For recom
mended footprint and soldering echniques refer to application note #AN-994.
‰ Rθ is measured at TJ approximately 90°C.
Š RθJC value shown is at time zero.
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AUIRFS3107-7P
Qualification Information†
Automotive
(per AEC-Q101)
Qualification Level
Moisture Sensitivity Level
††
Comments:
This part number(s) passed Automotive
qualification. IR’s Industrial and Consumer qualification level is
granted by extension of the higher Automotive level.
2
MSL1
7L-D PAK
†††
Machine Model
Class M4(+/- 800V )
(per AEC-Q101-002)
†††
ESD
Human Body Model
Class H3A(+/- 6000V )
(per AEC-Q101-001)
†††
Charged Device Model
RoHS Compliant
Class C5(+/- 2000V )
(per AEC-Q101-005)
Yes
†
Qualification standards can be found at International Rectifier’s web site: http//www.irf.com/
††
Exceptions (if any) to AEC-Q101 requirements are noted in the qualification report.
†††
Highest passing voltage
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3
AUIRFS3107-7P
1000
1000
BOTTOM
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
4.8V
4.5V
TOP
ID, Drain-to-Source Current (A)
ID, Drain-to-Source Current (A)
TOP
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
4.8V
4.5V
BOTTOM
4.5V
100
100
4.5V
≤60μs PULSE WIDTH
≤60μs PULSE WIDTH
Tj = 25°C
Tj = 175°C
10
10
0.1
1
10
0.1
100
Fig 1. Typical Output Characteristics
T J = 175°C
T J = 25°C
10
1
VDS = 25V
≤60μs PULSE WIDTH
0.1
ID = 160A
VGS = 10V
2.0
(Normalized)
100
RDS(on) , Drain-to-Source On Resistance
2.5
1.5
1.0
0.5
2
3
4
5
6
7
8
-60 -40 -20 0 20 40 60 80 100120140160180
VGS , Gate-to-Source Voltage (V)
T J , Junction Temperature (°C)
Fig 3. Typical Transfer Characteristics
Fig 4. Normalized On-Resistance vs. Temperature
100000
14.0
VGS = 0V,
f = 1 MHZ
Ciss = C gs + Cgd, C ds SHORTED
Crss = Cgd
ID= 160A
VGS , Gate-to-Source Voltage (V)
ID, Drain-to-Source Current (A)
100
Fig 2. Typical Output Characteristics
1000
Coss = Cds + Cgd
C, Capacitance (pF)
10
V DS, Drain-to-Source Voltage (V)
V DS, Drain-to-Source Voltage (V)
Ciss
10000
Coss
Crss
1000
100
12.0
VDS= 60V
VDS= 38V
10.0
8.0
6.0
4.0
2.0
0.0
1
10
100
1000
VDS, Drain-to-Source Voltage (V)
Fig 5. Typical Capacitance vs. Drain-to-Source Voltage
4
1
0
25
50
75 100 125 150 175 200 225
Q G , Total Gate Charge (nC)
Fig 6. Typical Gate Charge vs. Gate-to-Source Voltage
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AUIRFS3107-7P
10000
T J = 175°C
ID, Drain-to-Source Current (A)
ISD, Reverse Drain Current (A)
1000
1000
100
TJ = 25°C
10
OPERATION IN THIS AREA
LIMITED BY R DS(on)
1
100μsec
100
10msec
1msec
10
DC
1
Tc = 25°C
Tj = 175°C
Single Pulse
VGS = 0V
0.1
0.1
0.0
0.5
1.0
1.5
2.0
1
VSD, Source-to-Drain Voltage (V)
ID, Drain Current (A)
250
200
150
100
50
0
100
125
150
175
V(BR)DSS , Drain-to-Source Breakdown Voltage (V)
Limited By Package
75
95
Id = 5mA
90
85
80
75
70
-60 -40 -20 0 20 40 60 80 100120140160180
T C , Case Temperature (°C)
T J , Temperature ( °C )
Fig 9. Maximum Drain Current vs.
Case Temperature
Fig 10. Drain-to-Source Breakdown Voltage
3.5
EAS , Single Pulse Avalanche Energy (mJ)
1400
3.0
ID
28A
50A
BOTTOM 160A
TOP
1200
2.5
Energy (μJ)
1000
VDS, Drain-to-Source Voltage (V)
300
50
100
Fig 8. Maximum Safe Operating Area
Fig 7. Typical Source-Drain Diode
Forward Voltage
25
10
1000
2.0
1.5
1.0
0.5
0.0
800
600
400
200
0
-10
0
10
20
30
40
50
60
70
VDS, Drain-to-Source Voltage (V)
Fig 11. Typical COSS Stored Energy
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80
25
50
75
100
125
150
175
Starting T J , Junction Temperature (°C)
Fig 12. Maximum Avalanche Energy vs. DrainCurrent
5
AUIRFS3107-7P
Thermal Response ( Z thJC ) °C/W
1
D = 0.50
0.1
0.20
0.10
τJ
0.05
0.01
0.02
0.01
R1
R1
τJ
τ1
R2
R2
R3
R3
τC
τ
τ2
τ1
τ2
τ3
τ3
τ4
τ4
Ci= τi/Ri
Ci i/Ri
1E-005
0.01083
τi (sec)
0.00001
0.05878
0.000086
0.15777
0.001565
0.17478
0.011192
Notes:
1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthjc + Tc
SINGLE PULSE
( THERMAL RESPONSE )
0.001
1E-006
Ri (°C/W)
R4
R4
0.0001
0.001
0.01
0.1
t1 , Rectangular Pulse Duration (sec)
Fig 13. Maximum Effective Transient Thermal Impedance, Junction-to-Case
1000
Avalanche Current (A)
Duty Cycle = Single Pulse
100
Allowed avalanche Current vs avalanche
pulsewidth, tav, assuming ΔTj = 150°C and
Tstart =25°C (Single Pulse)
0.01
0.05
0.10
10
Allowed avalanche Current vs avalanche
pulsewidth, tav, assuming ΔΤ j = 25°C and
Tstart = 150°C.
1
1.0E-06
1.0E-05
1.0E-04
1.0E-03
1.0E-02
1.0E-01
tav (sec)
Fig 14. Typical Avalanche Current vs.Pulsewidth
350
300
EAR , Avalanche Energy (mJ)
Notes on Repetitive Avalanche Curves , Figures 14, 15:
(For further info, see AN-1005 at www.irf.com)
1. Avalanche failures assumption:
Purely a thermal phenomenon and failure occurs at a temperature far in
excess of Tjmax. This is validated for every part type.
2. Safe operation in Avalanche is allowed as long asTjmax is not exceeded.
3. Equation below based on circuit and waveforms shown in Figures 22a, 22b.
4. PD (ave) = Average power dissipation per single avalanche pulse.
5. BV = Rated breakdown voltage (1.3 factor accounts for voltage increase
during avalanche).
6. Iav = Allowable avalanche current.
7. ΔT = Allowable rise in junction temperature, not to exceed Tjmax (assumed as
25°C in Figure 14, 15).
tav = Average time in avalanche.
D = Duty cycle in avalanche = tav ·f
ZthJC(D, tav) = Transient thermal resistance, see Figures 13)
TOP
Single Pulse
BOTTOM 1.0% Duty Cycle
ID = 160A
250
200
150
100
50
0
25
50
75
100
125
150
175
Starting T J , Junction Temperature (°C)
PD (ave) = 1/2 ( 1.3·BV·Iav) = DT/ ZthJC
Iav = 2DT/ [1.3·BV·Zth]
EAS (AR) = PD (ave)·tav
Fig 15. Maximum Avalanche Energy vs. Temperature
6
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AUIRFS3107-7P
30
4.0
3.5
3.0
IRR (A)
VGS(th) , Gate threshold Voltage (V)
4.5
ID = 250μA
ID = 1.0mA
2.5
20
TJ = 25°C
TJ = 125°C
15
10
ID = 1.0A
2.0
25
IF = 106A
V R = 64V
5
1.5
1.0
0
-75 -50 -25
0
25 50 75 100 125 150 175
0
200
T J , Temperature ( °C )
600
800
1000
Fig. 17 - Typical Recovery Current vs. dif/dt
Fig 16. Threshold Voltage vs. Temperature
30
1000
25
IF = 160A
V R = 64V
20
TJ = 25°C
TJ = 125°C
IF = 106A
V R = 64V
900
800
TJ = 25°C
TJ = 125°C
700
Q RR (A)
IRR (A)
400
diF /dt (A/μs)
15
10
600
500
400
300
5
200
0
100
0
200
400
600
800
1000
0
200
diF /dt (A/μs)
400
600
800
1000
diF /dt (A/μs)
Fig. 19 - Typical Stored Charge vs. dif/dt
Fig. 18 - Typical Recovery Current vs. dif/dt
1000
IF = 160A
V R = 64V
900
TJ = 25°C
TJ = 125°C
800
Q RR (A)
700
600
500
400
300
200
0
200
400
600
800
1000
diF /dt (A/μs)
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Fig. 20 - Typical Stored Charge vs. dif/dt
7
AUIRFS3107-7P
Driver Gate Drive
D.U.T
ƒ
-
‚
-
-
„
*
D.U.T. ISD Waveform
Reverse
Recovery
Current
+

RG
• dv/dt controlled by RG
• Driver same type as D.U.T.
• I SD controlled by Duty Factor "D"
• D.U.T. - Device Under Test
P.W.
Period
VGS=10V
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
+
D=
Period
P.W.
+
V DD
+
-
Body Diode Forward
Current
di/dt
D.U.T. VDS Waveform
Diode Recovery
dv/dt
Re-Applied
Voltage
Body Diode
VDD
Forward Drop
Inductor
InductorCurrent
Curent
ISD
Ripple ≤ 5%
*
VGS = 5V for Logic Level Devices
Fig 21. Peak Diode Recovery dv/dt Test Circuit for N-Channel
HEXFET® Power MOSFETs
V(BR)DSS
15V
DRIVER
L
VDS
tp
D.U.T
RG
VGS
20V
+
V
- DD
IAS
A
0.01Ω
tp
I AS
Fig 22a. Unclamped Inductive Test Circuit
RD
V DS
Fig 22b. Unclamped Inductive Waveforms
VDS
90%
VGS
D.U.T.
RG
+
- V DD
V10V
GS
10%
VGS
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
td(on)
Fig 23a. Switching Time Test Circuit
tr
t d(off)
Fig 23b. Switching Time Waveforms
Id
Current Regulator
Same Type as D.U.T.
Vds
Vgs
50KΩ
12V
tf
.2μF
.3μF
D.U.T.
+
V
- DS
Vgs(th)
VGS
3mA
IG
ID
Current Sampling Resistors
8
Fig 24a. Gate Charge Test Circuit
Qgs1 Qgs2
Qgd
Qgodr
Fig 24b. Gate Charge Waveform
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AUIRFS3107-7P
D2Pak - 7 Pin Package Outline
Dimensions are shown in millimeters (inches)
D2Pak - 7 Pin Part Marking Information
Part Number
AUFS3107-7P
YWWA
IR Logo
XX
or
Date Code
Y= Year
WW= Work Week
A= Automotive, LeadFree
XX
Lot Code
Note: For the most current drawing please refer to IR website at http://www.irf.com/package/
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9
AUIRFS3107-7P
D2Pak - 7 Pin Tape and Reel
Note: For the most current drawing please refer to IR website at http://www.irf.com/package/
10
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AUIRFS3107-7P
Ordering Information
Base part
AUIRFS3107-7P
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Package Type
D2Pak -7Pin
Standard Pack
Form
Tube
Tape and Reel Left
Tape and Reel Right
Complete Part Number
Quantity
75
800
800
AUIRFS3107-7P
AUIRFS3107-7TRL
AUIRFS3107-7TRR
11
AUIRFS3107-7P
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the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at
any time and to discontinue any product or services without notice. Part numbers designated with the “AU” prefix follow
automotive industry and / or customer specific requirements with regards to product discontinuance and process change
notification. All products are sold subject to IR’s terms and conditions of sale supplied at the time of order acknowledgment.
IR warrants performance of its hardware products to the specifications applicable at the time of sale in accordance with IR’s
standard warranty. Testing and other quality control techniques are used to the extent IR deems necessary to support this
warranty. Except where mandated by government requirements, testing of all parameters of each product is not necessarily
performed.
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