PD - 96407A AUTOMOTIVE GRADE AUIRFP4004 HEXFET® Power MOSFET Features l l l l l l l Advanced Process Technology Low On-Resistance 175°C Operating Temperature Fast Switching Repetitive Avalanche Allowed up to Tjmax Lead-Free, RoHS Compliant Automotive Qualified * D G S VDSS RDS(on) typ. max. ID (Silicon Limited) 40V 1.35mΩ 1.70mΩ 350A 195A c ID (Package Limited) Description D Specifically designed for Automotive applications, this HEXFET® Power MOSFET utilizes the latest processing techniques to achieve extremely low on-resistance per silicon area. Additional features of this design are a 175°C junction operating temperature, fast switching speed and improved repetitive avalanche rating . These features combine to make this design an extremely efficient and reliable device for use in Automotive applications and a wide variety of other applications. G S D TO-247AC G D S Gate Drain Source Absolute Maximum Ratings Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only; and functional operation of the device at these or any other condition beyond those indicated in the specifications is not implied.Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. The thermal resistance and power dissipation ratings are measured under board mounted and still air conditions. Ambient temperature (TA) is 25°C, unless otherwise specified. Parameter ID @ TC = 25°C ID @ TC = 100°C ID @ TC = 25°C IDM PD @TC = 25°C VGS EAS IAR EAR Max. Continuous Drain Current, VGS @ 10V (Silicon Limited) Continuous Drain Current, VGS @ 10V (Silicon Limited) Continuous Drain Current, VGS @ 10V (Package Limited) d Pulsed Drain Current Maximum Power Dissipation Linear Derating Factor Gate-to-Source Voltage Single Pulse Avalanche Energy (Thermally limited) Avalanche Current Repetitive Avalanche Energy d f g e 2.0 -55 to + 175 Peak Diode Recovery Operating Junction and Storage Temperature Range Soldering Temperature, for 10 seconds (1.6mm from case) Mounting torque, 6-32 or M3 screw dv/dt TJ TSTG Units c c 350 250 195 1390 380 2.5 ± 20 290 See Fig. 14, 15, 21a, 21b A W W/°C V mJ A mJ V/ns °C 300 x x 10lb in (1.1N m) Thermal Resistance Symbol RθJC RθCS RθJA Parameter k Junction-to-Case Case-to-Sink, Flat Greased Surface Junction-to-Ambient j Typ. Max. Units ––– 0.24 ––– 0.40 ––– 40 °C/W HEXFET® is a registered trademark of International Rectifier. *Qualification standards can be found at http://www.irf.com/ www.irf.com 1 09/06/11 AUIRFP4004 Static Electrical Characteristics @ TJ = 25°C (unless otherwise specified) Symbol Parameter Min. Typ. Max. Units V(BR)DSS ΔV(BR)DSS/ΔTJ RDS(on) VGS(th) gfs IDSS Drain-to-Source Breakdown Voltage Breakdown Voltage Temp. Coefficient Static Drain-to-Source On-Resistance Gate Threshold Voltage Forward Transconductance Drain-to-Source Leakage Current IGSS Gate-to-Source Forward Leakage Gate-to-Source Reverse Leakage 40 ––– ––– 2.0 290 ––– ––– ––– ––– ––– ––– 0.035 ––– 1.35 1.70 ––– 4.0 ––– ––– ––– 20 ––– 250 ––– 200 ––– -200 Conditions V VGS = 0V, ID = 250μA V/°C Reference to 25°C, ID = 5mA mΩ VGS = 10V, ID = 195A V VDS = VGS, ID = 250μA S VDS = 10V, ID = 195A μA VDS = 40V, VGS = 0V VDS = 40V, VGS = 0V, TJ = 125°C nA VGS = 20V VGS = -20V Dynamic Electrical Characteristics @ TJ = 25°C (unless otherwise specified) Symbol Parameter Min. Typ. Max. Units Qg Qgs Qgd Qsync Total Gate Charge Gate-to-Source Charge Gate-to-Drain ("Miller") Charge Total Gate Charge Sync. (Qg - Qgd) RG(int) td(on) tr td(off) tf Ciss Coss Crss Coss eff. (ER) Coss eff. (TR) Internal Gate Resistance Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Input Capacitance Output Capacitance Reverse Transfer Capacitance Effective Output Capacitance (Energy Related) Effective Output Capacitance (Time Related) ––– ––– ––– ––– 220 59 75 145 330 ––– ––– ––– ––– 6.8 59 370 160 190 8920 2360 930 2860 3110 ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– d g nC Conditions ID = 195A VDS = 20V VGS = 10V ID = 195A, VDS =0V, VGS = 10V g Ω ns pF VDD = 20V ID = 195A RG = 2.7Ω VGS = 10V VGS = 0V VDS = 25V ƒ = 1.0MHz VGS = 0V, VDS = 0V to 32V VGS = 0V, VDS = 0V to 32V g i h Diode Characteristics Symbol IS Parameter Continuous Source Current VSD trr (Body Diode) Pulsed Source Current (Body Diode) Diode Forward Voltage Reverse Recovery Time Qrr Reverse Recovery Charge IRRM ton Reverse Recovery Current Forward Turn-On Time ISM di Notes: Calculated continuous current based on maximum allowable junction temperature. Bond wire current limit is 195A. Note that current limitations arising from heating of the device leads may occur with some lead mounting arrangements. Refer to App Notes (AN-1140). Repetitive rating; pulse width limited by max. junction temperature. Limited by TJmax, starting TJ = 25°C, L = 0.015mH RG = 25Ω, IAS = 195A, VGS =10V. Part not recommended for use above this value. 2 Min. Typ. Max. Units ––– ––– 350 ––– ––– c 1390 A Conditions MOSFET symbol showing the integral reverse D G p-n junction diode. TJ = 25°C, IS = 195A, VGS = 0V TJ = 25°C VR = 20V, TJ = 125°C IF = 195A di/dt = 100A/μs TJ = 25°C g S ––– ––– 1.3 V ––– 83 130 ns ––– 78 120 ––– 190 290 nC TJ = 125°C ––– 210 320 ––– 4.0 ––– A TJ = 25°C Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD) g ISD ≤ 195A, di/dt ≤ 690A/μs, VDD ≤ V(BR)DSS, TJ ≤ 175°C. Pulse width ≤ 400μs; duty cycle ≤ 2%. Coss eff. (TR) is a fixed capacitance that gives the same charging time as Coss while VDS is rising from 0 to 80% VDSS . Coss eff. (ER) is a fixed capacitance that gives the same energy as Coss while VDS is rising from 0 to 80% VDSS. When mounted on 1" square PCB (FR-4 or G-10 Material). For recom mended footprint and soldering techniques refer to application note #AN-994. Rθ is measured at TJ approximately 90°C. www.irf.com AUIRFP4004 Qualification Information† Automotive (per AEC-Q101) Qualification Level Moisture Sensitivity Level †† Comments: This part number(s) passed Automotive qualification. IR’s Industrial and Consumer qualification level is granted by extension of the higher Automotive level. 3L-TO-247 N/A ††† Machine Model Class M4(+/- 800V ) (per AEC-Q101-002) ††† ESD Human Body Model Class H3A(+/- 6000V ) (per AEC-Q101-001) ††† Charged Device Model RoHS Compliant Class C5(+/- 2000V ) (per AEC-Q101-005) Yes † Qualification standards can be found at International Rectifier’s web site: http//www.irf.com/ †† Exceptions (if any) to AEC-Q101 requirements are noted in the qualification report. ††† Highest passing voltage www.irf.com 3 AUIRFP4004 1000 1000 BOTTOM VGS 15V 10V 8.0V 7.0V 6.0V 5.5V 5.0V 4.5V TOP ID, Drain-to-Source Current (A) ID, Drain-to-Source Current (A) TOP VGS 15V 10V 8.0V 7.0V 6.0V 5.5V 5.0V 4.5V 100 BOTTOM 100 4.5V 4.5V ≤60μs PULSE WIDTH ≤60μs PULSE WIDTH Tj = 175°C Tj = 25°C 10 10 0.1 1 10 0.1 V DS, Drain-to-Source Voltage (V) Fig 1. Typical Output Characteristics T J = 175°C 100 T J = 25°C 10 VDS = 10V ≤60μs PULSE WIDTH ID = 195A VGS = 10V 1.5 (Normalized) RDS(on) , Drain-to-Source On Resistance ID, Drain-to-Source Current (A) 2.0 1.0 1.0 0.5 3 4 5 6 7 8 -60 -40 -20 0 20 40 60 80 100120140160180 T J , Junction Temperature (°C) VGS , Gate-to-Source Voltage (V) Fig 4. Normalized On-Resistance vs. Temperature Fig 3. Typical Transfer Characteristics 100000 12.0 VGS = 0V, f = 1 MHZ Ciss = Cgs + Cgd, C ds SHORTED Crss = Cgd VGS , Gate-to-Source Voltage (V) ID= 195A Coss = Cds + Cgd C, Capacitance (pF) 10 Fig 2. Typical Output Characteristics 1000 Ciss 10000 Coss Crss 1000 100 10.0 VDS= 32V VDS= 24V 8.0 6.0 4.0 2.0 0.0 1 10 100 VDS, Drain-to-Source Voltage (V) Fig 5. Typical Capacitance vs. Drain-to-Source Voltage 4 1 V DS, Drain-to-Source Voltage (V) 0 50 100 150 200 250 Q G , Total Gate Charge (nC) Fig 6. Typical Gate Charge vs. Gate-to-Source Voltage www.irf.com AUIRFP4004 10000 T J = 175°C 100 10 OPERATION IN THIS AREA LIMITED BY R DS(on) ID, Drain-to-Source Current (A) ISD, Reverse Drain Current (A) 1000 1000 TJ = 25°C 1 100μsec 100 1msec 10msec 10 Tc = 25°C Tj = 175°C Single Pulse VGS = 0V 1 0.1 0.0 0.4 0.8 1.2 1.6 1 2.0 ID, Drain Current (A) Limited By Package 250 200 150 100 50 0 50 75 100 125 150 175 V(BR)DSS , Drain-to-Source Breakdown Voltage (V) 350 25 100 Fig 8. Maximum Safe Operating Area Fig 7. Typical Source-Drain Diode Forward Voltage 300 10 VDS, Drain-to-Source Voltage (V) VSD, Source-to-Drain Voltage (V) 52 Id = 5.0mA 50 48 46 44 42 40 -60 -40 -20 0 20 40 60 80 100120140160180 T C , Case Temperature (°C) T J , Temperature ( °C ) Fig 10. Drain-to-Source Breakdown Voltage Fig 9. Maximum Drain Current vs. Case Temperature 2.5 EAS , Single Pulse Avalanche Energy (mJ) 1200 ID 36A 73A BOTTOM 195A TOP 1000 2.0 Energy (μJ) DC 1.5 1.0 0.5 0.0 800 600 400 200 0 -5 0 5 10 15 20 25 30 35 40 VDS, Drain-to-Source Voltage (V) Fig 11. Typical COSS Stored Energy www.irf.com 25 50 75 100 125 150 175 Starting T J , Junction Temperature (°C) Fig 12. Maximum Avalanche Energy vs. DrainCurrent 5 AUIRFP4004 Thermal Response ( Z thJC ) °C/W 1 D = 0.50 0.1 0.20 0.10 0.05 τJ 0.02 0.01 0.01 R1 R1 τJ τ1 R2 R2 R3 R3 τC τ τ2 τ1 τ2 τ3 τ3 Ci= τi/Ri Ci i/Ri 1E-005 0.0001 τ4 τ4 τi (sec) 0.0123 0.000011 0.0585 0.000055 0.1693 0.000917 0.1601 0.008784 Notes: 1. Duty Factor D = t1/t2 2. Peak Tj = P dm x Zthjc + Tc SINGLE PULSE ( THERMAL RESPONSE ) 0.001 1E-006 Ri (°C/W) R4 R4 0.001 0.01 0.1 t1 , Rectangular Pulse Duration (sec) Fig 13. Maximum Effective Transient Thermal Impedance, Junction-to-Case 1000 Avalanche Current (A) Duty Cycle = Single Pulse Allowed avalanche Current vs avalanche pulsewidth, tav, assuming Δ Tj = 150°C and Tstart =25°C (Single Pulse) 0.01 100 0.05 0.10 10 Allowed avalanche Current vs avalanche pulsewidth, tav, assuming ΔΤ j = 25°C and Tstart = 150°C. 1 1.0E-06 1.0E-05 1.0E-04 1.0E-03 1.0E-02 1.0E-01 tav (sec) Fig 14. Typical Avalanche Current vs.Pulsewidth EAR , Avalanche Energy (mJ) 300 Notes on Repetitive Avalanche Curves , Figures 14, 15: (For further info, see AN-1005 at www.irf.com) 1. Avalanche failures assumption: Purely a thermal phenomenon and failure occurs at a temperature far in excess of Tjmax. This is validated for every part type. 2. Safe operation in Avalanche is allowed as long asTjmax is not exceeded. 3. Equation below based on circuit and waveforms shown in Figures 21a, 21b. 4. PD (ave) = Average power dissipation per single avalanche pulse. 5. BV = Rated breakdown voltage (1.3 factor accounts for voltage increase during avalanche). 6. Iav = Allowable avalanche current. 7. ΔT = Allowable rise in junction temperature, not to exceed Tjmax (assumed as 25°C in Figure 14, 15). tav = Average time in avalanche. D = Duty cycle in avalanche = tav ·f ZthJC(D, tav) = Transient thermal resistance, see Figures 13) TOP Single Pulse BOTTOM 1.0% Duty Cycle ID = 195A 250 200 150 100 50 0 25 50 75 100 125 150 175 Starting T J , Junction Temperature (°C) PD (ave) = 1/2 ( 1.3·BV·Iav) = DT/ ZthJC Iav = 2DT/ [1.3·BV·Zth] EAS (AR) = PD (ave)·tav Fig 15. Maximum Avalanche Energy vs. Temperature 6 www.irf.com AUIRFP4004 12 IF = 78A V R = 34V 4.5 10 4.0 3.5 3.0 IRR (A) VGS(th) , Gate threshold Voltage (V) 5.0 ID = 250μA ID = 1.0mA 2.5 TJ = 25°C TJ = 125°C 8 6 ID = 1.0A 2.0 4 1.5 2 1.0 -75 -50 -25 0 0 25 50 75 100 125 150 175 200 200 T J , Temperature ( °C ) 600 800 1000 Fig. 17 - Typical Recovery Current vs. dif/dt Fig 16. Threshold Voltage vs. Temperature 14 350 12 IF = 117A V R = 34V 10 TJ = 25°C TJ = 125°C Q RR (A) IRR (A) 400 diF /dt (A/μs) 8 300 IF = 78A V R = 34V 250 TJ = 25°C TJ = 125°C 200 6 150 4 100 2 50 0 100 200 300 400 500 600 0 200 diF /dt (A/μs) 400 600 800 1000 diF /dt (A/μs) Fig. 19 - Typical Stored Charge vs. dif/dt Fig. 18 - Typical Recovery Current vs. dif/dt Q RR (A) 400 350 IF = 117A V R = 34V 300 TJ = 25°C TJ = 125°C 250 200 150 100 0 100 200 300 400 500 600 diF /dt (A/μs) www.irf.com Fig. 20 - Typical Stored Charge vs. dif/dt 7 AUIRFP4004 D.U.T Driver Gate Drive - - - * D.U.T. ISD Waveform Reverse Recovery Current + RG • dv/dt controlled by RG • Driver same type as D.U.T. • I SD controlled by Duty Factor "D" • D.U.T. - Device Under Test P.W. Period VGS=10V Circuit Layout Considerations • Low Stray Inductance • Ground Plane • Low Leakage Inductance Current Transformer + D= Period P.W. + V DD + - Body Diode Forward Current di/dt D.U.T. VDS Waveform Diode Recovery dv/dt Re-Applied Voltage Body Diode VDD Forward Drop Inductor InductorCurrent Curent ISD Ripple ≤ 5% * VGS = 5V for Logic Level Devices Fig 20. Peak Diode Recovery dv/dt Test Circuit for N-Channel HEXFET® Power MOSFETs V(BR)DSS 15V D.U.T RG VGS 20V DRIVER L VDS tp + V - DD IAS tp A 0.01Ω I AS Fig 21a. Unclamped Inductive Test Circuit LD Fig 21b. Unclamped Inductive Waveforms VDS VDS 90% + VDD - 10% D.U.T VGS VGS Pulse Width < 1μs Duty Factor < 0.1% td(on) Fig 22a. Switching Time Test Circuit tr td(off) tf Fig 22b. Switching Time Waveforms Id Vds Vgs L DUT 0 VCC Vgs(th) 1K Qgs1 Qgs2 8 Fig 23a. Gate Charge Test Circuit Qgd Qgodr Fig 23b. Gate Charge Waveform www.irf.com AUIRFP4004 TO-247AC Package Outline Dimensions are shown in millimeters (inches) TO-247AC Part Marking Information Part Number AUFP4004 YWWA IR Logo XX or Date Code Y= Year WW= Work Week A= Automotive, Lead Free XX Lot Code Note: For the most current drawing please refer to IR website at http://www.irf.com/package/ www.irf.com 9 AUIRFP4004 Ordering Information Base part AUIRFP4004 10 Package Type TO-247 Standard Pack Complete Part Number Form Quantity Tube 25 AUIRFP4004 www.irf.com AUIRFP4004 IMPORTANT NOTICE Unless specifically designated for the automotive market, International Rectifier Corporation and its subsidiaries (IR) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or services without notice. 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