ETC HGT1S12N60C3DS9A

HGTP12N60C3D, HGT1S12N60C3DS
Data Sheet
January 2000
File Number
4261.1
24A, 600V, UFS Series N-Channel IGBT
with Anti-Parallel Hyperfast Diodes
Features
This family of MOS gated high voltage switching devices
combine the best features of MOSFETs and bipolar
transistors. The device has the high input impedance of a
MOSFET and the low on-state conduction loss of a bipolar
transistor. The much lower on-state voltage drop varies only
moderately between 25oC and 150oC. The IGBT used is the
development type TA49123. The diode used in anti-parallel
with the IGBT is the development type TA49188.
• Typical Fall Time at TJ = 150oC . . . . . . . . . . . . . . . . 210ns
• 24A, 600V at TC = 25oC
• Short Circuit Rating
• Low Conduction Loss
• Hyperfast Anti-Parallel Diode
Packaging
JEDEC TO-220AB
The IGBT is ideal for many high voltage switching
applications operating at moderate frequencies where low
conduction losses are essential.
E
C
G
COLLECTOR
(FLANGE)
Formerly Developmental Type TA49182.
Ordering Information
PART NUMBER
PACKAGE
BRAND
HGTP12N60C3D
TO-220AB
12N60C3D
HGT1S12N60C3DS
TO-263AB
12N60C3D
JEDEC TO-263AB
COLLECTOR
(FLANGE)
NOTE: When ordering, use the entire part number. Add the suffix 9A
to obtain the TO-263 variant in Tape and Reel, i.e.,
HGT1S12N60C3DS9A.
G
Symbol
E
C
G
E
INTERSIL CORPORATION IGBT PRODUCT IS COVERED BY ONE OR MORE OF THE FOLLOWING U.S. PATENTS
4,364,073
4,417,385
4,430,792
4,443,931
4,466,176
4,516,143
4,532,534
4,587,713
4,598,461
4,605,948
4,620,211
4,631,564
4,639,754
4,639,762
4,641,162
4,644,637
4,682,195
4,684,413
4,694,313
4,717,679
4,743,952
4,783,690
4,794,432
4,801,986
4,803,533
4,809,045
4,809,047
4,810,665
4,823,176
4,837,606
4,860,080
4,883,767
4,888,627
4,890,143
4,901,127
4,904,609
4,933,740
4,963,951
4,969,027
©2001 Fairchild Semiconductor Corporation
HGTP12N60C3D, HGT1S12N60C3DS Rev. A
HGTP12N60C3D, HGT1S12N60C3DS
Absolute Maximum Ratings
TC = 25oC, Unless Otherwise Specified
ALL TYPES
600
UNITS
V
24
12
A
A
Average Diode Forward Current at 110oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .I(AVG)
Collector Current Pulsed (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ICM
Gate to Emitter Voltage Continuous. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VGES
Gate to Emitter Voltage Pulsed . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .VGEM
Switching Safe Operating Area at TJ = 150oC (Figure 14) . . . . . . . . . . . . . . . . . . . . . . SSOA
12
96
±20
±30
24A at 600V
A
A
V
V
Power Dissipation Total at TC = 25oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . PD
Power Dissipation Derating TC > 25oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Operating and Storage Junction Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . TJ, TSTG
Maximum Lead Temperature for Soldering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TL
Short Circuit Withstand Time (Note 2) at VGE = 15V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .tSC
104
0.83
-40 to 150
260
4
W
W/oC
oC
oC
µs
Short Circuit Withstand Time (Note 2) at VGE = 10V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .tSC
13
µs
Collector to Emitter Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .BVCES
Collector Current Continuous
At TC = 25oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . IC25
At TC = 110oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . IC110
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTES:
1. Repetitive Rating: Pulse width limited by maximum junction temperature.
2. VCE(PK) = 360V, TJ = 125oC, RG = 25Ω.
Electrical Specifications
TC = 25oC, Unless Otherwise Specified
PARAMETER
SYMBOL
Collector to Emitter Breakdown Voltage
BVCES
Collector to Emitter Leakage Current
Collector to Emitter Saturation Voltage
ICES
VCE(SAT)
TEST CONDITIONS
IC = 250µA, VGE = 0V
VCE = BVCES
IC = IC110, VGE = 15V
IC = 15A, VGE = 15V
Gate to Emitter Threshold Voltage
Gate to Emitter Leakage Current
Switching SOA
VGE(TH)
MIN
TYP
MAX
UNITS
600
-
-
V
TC = 25oC
-
-
250
µA
TC = 150oC
-
-
2.0
mA
TC = 25oC
TC = 150oC
TC = 25oC
TC = 150oC
-
1.65
2.0
V
-
1.85
2.2
V
-
1.80
2.2
V
-
2.0
2.4
V
3.0
5.0
6.0
V
-
-
±100
nA
VCE(PK) = 480V
80
-
-
A
VCE(PK) = 600V
24
-
-
A
IC = IC110, VCE = 0.5 BVCES
-
7.6
-
V
IC = IC110,
VCE = 0.5 BVCES
VGE = 15V
-
48
55
nC
VGE = 20V
-
62
71
nC
-
28
-
ns
-
20
-
ns
-
270
400
ns
IC = 250µA, VCE = VGE
IGES
VGE = ±20V
SSOA
TJ = 150oC,
VGE = 15V,
RG = 25Ω,
L = 100µH
Gate to Emitter Plateau Voltage
On-State Gate Charge
Current Turn-On Delay Time
Current Rise Time
Current Turn-Off Delay Time
VGEP
Qg(ON)
td(ON)I
tri
td(OFF)I
TJ = 150oC,
ICE = IC110,
VCE(PK) = 0.8 BVCES,
VGE = 15V,
RG = 25Ω,
Current Fall Time
tfi
-
210
275
ns
Turn-On Energy
EON
-
380
-
µJ
Turn-Off Energy (Note 3)
EOFF
-
900
-
µJ
Diode Forward Voltage
VEC
-
1.7
2.1
V
©2001 Fairchild Semiconductor Corporation
L = 100µH
IEC = 12A
HGTP12N60C3D, HGT1S12N60C3DS Rev. A
HGTP12N60C3D, HGT1S12N60C3DS
Electrical Specifications
TC = 25oC, Unless Otherwise Specified (Continued)
PARAMETER
SYMBOL
Diode Reverse Recovery Time
TEST CONDITIONS
trr
Thermal Resistance
RθJC
MIN
TYP
MAX
UNITS
IEC = 12A, dIEC/dt = 200A/µs
-
32
40
ns
IEC = 1.0A, dIEC/dt = 200A/µs
-
23
30
ns
IGBT
-
-
1.2
oC/W
Diode
-
-
1.9
oC/W
NOTE:
3. Turn-Off Energy Loss (EOFF) is defined as the integral of the instantaneous power loss starting at the trailing edge of the input pulse, and ending
at the point where the collector current equals zero (ICE = 0A). This family of devices was tested per JEDEC Standard No. 24-1 Method for
Measurement of Power Device Turn-Off Switching Loss. This test method produces the true total Turn-Off Energy Loss. Turn-On losses include
losses due to diode recovery.
80
DUTY CYCLE <0.5%, VCE = 10V
70 PULSE DURATION = 250µs
60
50
TC = 150oC
40
TC = 25oC
30
TC = -40oC
20
10
0
4
6
8
10
12
14
ICE, COLLECTOR TO EMITTER CURRENT (A)
ICE, COLLECTOR TO EMITTER CURRENT (A)
Typical Performance Curves
PULSE DURATION = 250µs, DUTY CYCLE <0.5%, TC = 25oC
80
VGE = 15.0V
60
50
10.0V
40
30
9.0V
20
8.5V
8.0V
10
7.0V
0
0
80
PULSE DURATION = 250µs
DUTY CYCLE <0.5%, VGE = 10V
60
50
TC = -40oC
30
TC = 150oC
20
TC = 25oC
10
0
0
1
2
3
4
5
VCE, COLLECTOR TO EMITTER VOLTAGE (V)
FIGURE 3. COLLECTOR TO EMITTER ON-STATE VOLTAGE
©2001 Fairchild Semiconductor Corporation
4
6
8
10
FIGURE 2. SATURATION CHARACTERISTICS
ICE, COLLECTOR TO EMITTER CURRENT (A)
ICE, COLLECTOR TO EMITTER CURRENT (A)
FIGURE 1. TRANSFER CHARACTERISTICS
40
2
7.5V
VCE, COLLECTOR TO EMITTER VOLTAGE (V)
VGE, GATE TO EMITTER VOLTAGE (V)
70
12.0V
70
80
PULSE DURATION = 250µs
DUTY CYCLE <0.5%, VGE = 15V
70
TC = -40oC
60
TC = 25oC
50
40
TC = 150oC
30
20
10
0
0
1
2
3
4
5
VCE, COLLECTOR TO EMITTER VOLTAGE (V)
FIGURE 4. COLLECTOR TO EMITTER ON-STATE VOLTAGE
HGTP12N60C3D, HGT1S12N60C3DS Rev. A
HGTP12N60C3D, HGT1S12N60C3DS
VGE = 15V
20
15
10
5
0
25
50
75
100
125
150
20
140
VCE = 360V, RG = 25Ω, TJ = 125oC
120
ISC
15
100
80
10
60
5
10
11
TC , CASE TEMPERATURE (oC)
13
20
15
14
FIGURE 6. SHORT CIRCUIT WITHSTAND TIME
100
400
TJ = 150oC, RG = 25Ω, L = 100µH, VCE(PK) = 480V
td(OFF)I , TURN OFF DELAY TIME (ns)
td(ON)I , TURN ON DELAY TIME (ns)
12
VGE , GATE TO EMITTER VOLTAGE (V)
FIGURE 5. MAXIMUM DC COLLECTOR CURRENT vs CASE
TEMPERATURE
50
VGE = 10V
30
20
VGE = 15V
TJ = 150oC, RG = 25Ω, L = 100µH, VCE(PK) = 480V
300
VGE = 15V
VGE = 10V
200
100
10
5
10
15
20
25
30
5
ICE , COLLECTOR TO EMITTER CURRENT (A)
15
20
25
30
FIGURE 8. TURN OFF DELAY TIME vs COLLECTOR TO
EMITTER CURRENT
200
300
TJ = 150oC, RG = 25Ω, L = 100µH, VCE(PK) = 480V
100
10
ICE , COLLECTOR TO EMITTER CURRENT (A)
FIGURE 7. TURN ON DELAY TIME vs COLLECTOR TO
EMITTER CURRENT
TJ = 150oC, RG = 25Ω, L = 100µH, VCE(PK) = 480V
VGE = 10V
VGE = 15V
10
tfi , FALL TIME (ns)
tri , TURN ON RISE TIME (ns)
40
tSC
ISC, PEAK SHORT CIRCUIT CURRENT (A)
ICE , DC COLLECTOR CURRENT (A)
25
(Continued)
tSC , SHORT CIRCUIT WITHSTAND TIME (µs)
Typical Performance Curves
200
VGE = 10V OR 15V
100
90
5
5
10
15
20
25
ICE , COLLECTOR TO EMITTER CURRENT (A)
FIGURE 9. TURN ON RISE TIME vs COLLECTOR TO
EMITTER CURRENT
©2001 Fairchild Semiconductor Corporation
30
80
5
10
15
20
25
30
ICE , COLLECTOR TO EMITTER CURRENT (A)
FIGURE 10. TURN OFF FALL TIME vs COLLECTOR TO
EMITTER CURRENT
HGTP12N60C3D, HGT1S12N60C3DS Rev. A
HGTP12N60C3D, HGT1S12N60C3DS
Typical Performance Curves
(Continued)
3.0
TJ = 150oC, RG = 25Ω, L = 100µH, VCE(PK) = 480V
EOFF , TURN OFF ENERGY LOSS (mJ)
EON , TURN ON ENERGY LOSS (mJ)
2.0
1.5
VGE = 10V
1.0
VGE = 15V
0.5
0
5
10
15
20
25
TJ = 150oC, RG = 25Ω, L = 100µH, VCE(PK) = 480V
2.5
2.0
1.5
VGE = 10V or 15V
1.0
0.5
0
30
5
ICE , COLLECTOR TO EMITTER CURRENT (A)
VGE = 15V
fMAX1 = 0.05/(tD(OFF)I + tD(ON)I)
fMAX2 = (PD - PC)/(EON + EOFF)
PD = ALLOWABLE DISSIPATION
PC = CONDUCTION DISSIPATION
(DUTY FACTOR = 50%)
RθJC = 1.2oC/W
1
5
10
20
30
ICE, COLLECTOR TO EMITTER CURRENT (A)
fMAX , OPERATING FREQUENCY (kHz)
VGE = 10V
10
100
30
80
60
LIMITED BY
CIRCUIT
40
20
0
0
100
200
300
400
500
600
VCE(PK), COLLECTOR TO EMITTER VOLTAGE (V)
FIGURE 13. OPERATING FREQUENCY vs COLLECTOR TO
EMITTER CURRENT
FIGURE 14. SWITCHING SAFE OPERATING AREA
15
FREQUENCY = 1MHz
2000
CIES
1500
1000
500
COES
0
VGE, GATE TO EMITTER VOLTAGE (V)
2500
C, CAPACITANCE (pF)
25
TJ = 150oC, VGE = 15V, RG = 25Ω, L = 100µH
ICE, COLLECTOR TO EMITTER CURRENT (A)
CRES
20
FIGURE 12. TURN OFF ENERGY LOSS vs COLLECTOR TO
EMITTER CURRENT
TJ = 150oC, TC = 75oC
RG = 25Ω, L = 100µH
100
15
ICE , COLLECTOR TO EMITTER CURRENT (A)
FIGURE 11. TURN ON ENERGY LOSS vs COLLECTOR TO
EMITTER CURRENT
200
10
IG REF = 1.276mA, RL = 50Ω, TC = 25oC
12
VCE = 600V
9
VCE = 400V
6
VCE = 200V
3
0
0
5
10
15
20
VCE, COLLECTOR TO EMITTER VOLTAGE (V)
FIGURE 15. CAPACITANCE vs COLLECTOR TO EMITTER
VOLTAGE
©2001 Fairchild Semiconductor Corporation
25
0
10
20
30
40
50
60
Qg , GATE CHARGE (nC)
FIGURE 16. GATE CHARGE WAVEFORMS
HGTP12N60C3D, HGT1S12N60C3DS Rev. A
HGTP12N60C3D, HGT1S12N60C3DS
ZθJC , NORMALIZED THERMAL RESPONSE
Typical Performance Curves
(Continued)
100
0.5
0.2
0.1
10-1
0.05
t1
0.02
0.01
PD
DUTY FACTOR, D = t1 / t2
SINGLE PULSE
10-2 -5
10
t2
PEAK TJ = PD x ZθJC x RθJC + TC
10-4
10-3
10-2
10-1
100
101
t1 , RECTANGULAR PULSE DURATION (s)
FIGURE 17. IGBT NORMALIZED TRANSIENT THERMAL IMPEDANCE, JUNCTION TO CASE
35
TC = 25oC, dIEC/dt = 200A/ms
30
40
tR , RECOVERY TIMES (ns)
IEC , FORWARD CURRENT (A)
50
25oC
30
100oC
20
150oC
10
trr
25
ta
20
15
tb
10
5
0
0
0.5
1.0
1.5
2.0
2.5
0
3.0
0
5
VEC , FORWARD VOLTAGE (V)
10
15
20
IEC , FORWARD CURRENT (A)
FIGURE 18. DIODE FORWARD CURRENT vs FORWARD
VOLTAGE DROP
FIGURE 19. RECOVERY TIMES vs FORWARD CURRENT
Test Circuit and Waveform
HGTP12N60C3D
90%
10%
VGE
EOFF
L = 100µH
EON
VCE
RG = 25Ω
90%
+
-
ICE
VDD = 480V
10%
td(OFF)I
tfi
tri
td(ON)I
FIGURE 20. INDUCTIVE SWITCHING TEST CIRCUIT
©2001 Fairchild Semiconductor Corporation
FIGURE 21. SWITCHING TEST WAVEFORMS
HGTP12N60C3D, HGT1S12N60C3DS Rev. A
HGTP12N60C3D, HGT1S12N60C3DS
Handling Precautions for IGBTs
Operating Frequency Information
Insulated Gate Bipolar Transistors are susceptible to
gate-insulation damage by the electrostatic discharge of
energy through the devices. When handling these devices,
care should be exercised to assure that the static charge
built in the handler’s body capacitance is not discharged
through the device. With proper handling and application
procedures, however, IGBTs are currently being extensively
used in production by numerous equipment manufacturers in
military, industrial and consumer applications, with virtually
no damage problems due to electrostatic discharge. IGBTs
can be handled safely if the following basic precautions are
taken:
Operating frequency information for a typical device (Figure 13)
is presented as a guide for estimating device performance
for a specific application. Other typical frequency vs collector
current (ICE) plots are possible using the information shown
for a typical unit in Figures 4, 7, 8, 11 and 12. The operating
frequency plot (Figure 13) of a typical device shows fMAX1 or
fMAX2 whichever is smaller at each point. The information is
based on measurements of a typical device and is bounded
by the maximum rated junction temperature.
1. Prior to assembly into a circuit, all leads should be kept
shorted together either by the use of metal shorting
springs or by the insertion into conductive material such
as “ECCOSORBD LD26” or equivalent.
2. When devices are removed by hand from their carriers,
the hand being used should be grounded by any suitable
means, for example, with a metallic wristband.
3. Tips of soldering irons should be grounded.
4. Devices should never be inserted into or removed from
circuits with power on.
5. Gate Voltage Rating - Never exceed the gate-voltage
rating of VGEM. Exceeding the rated VGE can result in
permanent damage to the oxide layer in the gate region.
6. Gate Termination - The gates of these devices are
essentially capacitors. Circuits that leave the gate
open-circuited or floating should be avoided. These
conditions can result in turn-on of the device due to voltage
buildup on the input capacitor due to leakage currents or
pickup.
fMAX1 is defined by fMAX1 = 0.05/(tD(OFF)I + tD(ON)I).
Deadtime (the denominator) has been arbitrarily held to 10%
of the on-state time for a 50% duty factor. Other definitions
are possible. tD(OFF)I and tD(ON)I are defined in Figure 21.
Device turn-off delay can establish an additional frequency
limiting condition for an application other than TJM. tD(OFF)I
is important when controlling output ripple under a lightly
loaded condition.
fMAX2 is defined by fMAX2 = (PD - PC)/(EOFF + EON). The
allowable dissipation (PD) is defined by PD = (TJM - TC)/RθJC.
The sum of device switching and conduction losses must not
exceed PD . A 50% duty factor was used (Figure 13) and the
conduction losses (PC) are approximated by
PC = (VCE x ICE)/2.
EON and EOFF are defined in the switching waveforms
shown in Figure 21. EON is the integral of the instantaneous
power loss (ICE x VCE) during turn-on and EOFF is the
integral of the instantaneous power loss during turn-off. All
tail losses are included in the calculation for EOFF; i.e., the
collector current equals zero (ICE = 0).
7. Gate Protection - These devices do not have an internal
monolithic Zener Diode from gate to emitter. If gate
protection is required, an external Zener is
recommended.
©2001 Fairchild Semiconductor Corporation
HGTP12N60C3D, HGT1S12N60C3DS Rev. A
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Definition of Terms
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Definition
Advance Information
Formative or
In Design
This datasheet contains the design specifications for
product development. Specifications may change in
any manner without notice.
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First Production
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supplementary data will be published at a later date.
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changes at any time without notice in order to improve
design.
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Rev. H