ONSEMI NTR3161N

NTR3161N
Power MOSFET
20 V, 3.3 A, Single N−Channel, SOT−23
Features
•
•
•
•
•
Low RDS(on)
Low Gate Charge
Low Threshold Voltage
Halide−Free
This is a Pb−Free Device
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V(BR)DSS
Applications
20 V
• DC−DC Conversion
• Battery Management
• Load/Power Switch
50 mW @ 4.5 V
3.3 A
63 mW @ 2.5 V
3.0 A
87 mW @ 1.8 V
2.5 A
D
Symbol
Value
Unit
Drain−to−Source Voltage
VDSS
20
V
Gate−to−Source Voltage
VGS
±8
V
Parameter
t ≤ 30 s
t ≤ 10 s
Power Dissipation
(Note 1)
ID MAX
SIMPLIFIED SCHEMATIC − N−CHANNEL
MAXIMUM RATINGS (TJ = 25°C unless otherwise noted)
Continuous Drain
Current (Note 1)
RDS(on) MAX
Steady
State
TA = 25°C
TA = 85°C
ID
TA = 25°C
A
W
PD
3
1.25
IDM
6.4
A
TJ,
Tstg
−55 to
150
°C
Source Current (Body Diode)
IS
0.65
A
Lead Temperature for Soldering Purposes
(1/8” from case for 10 s)
TL
tp = 10 ms
Operating Junction and Storage Temperature
S
4.0
t ≤ 10 s
Pulsed Drain Current
2.3
0.82
TA = 25°C
G
3.3
260
3
Drain
1
2
SOT−23
CASE 318
STYLE 21
°C
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
MARKING DIAGRAM/
PIN ASSIGNMENT
TRCMG
G
1
1
Gate
2
Source
TRC
= Specific Device Code
M
= Date Code
G
= Pb−Free Package
(Note: Microdot may be in either location)
THERMAL RESISTANCE RATINGS
Parameter
Symbol
Max
Unit
Junction−to−Ambient − Steady State (Note 1)
RqJA
260
°C/W
Junction−to−Ambient − t ≤ 30 s
RqJA
153
°C/W
Junction−to−Ambient − t < 10 s (Note 1)
RqJA
100
°C/W
1. Surface−mounted on FR4 board using 1 in sq pad size (Cu area = 1.127 in sq
[2 oz] including traces).
© Semiconductor Components Industries, LLC, 2008
June, 2008 − Rev. 0
1
ORDERING INFORMATION
Device
NTR3161NT1G
Package
Shipping†
SOT−23
(Pb−Free)
3000/Tape & Reel
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.
Publication Order Number:
NTR3161N/D
NTR3161N
ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise noted)
Parameter
Symbol
Test Conditions
Min
Typ
Max
Units
Drain−to−Source Breakdown Voltage
V(BR)DSS
VGS = 0 V, ID = 250 mA
20
Drain−to−Source Breakdown Voltage
Temperature Coefficient
V(BR)DSS
/TJ
ID = 250 mA, Reference to 25°C
Zero Gate Voltage Drain Current
IDSS
VGS = 0 V, VDS = 16 V, TJ = 25°C
VGS = 0 V, VDS = 16 V, TJ = 125°C
1.0
10
mA
Gate−to−Source Leakage Current
IGSS
VDS = 0 V, VGS = "8 V
100
nA
Gate Threshold Voltage
VGS(TH)
VGS = VDS, ID = 250 mA
1.0
V
Negative Threshold Temperature
Coefficient
VGS(TH)
/TJ
Drain−to−Source On−Resistance
RDS(on)
OFF CHARACTERISTICS
V
16.2
mV/°C
ON CHARACTERISTICS (Note 2)
Forward Transconductance
0.4
0.6
2.4
gFS
mV/°C
VGS = 4.5 V, ID = 3.3 A
38
50
mW
VGS = 2.5 V, ID = 3.0 A
44
63
VGS = 1.8 V, ID = 2.5 A
52
87
VDS = 5.0 V, ID = 3.3 A
10.5
S
540
pF
CHARGES, CAPACITANCES AND GATE RESISTANCE
Ciss
Input Capacitance
Output Capacitance
Coss
Reverse Transfer Capacitance
Crss
Total Gate Charge
QG(TOT)
Threshold Gate Charge
QG(TH)
VGS = 0 V, f = 1.0 MHz,
VDS = 10 V
80
62
nC
7.3
VGS = 4.5 V, VDS = 10 V,
ID = 3.3 A
0.4
Gate−to−Source Charge
QGS
Gate−to−Drain Charge
QGD
1.6
RG
2.4
W
td(on)
6.7
ns
Gate Resistance
0.8
SWITCHING CHARACTERISTICS (Note 3)
Turn−On Delay Time
Rise Time
Turn−Off Delay Time
Fall Time
tr
td(off)
VGS = 4.5 V, VDD = 10 V,
ID = 3.3 A, RG = 6 W
tf
11.6
18.6
23.2
DRAIN−SOURCE DIODE CHARACTERISTICS
Forward Diode Voltage
VSD
Reverse Recovery Time
tRR
Charge Time
ta
Discharge Time
tb
Reverse Recovery Charge
VGS = 0 V, IS = 1.0 A, TJ = 25°C
0.65
14.7
VGS = 0 V, IS = 1.0 A,
dISD/dt = 100 A/ms
QRR
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2
V
ns
5.2
9.5
3.3
2. Pulse Test: Pulse Width v 300 ms, Duty Cycle v 2%.
3. Switching characteristics are independent of operating junction temperatures.
1.0
nC
NTR3161N
VGS = 1.3 V
VGS = 1.4 V
3.0 V
4.5 V
3.0
2.5
7.0
TJ = 25°C
ID, DRAIN CURRENT (AMPS)
ID, DRAIN CURRENT (AMPS)
3.5
VGS = 1.2 V
2.0
VGS = 1.1 V
1.5
1.0
VGS = 1.0 V
0.5
VGS = 0.9 V
0
0.0
0.5
1.0
1.5
2.0
2.5
VDS ≥ 10 V
6.0
5.0
4.0
3.0
2.0
1.0
TJ = −55°C
0
0.4
3.0
0.6
0.10
ID = 3.3 A
TJ = 25°C
0.08
0.06
0.04
2
4
3
5
6
7
8
0.08
TJ = 25°C
0.07
0.06
VGS = 1.8 V
0.05
VGS = 2.5 V
0.04
VGS = 4.5 V
0.03
0.02
0.01
0
1
2
3
4
6
5
7
Figure 3. On−Resistance versus
Gate−to−Source Voltage
Figure 4. On−Resistance versus Drain
Current and Gate Voltage
10000
ID = 3.3 A
VGS = 4.5 V
VGS = 0 V
IDSS, LEAKAGE (nA)
RDS(on), DRAIN−TO−SOURCE
RESISTANCE (NORMALIZED)
1.6
1.4
ID, DRAIN CURRENT (AMPS)
1.2
1.0
0.8
0.6
−50
1.2
VGS, GATE−TO−SOURCE VOLTAGE (VOLTS)
1.6
1.4
1.0
Figure 2. Transfer Characteristics
RDS(on), DRAIN−TO−SOURCE RESISTANCE (W)
RDS(on), DRAIN−TO−SOURCE RESISTANCE (W)
Figure 1. On−Region Characteristics
1
0.8
VGS, GATE−TO−SOURCE VOLTAGE (VOLTS)
VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS)
0.02
TJ = 25°C
TJ = 125°C
−25
0
25
50
75
100
125
TJ = 150°C
1000
TJ = 125°C
100
150
2
TJ, JUNCTION TEMPERATURE (°C)
4
6
8
10
12
14
16
18
VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS)
Figure 5. On−Resistance Variation with
Temperature
Figure 6. Drain−to−Source Leakage
Current versus Voltage
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3
20
4.5
1000
VGS = 0 V
TJ = 25°C
900
800
C, CAPACITANCE (pF)
VGS, GATE−TO−SOURCE VOLTAGE (VOLTS)
NTR3161N
QT
4.0
3.5
700
600
VGS
3.0
Ciss
2.5
500
2.0
400
QGD
QGS
1.5
300
1.0
Coss
200
100
Crss
0
0
2
TJ = 25°C
ID = 3.3 A
0.5
6
4
8
10
12
14
16
18
20
0
0
1
Figure 7. Capacitance Variation
4
5
6
7
8
IS, SOURCE CURRENT (AMPS)
4
VDD = 10 V
ID = 3.3 A
VGS = 4.5 V
t, TIME (ns)
3
Figure 8. Gate−to−Source and
Drain−to−Source Voltage versus Total
Charge
1000
td(off)
100
tf
tr
10
1
2
QG, TOTAL GATE CHARGE (nC)
DRAIN−TO−SOURCE VOLTAGE (VOLTS)
td(on)
VGS = 0 V
TJ = 25°C
3
2
1
0
1
10
0
100
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
VSD, SOURCE−TO−DRAIN VOLTAGE (VOLTS)
RG, GATE RESISTANCE (W)
Figure 9. Resistive Switching Time Variation
versus Gate Resistance
Figure 10. Diode Forward Voltage versus
Current
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4
0.9
NTR3161N
PACKAGE DIMENSIONS
SOT−23 (TO−236)
CASE 318−08
ISSUE AN
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. MAXIMUM LEAD THICKNESS INCLUDES LEAD
FINISH THICKNESS. MINIMUM LEAD
THICKNESS IS THE MINIMUM THICKNESS OF
BASE MATERIAL.
4. 318−01 THRU −07 AND −09 OBSOLETE, NEW
STANDARD 318−08.
D
SEE VIEW C
3
HE
E
c
1
DIM
A
A1
b
c
D
E
e
L
L1
HE
2
e
b
0.25
q
A
L
A1
MIN
0.89
0.01
0.37
0.09
2.80
1.20
1.78
0.10
0.35
2.10
MILLIMETERS
NOM
MAX
1.00
1.11
0.06
0.10
0.44
0.50
0.13
0.18
2.90
3.04
1.30
1.40
1.90
2.04
0.20
0.30
0.54
0.69
2.40
2.64
MIN
0.035
0.001
0.015
0.003
0.110
0.047
0.070
0.004
0.014
0.083
INCHES
NOM
0.040
0.002
0.018
0.005
0.114
0.051
0.075
0.008
0.021
0.094
MAX
0.044
0.004
0.020
0.007
0.120
0.055
0.081
0.012
0.029
0.104
STYLE 21:
PIN 1. GATE
2. SOURCE
3. DRAIN
L1
VIEW C
SOLDERING FOOTPRINT
0.95
0.037
0.95
0.037
2.0
0.079
0.9
0.035
SCALE 10:1
0.8
0.031
mm Ǔ
ǒinches
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
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to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
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“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
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NTR3161N/D