ONSEMI NTR1P02LT1

NTR1P02LT1
Power MOSFET
−20 V, −1.3 A, P−Channel
SOT−23 Package
These miniature surface mount MOSFETs low RDS(on) assure
minimal power loss and conserve energy, making these devices ideal
for use in space sensitive power management circuitry. Typical
applications are DC−DC converters and power management in
portable and battery−powered products such as computers, printers,
PCMCIA cards, cellular and cordless telephones.
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V(BR)DSS
RDS(on) Max
ID Max
−20 V
220 mW
−1.3 A
P−Channel
D
Features
• Low RDS(on) Provides Higher Efficiency and Extends Battery Life
• Miniature SOT−23 Surface Mount Package Saves Board Space
• Pb−Free Packages are Available
G
MAXIMUM RATINGS (TJ = 25°C unless otherwise noted)
Symbol
Value
Unit
Drain−to−Source Voltage
VDSS
−20
V
Gate−to−Source Voltage − Continuous
VGS
±12
V
Drain Current
− Continuous @ TA = 25°C
− Pulsed Drain Current (tp ≤ 10 ms)
ID
IDM
−1.3
−4.0
A
A
PD
400
mW
Operating and Storage Temperature Range
TJ, Tstg
− 55 to
150
°C
Thermal Resistance − Junction−to−Ambient
RqJA
300
°C/W
TL
260
°C
Rating
Total Power Dissipation @ TA = 25°C
Maximum Lead Temperature for Soldering
Purposes, (1/8″ from case for 10 s)
S
3
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
MARKING DIAGRAM &
PIN ASSIGNMENT
Drain
3
1
2
SOT−23
CASE 318
STYLE 21
P02 M G
G
1
Gate
2
Source
P02
= Specific Device Code
M
= Date Code*
G
= Pb−Free Package
(Note: Microdot may be in either location)
*Date Code orientation may vary depending
upon manufacturing location.
ORDERING INFORMATION
Device
NTR1P02LT1
NTR1P02LT1G
NTR1P02LT3
NTR1P02LT3G
Package
Shipping †
SOT−23
3000 Tape & Reel
SOT−23
(Pb−Free)
3000 Tape & Reel
SOT−23
10,000 Tape & Reel
SOT−23
(Pb−Free)
10,000 Tape & Reel
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
© Semiconductor Components Industries, LLC, 2006
May, 2006 − Rev. 8
1
Publication Order Number:
NTR1P02LT1/D
NTR1P02LT1
ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise noted)
Characteristic
Symbol
Min
V(BR)DSS
−20
Typ
Max
Unit
OFF CHARACTERISTICS
Drain−to−Source Breakdown Voltage
(VGS = 0 V, ID = −10 mA)
Zero Gate Voltage Drain Current
(VDS = −16 V, VGS = 0 V)
(VDS = −16 V, VGS = 0 V, TJ = 125°C)
IDSS
Gate−Body Leakage Current (VGS = ± 12 V, VDS = 0 V)
IGSS
V
−1.0
−10
mA
±100
nA
−1.0
−1.25
V
0.135
0.190
0.22
0.35
ON CHARACTERISTICS (Note 1)
Gate Threshold Voltage
(VDS = VGS, ID = −250 mA)
VGS(th)
Static Drain−to−Source On−Resistance
(VGS = −4.5 V, ID = −0.75 A)
(VGS = −2.5 V, ID = −0.5 A)
rDS(on)
−0.7
W
DYNAMIC CHARACTERISTICS
Input Capacitance
(VDS = −5.0 V)
Ciss
225
Output Capacitance
(VDS = −5.0 V)
Coss
130
Transfer Capacitance
(VDG = −5.0 V)
Crss
55
td(on)
7.0
tr
15
td(off)
18
tf
20
QT
5500
pF
SWITCHING CHARACTERISTICS (Note 2)
Turn−On Delay Time
Rise Time
Turn−Off Delay Time
(VDD = −5.0 V, ID = −1.0 A,
RL = 5.0 W, RG = 6.0 W)
Fall Time
Total Gate Charge
(VDS = −16 V, ID = −1.5 A,
VGS = −4.0 V)
ns
pC
SOURCE−DRAIN DIODE CHARACTERISTICS
IS
−0.6
Pulsed Current
Continuous Current
ISM
−0.75
Forward Voltage (Note 2) (VGS = 0 V, IS = −0.6 A)
VSD
−1.0
Reverse Recovery Time
trr
16
ta
11
tb
5.5
QRR
0.0085
(IS = −1.0 A, VGS = 0 V,
dIS/dt = 100 A/ms)
Reverse Recovery Stored Charge
1. Pulse Test: Pulse Width ≤ 300 ms, Duty Cycle ≤ 2%.
2. Switching characteristics are independent of operating junction temperature.
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2
A
V
ns
mC
NTR1P02LT1
1.4
VGS = −3 V
−2 V
−2.8 V
2
−ID, DRAIN CURRENT (AMPS)
−ID, DRAIN CURRENT (AMPS)
2.5
TJ = 25°C
−2.6 V
−1.8 V
−2.4 V
1.5
−2.2 V
1
−1.6 V
0.5
0
−1.2 V
0
−1.4 V
1
2
3
4
−VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS)
1
0.8
TJ = 25°C
0.6
0.4
TJ = 100°C
0.2
0
5
VDS ≥ −10 V
1.2
TJ = −55°C
1
1.2
1.4
1.6
1.8
2
2.2
2.4
−VGS, GATE−TO−SOURCE VOLTAGE (VOLTS)
Figure 2. Transfer Characteristics
RDS(on), DRAIN−TO−SOURCE RESISTANCE (W)
RDS(on), DRAIN−TO−SOURCE RESISTANCE (W)
Figure 1. On−Region Characteristics
0.04
ID = −10 A
TJ = 25°C
0.03
0.02
0.01
0
0
2
4
6
8
10
−VGS, GATE−TO−SOURCE VOLTAGE (VOLTS)
0.3
TJ = 25°C
VGS = −2.5 V
0.25
0.2
TJ = 100°C
0.15
TJ = 25°C
0.1
TJ = −55°C
0.05
0
0.2
0.4
0.6
0.7
0.8
0.9
Figure 4. On−Resistance versus Drain Current
and Gate Voltage
1000
0.3
VGS = 0 V
−IDSS, LEAKAGE (nA)
ID = −0.5 A
VGS = −2.5 V
0.2
0.1
TJ = 125°C
100
10
TJ = 100°C
1
0.1
0
−50
0.5
−ID, DRAIN CURRENT (AMPS)
Figure 3. On−Resistance versus
Gate−to−Source Voltage
RDS(on), DRAIN−TO−SOURCE RESISTANCE
(NORMALIZED)
0.3
−25
0
25
50
75
100
125
150
0.01
TJ = 25°C
4
8
12
16
TJ, JUNCTION TEMPERATURE (°C)
−VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS)
Figure 5. On−Resistance Variation with
Temperature
Figure 6. Drain−to−Source Leakage Current
versus Voltage
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3
1
5000
C, CAPACITANCE (pF)
VGS = 0V
TJ = 25°C
VDS = 0V
4500
4000
3500
3000
Ciss
2500
2000
1500
Coss
1000
Crss
500
0
15
5
5
10
15
20
25
−VGS
−VDS
GATE−TO−SOURCE OR DRAIN−TO−SOURCE VOLTAGE (VOLTS)
10
0
−VGS, GATE−TO−SOURCE VOLTAGE (VOLTS)
NTR1P02LT1
6
28
4
12
8
0
0
1
2
3
4
4
0
QG, TOTAL GATE CHARGE (nC)
−IS, SOURCE CURRENT (AMPS)
t, TIME (ns)
tf
td(off)
td(on)
1
Q2
VDS = −16 V
ID = −1.5 A
TJ = 25°C
0.8
tr
1
Q1
2
Figure 8. Gate−to−Source and
Drain−to−Source Voltage versus Total Charge
VDD = −16 V
ID = −1 A
10
20
16
Figure 7. Capacitance Variation
100
24
QT
10
VGS = 0 V
TJ = 25°C
0.6
0.4
0.2
0
1.00E−01
100
3.00E−01
5.00E−01
7.00E−01
9.00E−01
−VSD, SOURCE−TO−DRAIN VOLTAGE (VOLTS)
RG, GATE RESISTANCE (W)
Figure 9. Resistive Switching Time Variation
versus Gate Resistance
Figure 10. Diode Forward Voltage versus
Current
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4
NTR1P02LT1
PACKAGE DIMENSIONS
SOT−23 (TO−236)
CASE 318−08
ISSUE AN
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. MAXIMUM LEAD THICKNESS INCLUDES LEAD
FINISH THICKNESS. MINIMUM LEAD
THICKNESS IS THE MINIMUM THICKNESS OF
BASE MATERIAL.
4. 318−01 THRU −07 AND −09 OBSOLETE, NEW
STANDARD 318−08.
D
SEE VIEW C
3
HE
E
1
c
2
e
b
DIM
A
A1
b
c
D
E
e
L
L1
HE
0.25
q
A
L
A1
MIN
0.89
0.01
0.37
0.09
2.80
1.20
1.78
0.10
0.35
2.10
MILLIMETERS
NOM
MAX
1.00
1.11
0.06
0.10
0.44
0.50
0.13
0.18
2.90
3.04
1.30
1.40
1.90
2.04
0.20
0.30
0.54
0.69
2.40
2.64
MIN
0.035
0.001
0.015
0.003
0.110
0.047
0.070
0.004
0.014
0.083
INCHES
NOM
0.040
0.002
0.018
0.005
0.114
0.051
0.075
0.008
0.021
0.094
MAX
0.044
0.004
0.020
0.007
0.120
0.055
0.081
0.012
0.029
0.104
STYLE 21:
PIN 1. GATE
2. SOURCE
3. DRAIN
L1
VIEW C
SOLDERING FOOTPRINT*
0.95
0.037
0.95
0.037
2.0
0.079
0.9
0.035
SCALE 10:1
0.8
0.031
mm Ǔ
ǒinches
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
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PUBLICATION ORDERING INFORMATION
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5
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For additional information, please contact your local
Sales Representative
NTR1P02LT1/D