2N5018 SERIES SINGLE P-CHANNEL JFET SWITCH FEATURES DIRECT REPLACEMENT FOR SILICONIX 2N5018 ZERO OFFSET VOLTAGE 75Ω LOW ON RESISTANCE TO-18 TOP VIEW RATINGS1 ABSOLUTE MAXIMUM @ 25 °C (unless otherwise stated) S Maximum Temperatures Storage Temperature -55 to 150°C Junction Operating Temperature -55 to 150°C Maximum Power Dissipation Continuous Power Dissipation3 500mW G and Case Maximum Currents Gate Current -10mA D Maximum Voltages Gate to Drain 30V Gate to Source 30V STATIC ELECTRICAL CHARACERISTICS @25ºC (unless otherwise stated) SYM. CHARACTERISTIC BVGSS Gate to Source Breakdown Voltage VGS(off) Gate to Source Cutoff Voltage VDS(on) 2N5018 MIN Drain to Source Saturation Current2 IGSS Gate Leakage Current ID(off) Drain Cutoff Current IDGO Drain Reverse Current Drain to Source On Resistance Linear Integrated Systems MAX 30 2N5019 MIN MAX UNITS 30 10 5 V -0.5 -10 • CONDITIONS IG = 1µA, VDS = 0V -0.5 Drain to Source On Voltage IDSS rDS(on) TYP -5 2 -10 -10 VGS = 0V, ID = -6mA VGS = 0V, ID = -3mA mA 2 VDS = -15V, ID = -1µA nA VDS = -20V, VGS = 0V VGS = 15V, VDS = 0V VDS = -15V, VGS = 12V -10 µA VDS = -15V, VGS = 7V -2 -2 nA VDG = -15V, IS = 0A 75 150 Ω ID = -1mA, VGS = 0V 4042 Clipper Court • Fremont, CA 94538 • Tel: 510 490-9160 • Fax: 510 353-0261 Doc 201153 05/14/2014 Rev#A4 ECN# 2N5018 DYNAMIC ELECTRICAL CHARACTERISTICS @25ºC (unless otherwise stated) TYP 2N5018 2N5019 SYM. CHARACTERISTIC rds(on) Drain to Source On Resistance 75 150 Ciss Input Capacitance 45 45 Crss Reverse Transfer Capacitance MIN MAX MIN UNITS MAX ID = -100µA,VGS = 0V f = 1kHz VDS = -15V, VGS = 0V f = 1MHz VDS = 0V, VGS = 12V f = 1MHz VDS = 0V, VGS = 7V f = 1MHz Ω 10 pF 10 SWITCHING CHARACTERISTICS (max) SYM. td(on) tr td(off) tf CHARACTERISTIC Turn On Time Turn Off Time CONDITIONS SWITCHING CIRCUIT CHARACTERISTICS 2N5018 2N5019 15 20 UNITS SYM. 2N5018 2N5019 15 VDD -6V -6V 75 VGG 12V 8V 15 25 50 100 ns RL 910Ω 1.8KΩ RG 220Ω 390Ω ID(on) -6mA -3mA VGS(H) 0V 0V VGS(L) 12V 7V SWITCHING TEST CIRCUIT VGG 0.210 0.170 VGS(H) VGS(L) 51 VDD RL 1.2k 0.1µF RG 7.5k 1.2k Sampling Scope 51 51 Note: All Dimensions in inches NOTES 1. 2. 3. Absolute maximum ratings are limiting values above which serviceability may be impaired. Pulse test: PW ≤ 300µs, Duty Cycle ≤ 3% Derate 3mW/°C above 25°C. Information furnished by Linear Integrated Systems is believed to be accurate and reliable. However, no responsibility is assumed for its use; nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Linear Integrated Systems. Linear Integrated Systems (LIS) is a 25-year-old, third-generation precision semiconductor company providing high-quality discrete components. Expertise brought to LIS is based on processes and products developed at Amelco, Union Carbide, Intersil and Micro Power Systems by company President John H. Hall. Hall, a protégé of Silicon Valley legend Dr. Jean Hoerni, was the director of IC Development at Union Carbide, Co-Founder and Vice President of R&D at Intersil, and Founder/President of Micro Power Systems. Linear Integrated Systems • 4042 Clipper Court • Fremont, CA 94538 • Tel: 510 490-9160 • Fax: 510 353-0261 Doc 201153 05/14/2014 Rev#A4 ECN# 2N5018