LatticeECP2M PCI Express Solutions Board User’s Guide September 2008 Revision: EB33_01.0 LatticeECP2M PCI Express Solutions Board User’s Guide Lattice Semiconductor Introduction As PCI Express applications have emerged, the LatticeECP2M™ FPGA family has become a well-suited solution for many system designs. The features of the LatticeECP2M PCI Express Solutions Board can assist engineers with rapid-prototyping and testing their designs. The board is an enhanced form-factor of the PCI Express add-in card specification. It allows for full x1 form-factor compliance and x4 is available for demonstration purposes with some non-standard form-factor issues. The flexibility to use the same board to demonstrate both x1 and x4 configurations is accomplished by simply changing the mounting hardware. The board has several debugging and analyzing features for complete evaluation of the LatticeECP2M device. This guide is intended to be referenced in conjunction with evaluation design tutorials to demonstrate the LatticeECP2M FPGA. This user’s guide describes the LatticeECP2M PCI Express Solutions Board featuring the LatticeECP2M LFE2M50-FF672 FPGA. The stand-alone evaluation board provides a functional platform for development and rapid prototyping of applications that require high-speed SERDES interfaces to demonstrate PCI Express capabilities using an add-on card form-factor. The board is manufactured using standard FR4 dielectric and through-hole vias. The nominal impedance is 50-ohm for single-ended traces and 100-ohm for differential traces. Figure 1. LatticeECP2M PCI Express Solutions Board Features • PCI Express x1 and x4 edge connector interfaces • Allows demonstration of PCI Express (x 1and x4) interfaces – x1 is form-factor compliant and will fit a standard PC-equipped PCI Express motherboard socket – x4 is non-compliant but will demonstrate x4 functionality by a simple change to the hardware • Allows control of SERDES PCS registers using the Serial Client Interface (ORCAstra) 2 Lattice Semiconductor LatticeECP2M PCI Express Solutions Board User’s Guide • On-board Boot Flash – Both Serial SPI Flash and Parallel Flash via MachXO™ programming bridge • Shows interoperation with a high performance DDR2 memory component • Includes driver based “run-time” device configuration capability via ORCAstra or PCI Express • Switches, LEDs, displays for demo purposes • Input connection for lab-power supply • Power connections and power sources • ispVM® programming support • On-board and external reference clock sources The contents of this user’s guide include top-level functional descriptions of the various portions of the evaluation board, descriptions of the on-board connectors, diodes and switches and a complete set of schematics of the board. Figure 2. PCI Express Solutions Board Outline Drawing, Top Side 3 Lattice Semiconductor LatticeECP2M PCI Express Solutions Board User’s Guide Figure 3. PCI Express Solutions Board Outline Drawing, Bottom Side x1 and x4 PCI Express Support PCI Express x1 and x4 is supported with the same PCB. This add-in PCB is designed to work in both types of motherboard slots. The PCB complies with the width and length dimensions of the PCI Express Card Electromechanical (CEM) Specification Revision 1.1. The only exclusion of the CEM specification is the component and back side of the add-in board may interfere with other boards in a fully-populated motherboard. This board is easily interchanged from x1 to x4 configurations by removing the back-panel bracket and reinstalling it on the opposite side. This permits plug-in into PCI Express sockets on the motherboard and securing it in the chassis if desired. The back-panel bracket is shown below. Figure 4. Back Panel Drawing 4 LatticeECP2M PCI Express Solutions Board User’s Guide Lattice Semiconductor LatticeECP2M Device This board features a LatticeECP2M FPGA with a 1.2V core supply. It can accommodate all pin compatible LatticeECP2M devices in the 672-ball fpBGA (1mm pitch) package. A complete description of this device can be found in the LatticeECP2M Family Data Sheet on the Lattice website at www.latticesemi.com. Note: The connections referenced in this document refer to the LFE2M35E-FF672 device. Available I/Os and associated sysI/O™ banks may differ for other densities within this device family. However, only the LFE2M50E-FF672 device offers full functional use of the entire evaluation board. Applying Power to the Board The LatticeECP2M PCI Express Solutions Board is ready to power on. The board can be supplied with power from an AC wall-type transformer power supply shipped with the board. Or it can be supplied from a benchtop supply via terminal screw connections. It also has provisions to be supplied from the PCI Express edge fingers from a host board. To supply power from the factory-supplied wall transformer, simply connect the output connection of the power cord to J1 and plug the wall-transformer into an AC wall-outlet. Power Supplies (see Appendix A, Figure 21) The evaluation board incorporates an alternate scheme to provide power to the board. The board is equipped to accept a main supply via the TB1 connection. This connection is provided to use with a benchtop supply adjusted to provide a nominal +12V DC. All input power sources and on-board power supplies are fused with surface-mounted fuses and have green LEDs to indicate power GOOD status of the intermediate supplies Table 1. Board Power Supply Fuses (see Appendix A, Figure 21) F1 1.2V Core Fuse F2 1.5V Fuse F3 3.3V Fuse F4 2.5V Fuse F5 1.8V Fuse F6 1.2V Analog Supply Table 2. Board Power Supply Indicators (see Appendix A, Figure 21) D1 2.5V Source Good Indicator D2 3.3V Source Good Indicator D3 12V Input Good Indicator D4 1.2V VCC Core Source Good Indicator D5 1.5V Source Good Indicator D6 1.8V Source Good Indicator D7 1.2V Analog Source Good Indicator External power can be alternatively connected rather than the wall transformer power pack. 5 LatticeECP2M PCI Express Solutions Board User’s Guide Lattice Semiconductor Table 3. External Board Supply Input Terminal (see Appendix A, Figure 21) TB1 Screw terminal for +12V DC Pin1 (square PCB pad): +12V DC Pin2: Ground PCI Express Power Interface Power can be sourced to the board via the PCB edge-fingers (CN1 and CN2). This interface allows the user to provide power from a PCI Express Host board. Programming/FPGA Configuration (see Appendix A, Figure 23) A programming header is provided on the evaluation board, providing access to the LatticeECP2M JTAG port. Note: An ispDOWNLOAD® Cable is included with each ispLEVER®-Base or ispLEVER-Advanced design tool shipment. Cables may also be purchased separately from Lattice. ispVM Download Interface J3 and J11 are 8-pin JTAG connectors used in conjunction with the ispVM USB download cable to program and control the device. These connectors are available through the back-panel bracket as needed for x1 or x4 PCI Express configurations. These connectors are used in conjuction with the ispVM programming cable and software to program the configuration memory or FPGA directly. Table 4. Standard ispVM Programming Cable Configuration Pin 1 VCC Pin 2 TDO Pin 3 TDI Pin 4 TMS Pin 5 GND Pin 6 TCK Pin 7 DONE1 Pin 8 INITN1 1. Denotes optional connection to programming cable. After initial board setup, use the following procedure to program the evaluation board. Instructions assume ispVM software has been installed on a local PC. Connect the ispDOWNLOAD cable rainbow colored flywires to the connector J3. 6 LatticeECP2M PCI Express Solutions Board User’s Guide Lattice Semiconductor Table 5. ispVM JTAG Connector (see Appendix A, Figure 21) NC NC 8 7 6 5 4 3 2 1 Note: A dot denotes PIN 1 on the both the PCB or back-panel bracket. Pin Function Color 1 PWR Red 2 TDO Brown 3 TDI Orange 4 TMS Purple 5 GND Black 6 TCK White Figure 5. ispVM Programming Cable Connector Programming the Daisy Chain This board includes two Lattice Semiconductor programmable (U1=LFE2M50E, U13=LCMXO1200) devices that can be programmed in a daisy chain. Figure 6. JTAG Chain TCK TMS TDI TDO TCK LatticeECP2M TDO FPGA (U1) 7 TMS TDI MachXO1200 CPLD (U13) Lattice Semiconductor LatticeECP2M PCI Express Solutions Board User’s Guide Download Procedures Requirements: • PC with ispVM System v.16.0 (or later) programming management software, installed with appropriate drivers (USB driver for USB Cable, Windows NT/2000/XP parallel port driver for ispDOWNLOAD Cable). Note: An option to install these drivers is included as part of the ispVM System setup. • ispDOWNLOAD Cable (pDS4102-DL2A, HW7265-DL3A, HW-USB-1A, etc.) JTAG Download The LatticeECP2M device can be configured easily via its JTAG port. The device is SRAM-based; it must remain powered on to retain its configuration when programmed in this fashion. 1. Connect the LatticeECP2M PCI Express Solutions Board to the appropriate power sources and power up board. 2. Connect the ispDOWNLOAD cable to the appropriate header. J3 is used for the 1x8 connection. J11 is used in the same manner for x4 configurations. 3. Start the ispVM System software. 4. Press the SCAN button located in the toolbar. The LatticeECP2M and the MachXO1200 devices should be automatically detected. Figure 7. ispVM Main Window 5. Double-click the device to open the device information dialog. In the device information dialog, click the Browse button located under Data File. Locate the desired bitstream file (.bit). Click OK to both dialog boxes. 6. To program only the LatticeECP2M-50, place the LCMXO1200C device into BYPASS and the LFE2M50E should be in FAST PROGRAM mode. 8 Lattice Semiconductor LatticeECP2M PCI Express Solutions Board User’s Guide Figure 8. ispVM Fast Programming Mode Figure 9. ispVM Device Information Dialog Box 7. Add Data File. 8. Click the green GO button. This will begin the download process into the device. Upon successful download, the device will be operational. Configuration Status Indicators (see Appendix A, Figure 23) These LEDs indicate the status of configuration to the FPGA. • D8 (red) illuminated, this indicates that the programming was aborted or reinitialized driving the INITN output low. • D11 (green) is illuminated, this indicates the successful completion of configuration by releasing the open collector DONE output pin. 9 LatticeECP2M PCI Express Solutions Board User’s Guide Lattice Semiconductor • D12 (green) will flash indicating TDI activity. • D10 (red) illuminated, this indicates that PROGRAMN is low. • D9 (red) illuminated, this indicates that GSRN is low. PROGRAMN & GSRN (see Appendix A, Figure 23) • These push-button switches assert/de-assert the logic levels on the PROGRAMN (SW3) and GSRN (SW2). Depressing the button drives a logic level “0” to the device. • These push-buttons are accessible from the back panel if the evaluation board is mounted in a PCI Express slot of a PC. CFG [2:0] (see Appendix A, Figure 23) • The FPGA CFG pins are set on the board for a particular programming mode via the SW1 DIP switch. • JTAG programming is independent of the MODE pins and is always available to the user. • Pushing in (depressing) the switch is ON and sets the value to 0. Table 6. CFG Mode Selections CFG2 CFG1 CFG0 Configuration Mode SPI Flash 0 (ON) 0 (ON) 0 (ON) 0 (ON) 1 (OFF) 0 (ON) SPIm 1 (OFF) 0 (ON) 1 (OFF) Slave Serial 1 (OFF) 1 (OFF) 1 (OFF) Slave Parallel X (don’t care) X (don’t care) X (don’t care) ispJTAG™ On-Board Serial SPI Flash Memory (see Appendix A, Figure 23) • One Serial SPI (16-pin tssop 64M) Flash memory device (U8) is on-board for non-volatile configuration memory storage. Either a STMicro M25P64VMF16 or Macronix MX25L6405 device is populated on-board. • All CFG [2:0] need to be [000] depressed to read the Flash memory at power-up or after toggling the PROGRAMN pin. Programming Serial SPI Flash Memory The Serial SPI Flash memory device can be configured easily via its JTAG port. This mode enables the FPGA to be programmed at power-up or assertion of PROGRAMN with a bitstream stored in the memory device. 1. Connect the LatticeECP2M PCI Express Solutions Board to the appropriate power sources and power-up board. 2. Connect the ispDOWNLOAD cable to the appropriate header. J3 is used for the 1x10 cable. 3. Start the ispVM System software. 4. Press the SCAN button located in the toolbar. The LFE2M50E and the LCMXO1200C devices should be automatically detected. 10 Lattice Semiconductor LatticeECP2M PCI Express Solutions Board User’s Guide Figure 10. Results of Scanning Board via ispVM 5. Double-click the Operation column for the LFE2M50E and the Device Dialog box shown below will open. 6. In the dialog box, select the SPI Flash Programming mode in the Device Access Options pull-down menu. This will open the SPI Serial Flash Dialog box. Figure 11. Device Information Dialog Screen 11 Lattice Semiconductor LatticeECP2M PCI Express Solutions Board User’s Guide Figure 12. SPI Serial Flash Dialog Screen 7. The SPI Serial Flash Device dialog box will open. In this box select SPI Flash Erase, Program, Verify in the Operation pull-down menu. 8. Select SPI Serial Flash in the Device Family pull-down menu, STMicro under the Vendor pull-down menu, SPI-M2564 under the Device pull-down menu, and 16-lead SOIC under the Package submenu. Figure 13. Select Device Dialog Box 12 LatticeECP2M PCI Express Solutions Board User’s Guide Lattice Semiconductor Figure 14. Sample SPI Serial Flash Device Dialog Box 9. Click OK in the SPI Flash Device dialog box. Then click OK in the Select Device dialog box. You will then return to the main configuration screen. If you do not desire to load the LCMXO1200C device, this device should be placed in Flash Bypass mode by double-clicking the Operation column and selecting the Bypass operation shown below. Figure 15. FLASH Bypass for LCMXO1200C Device 13 Lattice Semiconductor LatticeECP2M PCI Express Solutions Board User’s Guide Figure 16. Programming Main Window 10.From the main programming window, select GO in the top toolbar. This will begin the SPI Serial Flash programming. Figure 17. SPI Serial Flash Programming Status Window 14 Lattice Semiconductor LatticeECP2M PCI Express Solutions Board User’s Guide Figure 18. Successful SPI Serial Flash Programming Session On-Board Parallel SPI Flash Memory (see Appendix A, Figure 24) • A 16-bit parallel Flash device is also available. This board uses a Lattice MachXO CPLD device to act as a programming bridge from the Flash device. • The CFG [2:0] need to be [111], all up. • Lattice ispVM programming software can be used to program either the serial SPI Flash or the parallel Flash devices. Application note AN8077, Parallel Flash Programming and FPGA Configuration, addresses the use of the parallel Flash implementation. Note: For parallel Flash loading, the board needs to remove shorting resistors to disable the serial SPI Flash interconnections. Remove R39 and R194 from the PCB. User-Defined General Purpose Clock Oscillator (see Appendix A, Figure 27, Y2) A 100MHz oscillator is included on-board. It is fanned-out to several destinations on the board, as described in Table 7. 15 LatticeECP2M PCI Express Solutions Board User’s Guide Lattice Semiconductor Table 7. 100MHz Clock Destinations Clock Destination PCB Designation Destination Pin CPLD U13 A8 FPGA U1 P3- PCLK6_0 FPGA U1 W4-LLM0_GPLL FPGA U1 P1- LLM2_SPLL SERDES (see Appendix A, Figure 25) SERDES/FPGA Reference Clocks The 50-ohm terminated SMA connectors are optionally provided to supply reference clocks directly to the LatticeECP2M device. Please contact the factory for information to populate the PCB with SMA connectors. Table 8. SMA Inputs for External Clock Source Connector SERDES Signal FPGA Pin J8 FPGA_SMA_REFCLKP N25 J9 FPGA_SMA_REFCLKN N24 SERDES PCI Express Channels (see Appendix A, Figure 25) This board is equipped to communicate directly as an add-on card to a PCI Express host. It is designed with edgefingers (CN1 or CN2) that fit directly into a PCI Express host receptacle. Power can be supplied directly from the PCI Express host via the edge-finger connections. Table 9. x1 PCI Express Connections CML Pin Name FPGA Pin PCIE PCI Express Edge L_HDOUTP_0 AF21 PERp0 A16 L_HDOUTN_0 AE21 PERn0 A17 L_HDINP_0 AF24 PETp0 B14 L_HDINN_0 AE24 PETn0 B15 L_REFCLKP AC19 PCIe_CLKp A13 L_REFCLKN AB19 PCIe_CLKn A14 C12 PERSTN A11 PCIE_PERSETN Description Integrated endpoint block transmit pair Integrated endpoint block receive pair Integrated endpoint block differential clock pair Fundamental PCI Express reset Table 10. x4 PCI Express Connections CML Pin Name FPGA Pin PCIE PCI Express Edge U_HDOUTP_3 A17 PERp0 A16 U_HDOUTN_3 B17 PERn0 A17 U_HDINP_3 A14 PETp0 B14 U_HDINN_3 B14 PETn0 B15 U_HDOUTP_2 A18 PERp1 A21 U_HDOUTN_2 B18 PERn1 A22 U_HDINP_2 A15 PETp1 B19 U_HDINN_2 B15 PETn1 B20 16 Description Integrated endpoint block transmit pair Integrated endpoint block receive pair Integrated endpoint block transmit pair Integrated endpoint block receive pair LatticeECP2M PCI Express Solutions Board User’s Guide Lattice Semiconductor Table 10. x4 PCI Express Connections (Continued) CML Pin Name FPGA Pin PCIE PCI Express Edge U_HDOUTP_1 A20 PERp2 A25 U_HDOUTN_1 B20 PERn2 A26 U_HDINP_1 A23 PETp2 B23 U_HDINN_1 B23 PETn2 B24 U_HDOUTP_0 A21 PERp3 A29 U_HDOUTN_0 B21 PERn3 A30 U_HDINP_0 A24 PETp3 B27 U_HDINN_0 B24 PETn3 B28 U_REFCLKP D19 PCIe_CLKp A13 U_REFCLKN E19 PCIe_CLKn A14 PCIE_PERSETN C12 PERSTN A11 Description Integrated endpoint block transmit pair Integrated endpoint block receive pair Integrated endpoint block transmit pair Integrated endpoint block receive pair Integrated endpoint block differential clock pair Fundamental PCI Express reset FPGA Test Pins (see Appendix A, Figure 27) General Purpose DIP Switch (see Appendix A, Figure 27, SW5) General-purpose FPGA pins are available for user applications. FPGA pins are connected to a switch (SW5) which is an SPST side actuated DIP switch. The switch is physically located on the secondary side of the PCB along the back-panel edge. The switches are connected to a logic level 0 when depressed toward the board and a 1 when away from the board. The designated pins are connected according to Table 11. Table 11. FPGA Test Pins (See Appendix A, Figure 26) FPGA BGA SW5 Switch Position T5 1 R7 2 U1 3 T1 4 R6 5 P8 6 T4 7 T3 8 Logic 1 PCB Logic 0 17 1 2 3 4 5 6 7 8 LatticeECP2M PCI Express Solutions Board User’s Guide Lattice Semiconductor Figure 19. 8-position DIP Switch (SW5) on Secondary PCB Side General Purpose LEDs (see Appendix A, Figure 27, D14-D21) LEDs are provided along the back panel edge of the PCB. These LEDs are connected to general-purpose FPGA I/Os. The LEDs are illuminated by the associated FPGA outputs being driven to a valid LOW level. The use of these LEDs is defined for PCI Express applications to observe the status of the PCI Express link during operation. The LEDs must be included in the FPGA design. These status LEDs are available in both x1 or x4 configurations. The back panel marking reflects PCI Express specific status. Table 12. LED Definitions PCI Express x1 PCI Express x4 FPGA Pin# PCB Designator FPGA Pin# PCB Designator Description U6 D20 W6 D28 User defined V2 D21 Y5 D29 User defined V1 D16 AA3 D25 User defined U4 D17 Y4 D24 User defined U3 D14 U3 D22 Data link up active U2 D15 Y3 D23 L0 state active U5 D18 U8 D26 Polling state active W2 D19 V7 D27 PLL locked 18 LatticeECP2M PCI Express Solutions Board User’s Guide Lattice Semiconductor General-Purpose Header (see Appendix A, Figure 27, J10) A 2x9 header (J10) provides a general-purpose connection to communicate with general purpose FPGA I/Os. Table 13. General Purpose Header Connections Header Pin FPGA Pin Header Pin FPGA Pin 1 GND 2 GND 3 E23 4 H25 5 E24 6 H26 7 F26 8 G22 9 G26 10 K19 11 F21 12 G24 13 H20 14 G23 15 F24 16 J18 17 F23 18 F22 17-Segment LED Display (see Appendix A, Figure 27, D13) General-purpose FPGA pins are connected to a 17-segment display according to Table 14. These pins can be driven low to illuminate the display segments. Table 14. 17-Segment LED Display Segment BGA A H16 B H15 C B10 D G14 E F13 F H14 G C10 H B9 K F12 M G13 N B8 P D9 R D6 S C8 T D8 U A6 DP A4 A H B K M N U G P T S F C R E D DP Logic Analyzer Probe (see Appendix A, Figure 27, LA1) An AMP/TYCO 767004 38-position .025 VERT SMD logic analyzer probe connection is provided for the user to utilize for test points. This connection provides 34 general I/O signals to be observed on a Logic Analyzer probe using Mictor connections such as the Agilent 5346A. 19 LatticeECP2M PCI Express Solutions Board User’s Guide Lattice Semiconductor Table 15. Logic Analyzer To FPGA Pin Reference Signal FPGA Pin Signal FPGA Pin LA1 N23 LA2 M21 LA3 P26 LA4 P25 LA5 N22 LA6 N20 LA7 P22 LA8 N21 LA9 P24 LA10 P23 LA11 N19 LA12 R22 LA13 R24 LA14 R23 LA15 P19 LA16 P21 LA17 R26 LA18 T26 LA19 R20 LA20 R21 LA21 R19 LA22 T19 LA23 U26 LA24 U25 LA25 T23 LA26 T22 LA27 T24 LA28 U24 LA29 V26 LA30 V25 LA31 U22 LA32 U18 LA33 W26 LA34 W25 DDR2 Memory Devices (see Appendix A, Figure 26, U16) • The LatticeECP2M PCI Express Solutions Board is equipped with an 84-ball BGA DDR2 SDRAM memory device such as a Micron MT47H16M16BG-3 device. • The DDR2 memory interfaces include a 16-bit wide device. • The evaluation board includes termination of address and command signals. It includes all power and external components needed to demonstrate the memory controller of the LatticeECP2M device. CPLD Device (see Appendix A, Figure 24, U13) The board includes a Lattice Semiconductor LCMXO-1200C CPLD. This device is used in conjunction with the parallel Flash device for loading the configuration memory of the FPGA. It is also used for general-purpose board management functions. It has several connections to the FPGA and other devices on the PCB. It includes an active high, push-button (SW4) if needed for a user design. Generic user-defined interconnections are defined in Table 16. 20 LatticeECP2M PCI Express Solutions Board User’s Guide Lattice Semiconductor Table 16. CPLD TO FPGA Interconnections CPLD Pin FPGA Pin M1 G7 P13 G8 P10 F8 N7 J10 N8 D4 P11 C3 N13 F7 N1 G9 N3 C4 N4 B2 P1 C5 M12 B3 M2 E7 M3 H10 M4 F9 M6 G10 Ordering Information Description Ordering Part Number China RoHS Environment-Friendly Use Period (EFUP) LatticeECP2M PCI Express Solutions Board Technical Support Assistance Hotline: 1-800-LATTICE (North America) +1-503-268-8001 (Outside North America) e-mail: [email protected] Internet: www.latticesemi.com Revision History Date Version September 2008 01.0 Change Summary Initial release. © 2008 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at www.latticesemi.com/legal. All other brand or product names are trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice. 21 22 A B 5 PCIe-X4 CH0 PCIe-X1 LOOPS CH1, CH2 CH3 4 PCIE_CLOCK L_QUAD U_QUAD PCIE_CLOCK STATUS LEDs 100MHZ GENERAL OSC. SMA CLOCK DIP SWITCH LOGIC ANALYZER PROBE 16- GPIO HEADER 3 16-SEGMENT DISPLAY JTAG/ISPVM 2 Banks 0, 4, 6, 7 = 3.3V Banks 1, 2, 3 = 2.5V Banks 5 = 1.8V Title S iz e C D a te : Cover Page Thursday, March 13, 2008 1 S he e t 1 ECP2M PCIe Solutions Eval Board P roje c t of 9 R ev 2.5 1605 Valley Center Parkway Bethlehem, PA 18017 1 A B C 2 C 3 D 4 D 5 16-bit DDR2 Lattice Semiconductor LatticeECP2M PCI Express Solutions Board User’s Guide Appendix A. Schematic Figure 20. Cover Page A B C D 1 1 1 1 1 1 R15 0R-0805SMT TP11 TP9 TP7 TP5 TP3 R27 0R-0805SMT TP6 1 TP12 1 TP10 1 TP8 1 5 C13 10UF-16V_TANTBSMT 3_3VIN TP4 1 1 C6 10UF-16V_TANTBSMT 3_3VIN TESTPOINT TESTPOINT TESTPOINT TESTPOINT TESTPOINT TESTPOINT TP2 TESTPOINT TESTPOINT TESTPOINT TESTPOINT TESTPOINT TESTPOINT R2 C17 2 4 5 C9 AMS1503CM R17 OUTPUT AMS1503CM R32 1 3 1_8V C18 22UF-16V_TANTBSMT 124R-0603SMT SENSE ADJUST_GND VCONTROL VPOWER 1_5V Q2 2N2222/SOT23 C10 22UF-16V_TANTBSMT 5A Fast-Blo SMT Socketed Fuse F5 F1228CT-ND 3 1 124R-0603SMT SENSE ADJUST_GND VCONTROL OUTPUT F2 F1228CT-ND 5A Fast-Blo SMT Socketed Fuse R8 1 10K-0603SMT VCC_CORE 1.2V VCC_CORE LED-SMT1206_GREEN D4 VPOWER U2 U7 2 4 5 Q1 2N2222/SOT23 470R-1206SMT 3 1.8V 1.5V 2 TP1 100NF-0603SMT C11 R9 1 10K-0603SMT LED-SMT1206_GREEN D5 1_5V 1.5V R3 470R-1206SMT 12_0V 4 C19 Q3 2N2222/SOT23 8 1 2 U3 ILIM IN CNTL GND OUT SENSE EN SC1592 TAB U6 R19 OPEN-0805SMT 12_0V R10 1 10K-0603SMT 12_0V Q4 2N2222/SOT23 R5 470R-1206SMT PTH12060W SENSE 5 6 0R-0603SMT R16 R12 100K-0603SMT 1_2V_A R24 1_8K-0603SMT C5 10UF-16V_TANTBSMT VOUT R11 1 10K-0603SMT LED-SMT1206_GREEN D7 1.2V Analog 1 2 3 4 5 6 7 R30 10K-0603SMT 3_3VIN R28 100R-0805SMT GND 100R-0603SMT R34 3 C20 10UF-16V_TANTBSMT 49_9R-0603SMT R33 VCCA_SC 1.2V Analog C8 10UF-16V_TANTBSMT D3 2 C14 2 4 5 GND VIN 100UF-FKSMT OUTPUT AMS1503CM R31 1 3 2_5V S iz e C D a te : 0R-0603SMT R14 2.5V J1 1 C16 Monday, March 10, 2008 1 S he e t 2 of 9 R ev 2.5 1605 Valley Center Parkway Bethlehem, PA 18017 330UF-FKSMT C4 + 1.2V Core F1 F1228CT-ND 5A Fast-Blo SMT Socketed Fuse 12_0V VCC_CORE 1 ECP2M PCIe Solutions Eval Board P roje c t Power Generation C15 22UF-16V_TANTBSMT Title 6 5 R13 100K-0603SMT C3 10UF-16V_TANTBSMT SENSE VOUT R21 1M-0603SMT 124R-0603SMT SENSE ADJUST_GND VCONTROL VPOWER U5 PTH12060W 5A Fast-Blo SMT Socketed Fuse F4 F1228CT-ND 1 2 U4 12_0V Male Power Jack 2.1mm 22HP037 3 POWER INPUT + 470UF-FKSMT GND +12VDC Terminal Block/ED1202DS TB1 + C2 2 1 12_0V 12_0V 12_0V R18 OPEN-0805SMT C1 R26 0R-0805SMT 12_0V LED-SMT1206_GREEN 12_0V R1 470R-1206SMT 12VIN GOOD 2 C12 10UF-16V_TANTBSMT 3_3VIN F3 F1228CT-ND 5A Fast-Blo SMT Socketed Fuse 3.3V R7 150R-0603SMT 3.3V D2 LED-SMT1206_GREEN 3_3V F6 F1228CT-ND 5A Fast-Blo SMT Socketed Fuse 3_3V 330UF-FKSMT C21 + 1_2V_A 330UF-FKSMT C7 + 3_3VIN R6 100R-0603SMT 2. 5V D1 LED-SMT1206_GREEN 2_5V R29 0R-0603SMT 3_3VIN VCC12 ANALOG SUPPLY GND VIN LED-SMT1206_GREEN D6 1_8V 1. 8V R4 470R-1206SMT 12_0V POWER RAIL GOOD INDICATORS INHIBIT# 3 3 2 3 2 GND Pads Distributed around the board 27R-0603SMT 10 MUP 9 MDWN ADJUST 4 3 R37 8 TRACK GND 7 2 R22 56R-0603SMT 100NF-0603SMT INHIBIT# 3 3 R35 3_3_TRIM ADJUST 4 4 100NF-0603SMT 10 MUP 9 MDWN 8 TRACK GND 7 VCC_TRIM 12_0V 100NF-0603SMT 2 5 124R-0603SMT 23 100NF-0603SMT A B C D Lattice Semiconductor LatticeECP2M PCI Express Solutions Board User’s Guide Figure 21. Power Generation 100NF-0603SMT A B C C35 C36 FB3 FB4 C105 VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC C107 C64 C65 C66 C67 VCC_PLL G19 J17 H7 K6 R8 P7 V18 P20 C108 C109 + C80 PP7 VCC_CORE L12 L13 L14 L15 M11 M12 M15 M16 N11 N16 P11 P16 R11 R12 R15 R16 T12 T13 T14 T15 + C71 C110 C81 L_VCCOB C70 L_VCCIB FB22 C111 C112 BLM41PG600SN1 FB19 BLM41PG600SN1(NOB) FB18 BLM41PG600SN1 1_2V_A 1_5V FB20 C113 22UF-16V_TANTBSMT BLM41PG600SN1(NOB) 1_2V_A 1_5V 1000PF-0402SMT 1000PF-0402SMT 1000PF-0402SMT 1000PF-0402SMT 1000PF-0402SMT C63 RUM0_VCCPLL RUM1_VCCPLL LUM0_VCCPLL LUM1_VCCPLL LLM0_VCCPLL LLM2_VCCPLL RLM0_VCCPLL RLM2_VCCPLL + C37 C38 1 PP2 + C527 + C522 2 C114 1UF-16V-0805SMT C116 C117 C118 C119 C120 C121 C122 C123 C124 5 4 10NF-0603SMT 10NF-0603SMT 10NF-0603SMT 10NF-0603SMT 10NF-0603SMT 10NF-0603SMT 10NF-0603SMT 10NF-0603SMT 10NF-0603SMT 10NF-0603SMT C115 VCC_CORE 100NF-0603SMT 100NF-0603SMT 100NF-0603SMT 100NF-0603SMT 100NF-0603SMT 100NF-0603SMT 100NF-0603SMT 100NF-0603SMT 100NF-0603SMT 100NF-0603SMT C106 ecp2m-672fpbga VCC Core U1I BLM41PG600SN1 FB6 BLM41PG600SN1(NOB) 1_2V_A 1_5V FB2 PLL RLM0_PLLCAP LLM0_PLLCAP ecp2m-672fpbga BLM41PG600SN1(NOB) C52 5.6nF 0402 T8 V19 BLM41PG600SN1 1_2V_A 1_5V VCC_CORE C50 5.6nF 0402 U1G 22UF-16V_TANTBSMT 22UF-16V_TANTBSMT D C34 100NF-0603SMT 100NF-0603SMT 10NF-0603SMT 10NF-0603SMT VCC_PLL 22UF-16V_TANTBSMT 22UF-16V_TANTBSMT C33 1UF-16V-0805SMT 1UF-16V-0805SMT C86 L_VCCIB 1_8V C87 C39 C533 U_VCCIB C520 C25 C26 C27 C28 C29 C30 C45 C46 C40 C47 C48 C41 C42 C53 C54 C55 C56 C57 C58 C59 C60 FB23 FB5 C88 + C82 BLM41PG600SN1 + C524 C534 100NF-0603SMT C535 U_VCCOB 100NF-0603SMT C89 L_VCCOB C83 U_VCCAUX33 C525 L_VCCAUX33 3 10NF-0603SMT C518 10NF-0603SMT C90 L_VCCOB U_VCCOB U_VCCIB L_VCCIB 100NF-0603SMT C536 U_1_2V_A L_1_2V_A 10NF-0603SMT C519 10NF-0603SMT C92 ecp2m-672fpbga SERDES Supplies L_VCCIB0 L_VCCIB1 L_VCCIB2 L_VCCIB3 U_VCCIB0 U_VCCIB1 U_VCCIB2 U_VCCIB3 U_VCCOB0 U_VCCOB1 U_VCCOB2 U_VCCOB3 L_VCCOB3 L_VCCOB1 L_VCCOB2 L_VCCOB0 L_VCCAUX33 U_VCCAUX33 100NF-0603SMT C91 AE25 AD23 AD15 AE13 B25 C23 C15 B13 A22 C20 C18 A16 AF16 AD20 AD18 AF22 AE19 B19 U1H L_VCCRX0 L_VCCRX1 L_VCCRX3 L_VCCRX2 U_VCCRX0 U_VCCRX1 U_VCCRX2 U_VCCRX3 L_VCCTX3 L_VCCTX2 L_VCCTX1 L_VCCTX0 U_VCCTX0 U_VCCTX1 U_VCCTX2 U_VCCTX3 U_VCCP L_VCCP AD25 AD24 AD13 AD14 C25 C24 C14 C13 AD16 AD17 AD21 AD22 C22 C21 C17 C16 C19 AD19 100NF-0603SMT C99 100NF-0603SMT C93 + C537 C94 U_1_2V_A C100 10NF-0603SMT PP1 PP3 PP4 C95 + C61 1_8V + C49 2_5V + C31 3_3V 2 + C540 C96 C102 10NF-0603SMT 1UF-16V-0805SMT C73 C74 B7 B12 F11 J13 K12 D18 F16 J14 K15 G25 L21 M17 M25 N18 P18 R17 R25 T21 Y25 AC18 AA16 U15 V14 AA11 AE7 U12 V13 AE12 P9 R10 R2 T6 Y2 G2 L6 M10 M2 N9 L_1_2V_A C97 100NF-0603SMT C103 100NF-0603SMT C98 10NF-0603SMT C104 10NF-0603SMT 1 C76 ecp2m-672fpbga VCCIO0 VCCIO0 VCCIO0 VCCIO0 VCCIO0 VCCIO1 VCCIO1 VCCIO1 VCCIO1 VCCIO2 VCCIO2 VCCIO2 VCCIO2 VCCIO2 VCCIO3 VCCIO3 VCCIO3 VCCIO3 VCCIO3 VCCIO4 VCCIO4 VCCIO4 VCCIO4 VCCIO5 VCCIO5 VCCIO5 VCCIO5 VCCIO5 VCCIO6 VCCIO6 VCCIO6 VCCIO6 VCCIO6 VCCIO7 VCCIO7 VCCIO7 VCCIO7 VCCIO7 U1J 3_3V D a te : S iz e C Title 22UF-16V_TANTBSMT C69 10NF-0603SMT C79 Monday, March 10, 2008 PP5 1 S he e t 3 of 9 R ev 2.5 1605 Valley Center Parkway Bethlehem, PA 18017 10NF-0603SMT C75 + C68 1UF-16V-0805SMT ECP2M PCIe Solutions Eval Board P roje c t U17 AC24 3_3V 10NF-0603SMT C78 Power Supplies 10NF-0603SMT C77 Power Supplies VCCIO8 VCCIO8 VCCJ VCCAUX VCCAUX VCCAUX VCCAUX VCCAUX VCCAUX VCCAUX VCCAUX VCCAUX VCCAUX VCCAUX VCCAUX VCCAUX VCCAUX VCCAUX VCCAUX AA7 J11 J12 J15 J16 L18 L9 M18 M9 R18 R9 T18 T9 V11 V12 V15 V16 Banks 0, 4, 6, 7 = 3.3V Banks 1, 2, 3 = 2.5V Banks 5 = 1.8V 100NF-0603SMT 100NF-0603SMT 100NF-0603SMT 100NF-0603SMT C72 C62 C43 C32 10NF-0603SMT C541 FB26 BLM41PG600SN1 100NF-0603SMT C101 2 1_2V_A PP10 L_1_2V_A 100NF-0603SMT PP6 U_1_2V_A 10NF-0603SMT C538 FB27 BLM41PG600SN1 1_2V_A 10NF-0603SMT 10NF-0603SMT 10NF-0603SMT 10NF-0603SMT 10NF-0603SMT 10NF-0603SMT 10NF-0603SMT 10NF-0603SMT 10NF-0603SMT C51 100NF-0603SMT 100NF-0603SMT 10NF-0603SMT 10NF-0603SMT C521 C24 100NF-0603SMT 100NF-0603SMT 100NF-0603SMT 100NF-0603SMT 100NF-0603SMT 100NF-0603SMT 100NF-0603SMT 100NF-0603SMT 100NF-0603SMT C44 BLM41PG600SN1 3_3V C23 10NF-0603SMT 10NF-0603SMT 10NF-0603SMT 10NF-0603SMT 10NF-0603SMT 10NF-0603SMT 10NF-0603SMT 10NF-0603SMT 10NF-0603SMT C22 100NF-0603SMT 100NF-0603SMT 10NF-0603SMT 10NF-0603SMT C85 C528 U_VCCOB C523 U_VCCIB 1UF-16V-0805SMT 1UF-16V-0805SMT FB1 100NF-0603SMT 100NF-0603SMT BLM41PG600SN1 1UF-16V-0805SMT C539 1 2 1 2 1 2 1_2V_A 22UF-16V_TANTBSMT 22UF-16V_TANTBSMT 1UF-16V-0805SMT C526 1UF-16V-0805SMT C84 1 2 3 22UF-16V_TANTBSMT 1 2 2_5V 100NF-0603SMT 22UF-16V_TANTBSMT 22UF-16V_TANTBSMT 22UF-16V_TANTBSMT 1UF-16V-0805SMT 1UF-16V-0805SMT 4 22UF-16V_TANTBSMT 1 2 5 1 2 100NF-0603SMT 24 1UF-16V-0805SMT C542 A B C D Lattice Semiconductor LatticeECP2M PCI Express Solutions Board User’s Guide Figure 22. Power Supplies A B C Q5 2N2222/SOT23 D11 220R-0603SMT 3 2 D 1 DONE [5,8] GSRN GSRN 5 D10 PROGRAMN PROGRAMN GSRN C125 [5] FPGA_CCLK CONFIG Pushbuttons FPGA RESETN/GSRN PROGRAMN CONFIG Status LEDs R50 10K-0603SMT DONE indicator will light when configuration is successfully completed D9 R46 10K-0603SMT C126 3_3V SW3 SW PUSHBUTTON-SPST SW7 SW PUSHBUTTON-SPST 6 3 FPGA_CCLK SW2 SW PUSHBUTTON-SPST 4 R39 0R-0603SMT 2Y 1Y FPGA_CSSPI0N SPI0_Q FLASH_DIS 5 4 2 1 1 3 SN74LVC125A/SO14 2A 2OE_N 1A 1OE_N U11A 3_3V U8 CK D DU8 DU7 DU6 DU5 VSS W# M25P64-FLASH HOLD# VCC DU1 DU2 DU3 DU4 S# Q SPI_CLK 16 15 14 13 12 11 10 9 OUT1 OUT2 MAX6817 IN2 IN1 U9 6 4 11 8 4Y 3Y 3_3V 3_3V 12 13 9 10 R52 1K-0603SMT R195 1K-0603SMT 3 SN74LVC125A/SO14 4A 4OE_N 3A 3OE_N U11B SPI_CLK [5] [5] FPGA_SISPI LOADER_CK R51 1K-0603SMT [5] FPGA_CSN [5] FPGA_CS1N [5] FPGA_WRITE FPGA_SISPI FPGA_CSSPI1N FPGA_CSSPI0N FPGA_D7 FPGA_D6 FPGA_D5 FPGA_D4 FPGA_D3 FPGA_D2 FPGA_D1 FPGA_D0 SPI FLASH 1 2 3 4 5 6 7 8 LOADER_CK FPGA_D0 FPGA_D7 R194 0R-0603SMT R193 0R-0603SMT NEEDED FOR SPIFAST SPI0_Q SW6 SW PUSHBUTTON-SPST 10NF-0603SMT LED-SMT1206_RED R53 10K-0603SMT LED-SMT1206_RED R58 10K-0603SMT INITN C127 LED-SMT1206_GREEN R49 D8 100NF-0603SMT LED-SMT1206_RED R62 R47 680R-0603SMT 4_7K-0603SMT 5 VCC 100NF-0603SMT [5] FPGA_D[0..7] R64 GND 2 R65 100R-0603SMT R60 4_7K-0603SMT 680R-0603SMT R44 100R-0603SMT R61 4_7K-0603SMT 3_3V R54 10K-0603SMT 3_3V Y24 W23 V20 W21 AA24 Y23 W18 W22 Y20 W19 Y22 AB26 Y21 Y19 CONFIG CFG2 CFG1 CFG0 PROGRAMN DONE INITN CCLK TCK TMS TDO TDI XRES 4 6 [5] TCK_BUF [5] TMS_BUF 3_3V TCK_BUF TMS_BUF OUT Y2 4.7K 4.7K 4.7K OUT Y2 OUT Y1 4.7K EXBV8V472JV 4 6 3_3V 3_3V 3_3V U10 IN A2 IN A1 U12 IN A2 IN A1 3 1 TDI_BUF FPGA_CCLK TCK_BUF TMS_BUF CFG2 CFG1 CFG0 R196 10K-0603SMT AA21 AA22 AB23 AC26 AB25 AA23 AB24 AC3 AC4 V8 W8 H19 OUT Y1 NC7WZ16-MACO6A/Fairchild TinyLogic R63 220R-0603SMT D12 LED-SMT1206_GREEN This LED indicates activity on TDI. TDI_BUF NC7WZ16-MACO6A/Fairchild TinyLogic JTAG ecp2m-672fpbga BUSY DOUT/CSON DI D7 D6 D5 D4 D3 D2 D1 D0 CSN CS1N WRITEN U1B RN2B FPGA_CSSPI1N 680R-0603SMT R43 RN2C 5 INITN indicator will light if an error occurs during configuration programming RN2D C130 VCC GND 2 5 VCC GND 2 3_3V 2 3 1 3_3V TDI_XO [5] CFG0 R57 10K-0603SMT CFG1 CFG0 X 1(OFF) 1(OFF) 0(ON) 0(ON) 3_3V LOCAL_TDO LOCAL_TDI LOCAL_TMS LOCAL_TCK DONE INITN 1(OFF) 1(OFF) X 0(ON) X 1(OFF) 1(OFF) 0(ON) 0(ON) 0(ON) CFG2 CFG1 R56 10K-0603SMT 4.7K 4.7K 4.7K 5 1 4.7K D a te : S iz e C Title LOCAL_TDO LOCAL_TDI LOCAL_TMS LOCAL_TCK DONE INITN J11 5 1 3_3V Thursday, March 13, 2008 1 S he e t 4 of 9 R ev 2.5 1605 Valley Center Parkway Bethlehem, PA 18017 HEADER 8 2 3 4 6 7 8 ECP2M PCIe Solutions Eval Board P roje c t Progamming 3_3V EXBV8V472JV HEADER 8 2 3 4 6 7 8 LOCAL_TDO [5] J3 [5] 1 FROM ISPVM CABLE ispJTAG Slave Parallel Slave Serial SPIm SPI Flash Configuration Mode CFG[0:2] SW1 SW DIP-3 CTS 194-3MST PROGRAMN [5] DONE [5] INITN [5] CONFIG CFG Switches CFG2 R55 10K-0603SMT ON PROGRAMN DONE INITN R45 4_7K-0603SMT R40 R41 R42 10K-0603SMT 10K-0603SMT 10K-0603SMT R48 10K-0603SMT 3_3V C128 100NF-0603SMT 2 RN1B 3 RN1C 4 RN1D 4_7K-0603SMT R59 GND 7 14 VCC 1 100NF-0603SMT 6 5 4 1 2 3 4 LOCAL_TCK 5 5 4 TCK_BUF 5 1 RN2A 8 2 7 TDI_BUF 3 6 TMS_BUF 2 7 LOCAL_TDI RN1A 8 LOCAL_TDO 3 6 LOCAL_TMS C129 25 100NF-0603SMT A B C D Lattice Semiconductor LatticeECP2M PCI Express Solutions Board User’s Guide Figure 23. Programming A B 3_3V 4 2 5 Momentary Switch B3F-1150 3 SW4 CPLD RESET 1 [4] SPI_CLK [4] FPGA_CCLK [4] CFG[0:2] GSRN [4] DONE [4,8] [4] TCK_BUF [4] TDI_XO [4] LOCAL_TDO [4] TMS_BUF [8] FPGA_[0:15] R68 2_2K-0603SMT [4] INITN [4] PROGRAMN FPGA_D[0..7] 3_3V 4 GSRN CFG0 CFG1 CFG2 FPGA_0 FPGA_1 FPGA_2 FPGA_3 FPGA_4 FPGA_5 FPGA_6 FPGA_7 FPGA_8 FPGA_9 FPGA_10 FPGA_11 FPGA_12 FPGA_13 FPGA_14 FPGA_15 R70 1K-0603SMT TMS_XO TCK_BUF TDI_XO A4 N14 DONE M1 P13 P10 N7 N8 P11 N13 N1 N3 N4 P1 M12 M2 M3 M4 M6 M7 B1 L3 A3 A2 M9 N12 P4 M5 N5 P3 K12 A1 J2 H2 INITN PROGRAMN GPIO0 GPIO1 GPIO2 GPIO3 GPIO4 GPIO5 GPIO6 GPIO7 GPIO8 GPIO9 GPIO10 GPIO11 GPIO12 GPIO13 GPIO14 GPIO15 NC SPI_CLK FPGA_CLK CFG0 CFG1 CFG2 SLEEPN TCK TDI TDO TMS FUNC_RESET FPGA_RESETN FPGA_DONE FPGA_INITN TSALL FPGA_PROGRAMN LCMXO1200C-CSBGA132 Lattice FPGA Loader GND A10 [4] LOADER_CK GND B4 0R-0603SMT GND C9 R66 OPEN-0603SMT C134 C135 100NF-0603SMT 3 3 FLASH_ADDRESS_0 FLASH_ADDRESS_1 FLASH_ADDRESS_2 FLASH_ADDRESS_3 FLASH_ADDRESS_4 FLASH_ADDRESS_5 FLASH_ADDRESS_6 FLASH_ADDRESS_7 FLASH_ADDRESS_8 FLASH_ADDRESS_9 FLASH_ADDRESS_10 FLASH_ADDRESS_11 FLASH_ADDRESS_12 FLASH_ADDRESS_13 FLASH_ADDRESS_14 FLASH_ADDRESS_15 FLASH_ADDRESS_16 FLASH_ADDRESS_17 FLASH_ADDRESS_18 FLASH_ADDRESS_19 FLASH_ADDRESS_20 FLASH_ADDRESS_21 FPGA_CSN FPGA_CS1N FPGA_WRITEN GPIO29 GPIO28 GPIO27 GPIO26 GPIO25 GPIO24 GPIO23 GPIO22 GPIO21 GPIO20 GPIO19 GPIO18 GPIO17 FLASH_DQ_15 FLASH_DQ_14 FLASH_DQ_13 FLASH_DQ_12 FLASH_DQ_11 FLASH_DQ_10 FLASH_DQ_9 FLASH_DQ_8 FLASH_DQ_7 FLASH_DQ_6 FLASH_DQ_5 FLASH_DQ_4 FLASH_DQ_3 FLASH_DQ_2 FLASH_DQ_1 FLASH_DQ_0 CLOCK FLASH_WE_N FLASH_WP_N_ACC FLASH_RESET_N FLASH_OE_N FLASH_CEm FLASH_RD/BY FLASH_BYTEn FLASH_CE1_N FLASH_CE0_N 10NF-0603SMT GND D13 R67 C133 GND E1 C G12 VCC FPGA_DATA_0 FPGA_DATA_1 FPGA_DATA_2 FPGA_DATA_3 FPGA_DATA_4 FPGA_DATA_5 FPGA_DATA_6 FPGA_DATA_7 FPGA_CCLK C7 VCC GND F1 G1 A5 P8 M8 J3 K1 E3 B7 P5 H3 VCC GND J14 FPGA_D0 FPGA_D1 FPGA_D2 FPGA_D3 FPGA_D4 FPGA_D5 FPGA_D6 FPGA_D7 LOADER_CK P6 VCC 100NF-0603SMT P7 VCCAUX GND L2 3_3V U13 A7 VCCAUX C132 C5 VCCIO0 10NF-0603SMT B11 VCCIO1 C131 E12 VCCIO2 100NF-0603SMT L12 VCCIO3 3_3V M10 VCCIO4 GND L13 [4] FPGA_D[0..7] 4 N2 VCCIO5 GND D R69 1K-0603SMT K3 VCCIO6 GND P2 5 C139 100NF-0603SMT D2 VCCIO7 GND P9 26 N11 C136 B6 A6 B3 B5 A9 B9 C10 B10 C11 A11 D14 C8 A14 B8 C14 B12 C13 A13 B13 A12 C12 B14 F12 H14 N10 N6 M14 M13 H13 H12 C6 C2 K14 P12 L14 M11 G2 E2 E14 D12 J12 G14 J13 F14 F13 E13 D3 C4 J1 H1 N9 K13 G13 G3 A8 K2 L1 P14 C1 B2 D1 F2 F3 C3 FLASH_A[0..21] FLASH_CLK [8] FPGA_CSN [4] FPGA_CS1N [4] FPGA_WRITE [4] FLASH_D15 FLASH_D14 FLASH_D13 FLASH_D12 FLASH_D11 FLASH_D10 FLASH_D9 FLASH_D8 FLASH_D7 FLASH_D6 FLASH_D5 FLASH_D4 FLASH_D3 FLASH_D2 FLASH_D1 FLASH_D0 FLASH_CLK FLASH_WE_N FLASH_WP_N_ACC FLASH_RESET_N FLASH_OE_N FLASH_CEm FLASH_RD/BY FLASH_BYTEn FLASH_A0 FLASH_A1 FLASH_A2 FLASH_A3 FLASH_A4 FLASH_A5 FLASH_A6 FLASH_A7 FLASH_A8 FLASH_A9 FLASH_A10 FLASH_A11 FLASH_A12 FLASH_A13 FLASH_A14 FLASH_A15 FLASH_A16 FLASH_A17 FLASH_A18 FLASH_A19 FLASH_A20 FLASH_A21 10NF-0603SMT FLASH_A21 FLASH_A20 FLASH_A19 FLASH_A18 FLASH_A17 FLASH_A16 FLASH_A15 FLASH_A14 FLASH_A13 FLASH_A12 FLASH_A11 FLASH_A10 FLASH_A9 FLASH_A8 FLASH_A7 FLASH_A6 FLASH_A5 FLASH_A4 FLASH_A3 FLASH_A2 FLASH_A1 FLASH_A0 2 H6 H1 C4 D3 D4 C3 B2 E6 D6 C6 A6 B6 D5 C5 A5 B5 A2 C2 D2 B1 A1 C1 D1 E1 2 U14 VCC DQ15 DQ14 DQ13 DQ12 DQ11 DQ10 DQ9 DQ8 DQ7 DQ6 DQ5 DQ4 DQ3 DQ2 DQ1 DQ0 CEn OEn WEn RD/BY BYTEn WPn RESETn FLASH_D[0..15] S29GL064A GND GND A21 A20 A19 A18 A17 A16 A15 A14 A13 A12 A11 A10 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0 G4 G6 F5 G5 F4 G3 F3 G2 F2 E5 H5 E4 H4 H3 E3 H2 E2 F1 G1 A4 A3 F6 B3 B4 3_3V C137 C138 3_3V Monday, March 10, 2008 1 S he e t 5 ECP2M PCIe Solutions Eval Board P roje c t of 9 R ev 2.5 1605 Valley Center Parkway Bethlehem, PA 18017 Parallel FPGA Loader R201 10K-0603SMT FLASH_D[0..15] 10NF-0603SMT D a te : S iz e C Title FLASH_D15 FLASH_D14 FLASH_D13 FLASH_D12 FLASH_D11 FLASH_D10 FLASH_D9 FLASH_D8 FLASH_D7 FLASH_D6 FLASH_D5 FLASH_D4 FLASH_D3 FLASH_D2 FLASH_D1 FLASH_D0 FLASH_CEm FLASH_OE_N FLASH_WE_N FLASH_RD/BY FLASH_BYTEn FLASH_WP_N_ACC FLASH_RESET_N 100NF-0603SMT 1 A B C D Lattice Semiconductor LatticeECP2M PCI Express Solutions Board User’s Guide Figure 24. Parallel FPGA Loader 27 A B C 5 x1_PERp0 x1_PERn0 x1_PCIE_CLKP x1_PCIE_CLKN PCIE_PERSTN PCIE_3V3 12_0V C151 PRSNT1# +12V +12V GND JTAG2 JTAG3 JTAG4 JTAG5 +3.3V +3.3V PERST# GND REFCLK+ REFCLKGND PERp0 PERn0 GND CN1 +12V +12V RSVD_B3 GND SMCLK SMDAT GND +3.3V JTAG1 3.3Vaux WAKE# RSVD_B12 GND PETp0 PETn0 GND PRSNT3# GND C152 PCIE_3V3 X1 PCIe Board Fingers B1 B2 B3 B4 B5 B6 B7 B8 B9 B10 B11 B12 B13 B14 B15 B16 B17 B18 x1_PERn0 x1_PETp0 x1_PETn0 [8] [8] x1_PERp0 FPGA_SMA_REFCLKN FPGA_SMA_REFCLKP PCI Express x1 Edge Finger Conn. A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 A17 A18 1 1 100NFX5R-0402SMT 100NFX5R-0402SMT J9 J8 4 1 4 B side = Primary Component Side(TOP) A side = Secondary Component Side(BOTTOM) L_HDOUTN0 50 [8] PCIE_PERSTN L_HDOUTP0 50 Rosenberger 32K153-400E3 Rosenberger 32K153-400E3 2 2 D 5 TP14 TESTPOINT 3 x4_PCIE_CLKP OPEN-0603SMT R77 OPEN-0603SMT x4_PCIE_CLKN x1_PCIE_CLKN SERDES U_HDOUTP3 U_HDOUTN3 U_HDOUTP2 U_HDOUTN2 U_HDOUTP1 U_HDOUTN1 U_HDOUTP0 U_HDOUTN0 L_HDOUTP3 L_HDOUTN3 L_HDOUTP2 L_HDOUTN2 L_HDOUTP1 L_HDOUTN1 L_HDOUTP0 L_HDOUTN0 Place near U1 R76 ecp2m-672fpbga U_HDINP3 U_HDINN3 U_HDINP2 U_HDINN2 U_HDINP1 U_HDINN1 U_HDINP0 U_HDINN0 U_REFCLKP U_REFCLKN L_HDINP3 L_HDINN3 L_HDINP2 L_HDINN2 L_HDINP1 L_HDINN1 L_HDINP0 L_HDINN0 L_REFCLKP L_REFCLKN U1A x1_PCIE_CLKP A14 B14 A15 B15 A23 B23 A24 B24 D19 E19 AF14 AE14 AF15 AE15 AF23 AE23 AF24 AE24 AC19 AB19 x1_PRSNTn [8] x4_PETp0 x4_PETn0 x4_PETp1 x4_PETn1 x4_PETp2 x4_PETn2 x4_PETp3 x4_PETn3 x4_PCIE_CLKP x4_PCIE_CLKN LOOP3_P LOOP3_N LOOP2_P LOOP2_N LOOP1_P LOOP1_N x1_PETp0 x1_PETn0 x1_PCIE_CLKP x1_PCIE_CLKN A17 B17 A18 B18 A20 B20 A21 B21 AF17 AE17 AF18 AE18 AF20 AE20 AF21 AE21 U_HDOUTP3 U_HDOUTN3 U_HDOUTP2 U_HDOUTN2 U_HDOUTP1 U_HDOUTN1 U_HDOUTP0 U_HDOUTN0 LOOP3_P LOOP3_N LOOP2_P LOOP2_N LOOP1_P LOOP1_N L_HDOUTP0 L_HDOUTN0 All Nets are 100-ohm differential pairs. The P and N traces shall be <20mil matched in length 3 2 x4_PERp3 x4_PERn3 x4_PERp2 x4_PERn2 x4_PERp1 x4_PERn1 x4_PERp0 x4_PERn0 x4_PCIE_CLKP x4_PCIE_CLKN PCIE_PERSTN PCIE_3V3 12_0V 2 U_HDOUTP3 PRSNT1# +12V +12V GND JTAG2 JTAG3 JTAG4 JTAG5 +3.3V +3.3V PERST# GND REFCLK+ REFCLKGND PERp0 PERn0 GND RSVD_A19 GND PERp1 PERn1 GND GND PERp2 PERn2 GND GND PERp3 PERn3 GND RSVD_A32 CN2 C147 C149 1 C150 C148 C146 C144 x4_PERp0 TP13 TESTPOINT x4_PERn3 x4_PERp3 x4_PERn2 x4_PERp2 x4_PERn1 x4_PERp1 x4_PERn0 x4_PRSNTn [8] D a te : S iz e C Title Monday, March 03, 2008 1 S he e t 6 ECP2M PCIe Solutions Eval Board P roje c t SERDES of 9 R ev 2.5 1605 Valley Center Parkway Bethlehem, PA 18017 B side = Secondary Component Side(BOTTOM) A side = PRIMARY Component Side(TOP) X4 PCIe Board Fingers x4_PETp3 x4_PETn3 x4_PETp2 x4_PETn2 x4_PETp1 x4_PETn1 x4_PETp0 x4_PETn0 PCIE_3V3 100NFX5R-0402SMT 100NFX5R-0402SMT 100NFX5R-0402SMT 100NFX5R-0402SMT B1 B2 B3 B4 B5 B6 B7 B8 B9 B10 B11 B12 B13 B14 B15 B16 B17 B18 B19 B20 B21 B22 B23 B24 B25 B26 B27 B28 B29 B30 B31 B32 C145 100NFX5R-0402SMT 100NFX5R-0402SMT +12V +12V RSVD_B3 GND SMCLK SMDAT GND +3.3V JTAG1 3.3Vaux WAKE# RSVD_B12 GND PETp0 PETn0 GND PRSNT3# GND PETp1 PETn1 GND GND PETp2 PETn2 GND GND PETp3 PETn3 GND RSVD_B30 PRSNT4# GND C143 100NFX5R-0402SMT 100NFX5R-0402SMT PCI Express x4 Edge Finger Conn. A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 A17 A18 A19 A20 A21 A22 A23 A24 A25 A26 A27 A28 A29 A30 A31 A32 U_HDOUTN0 U_HDOUTP0 U_HDOUTN1 U_HDOUTP1 U_HDOUTN2 U_HDOUTP2 U_HDOUTN3 1 A B C D Lattice Semiconductor LatticeECP2M PCI Express Solutions Board User’s Guide Figure 25. SERDES A B C D 5 FPGA_DDR_VREF SP12 SP11 SP10 SP9 SP8 SP7 SP6 SP5 1 1 1 1 1 1 1 R96 0R-0603SMT ODT0 CS0# CAS# RAS# A4 A7 BA0 A11 A5 BA1 A1 A6 A3 A2 A0 A9 A12 DQ8 DQ9 DQ15 DQ14 DQ12 DQ13 DQ10 DQ11 DQS1 DQS1# DM1 A8 DM0 WE# DQS0 DQS0# DQ0 DQ1 DQ3 DQ7 DQ6 DQ4 DQ2 DQ5 CKE0 A10 K K# DDR2_DQ[0:15] RN9 1 2 3 4 DDR2_DQ12 DDR2_DQ13 DDR2_DQ14 DDR2_DQ15 33 33 33 33 741X083 8 7 6 5 741X083 8 7 6 5 741X083 8 7 6 5 741X083 8 7 6 5 DQ12 DQ13 DQ14 DQ15 DQ8 DQ9 DQ10 DQ11 DQ4 DQ5 DQ6 DQ7 DQ0 DQ1 DQ2 DQ3 AB6 Y8 AD1 AD2 AC5 AA8 AC6 W9 AB7 Y9 AD3 AD4 AA9 W10 AC7 Y10 AE2 AD5 AE4 AE3 W11 AB8 AE5 AD6 AA10 AC8 W12 AC9 W13 AB10 AF3 AF4 AF5 AF6 Y12 AB11 AD7 AF7 AD8 AA12 AE8 AF8 AD9 AC10 AC11 AB12 AD10 Y13 AF9 AE9 AF10 AE10 AD11 AF11 AA13 AB13 W14 AC12 AF12 AD12 DDR2_DQS1# DDR2_DQS1 DDR2_DQS0# DDR2_DQS0 DQS1# DQS1 DQS0# DQS0 ecp2m-672fpbga PB2A PL2A* PB2B PL2B* PB3A PL3A PB3B PL3B PB4A PL4A* PB4B PL4B* PB5A PL5A PB5B PL5B PB6A PL6A* PB6B PL6B* PB7A PL7A PB7B PL7B PL8A* PB8A PL8B* PB8B PB9A PL9A/VREF2_7 PB9B PL9B/VREF1_7 PB10A PL11A*/LUM0_SPLLT_IN_A PB10B PL11B*/LUM0_SPLLC_IN_A PB11A PL12A/LUM0_SPLLT_FB_A PL12B/LUM0_SPLLC_FB_A PB11B PB12A PL13A* PL13B* PB12B PB13A PL14A PB13B PL14B PB14A PL16A PL16B PB14B PB15A PL17A* PB15B PL17B* PB16A PL19A* PL19B* PB16B PB17A PL20A PB17B PL20B PB18A PL21A* PB18B PL21B* PB19A PL22A PB19B PL22B PB20A PL23A* PB20B PL23B* PB21A PL24A PB21B PL24B PB22A PL25A* PB22B PL25B* PB23A PL26A PB23B PL26B PB24A PL28A*/LUM1_SPLLT_IN_A PB24B PL28B*/LUM1_SPLLC_IN_A PB25A PL29A/LUM1_SPLLT_FB_A PB25B PL29B/LUM1_SPLLC_FB_A PB26A PL30A* PB26B PL30B* PB27A PL31A PB27B PL31B PL32A* PB28A PB28B PL32B* PB33A PL33A PB33B PL33B PB34A/VREF2_5 PL34A* PB34B/VREF1_5 PL34B* PB35A/PCLKT5_0 PL35A/PCLKT7_0 PB35B/PCLKC5_0 PL35B/PCLKC7_0 U1C R200 33R-0603SMT R199 33R-0603SMT R198 33R-0603SMT R197 33R-0603SMT These resistors should be placed near the FPGA. RN7 1 2 3 4 RN5 1 2 3 4 DDR2_DQ4 DDR2_DQ5 DDR2_DQ6 DDR2_DQ7 DDR2_DQ8 DDR2_DQ9 DDR2_DQ10 DDR2_DQ11 RN3 1 2 3 4 DDR2_DQ0 DDR2_DQ1 DDR2_DQ2 DDR2_DQ3 4 C2 C1 F6 H9 D3 D2 F5 H8 E3 E2 J9 E4 E1 D1 J8 F4 F3 F1 G6 K9 G5 G4 H5 H6 J7 H4 H3 G3 G1 H1 J3 J4 H2 J2 K7 J6 K5 L5 K4 L4 K3 L3 J1 K2 K1 L1 K8 M5 M4 M3 L8 M6 M1 N1 N3 N2 N5 N4 M7 M8 K K# CS0# BA0 BA1 CKE0 WE# RAS# CAS# ODT0 DM0 DM1 A12 A8 A9 A10 A11 A4 A5 A6 A7 A0 A1 A2 A3 8 7 6 5 R84 22 22 22 RN13 8 7 6 5 RN12 8 7 6 5 RN11 8 7 6 5 RN10 8 7 6 5 22 22 22 22 DDR2_A0 DDR2_A1 DDR2_A2 DDR2_A3 741X083 DDR2_K 1 DDR2_K# 2 3 4 741X083 DDR2_CS0# 1 DDR2_BA0 2 DDR2_BA1 3 DDR2_CKE0 4 741X083 DDR2_WE# 1 DDR2_RAS# 2 DDR2_CAS# 3 DDR2_ODT0 4 741X083 DDR2_DM0 1 DDR2_DM1 2 3 4 DDR2_A12 741X083 DDR2_A8 1 DDR2_A9 2 DDR2_A10 3 DDR2_A11 4 741X083 DDR2_A4 1 DDR2_A5 2 DDR2_A6 3 DDR2_A7 4 RN4 1 2 3 4 22R-0603SMT RN8 8 7 6 5 RN6 8 7 6 5 741X083 1_8V 1K_ADJ/SMT3MM R93 1_8V 10NF-0603SMT A3 B3 C3 D3 E3 F3 G3 H3 J3 BLM41PG600SN1 FB7 DDR2_DQ0 DDR2_DQ2 DDR2_DQ4 DDR2_DQ6 DDR2_DQ8 DDR2_DQ10 DDR2_DQ12 DDR2_DQ14 R1=50 Ohm R1 R1 RP1 A1 B1 C1 D1 E1 F1 G1 H1 J1 3 + C176 C177 SDRAM_VREF SDRAM_VDDL + C171 1_8V + C169 1_8V C172 C170 FPGA_VTT PP9 These resistors should be placed near the FPGA. CTS-RT1402B7 A3 B3 C3 D3 E3 F3 G3 H3 J3 FPGA_VTT This RT140287/50-ohm pack should be placed near the FPGA. VDD VDD VDD VDD VDD VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VSS VSS VSS VSS VSS VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VREF VDDL VSSDL U16B DDR2_DQ1 DDR2_DQ3 DDR2_DQ5 DDR2_DQ7 DDR2_DQ9 DDR2_DQ11 DDR2_DQ13 DDR2_DQ15 DDR2-SDRAM-84FBGA A1 E1 J9 M9 R1 A9 C1 C3 C7 C9 E9 G1 G3 G7 G9 A3 E3 J3 N1 P9 A7 B2 B8 D2 D8 E7 F2 F8 H2 H8 J2 J1 J7 A1 B1 C1 D1 E1 F1 G1 H1 J1 DQ15 DQ14 DQ13 DQ12 DQ11 DQ10 DQ9 DQ8 DQ7 DQ6 DQ5 DQ4 DQ3 DQ2 DQ1 DQ0 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 LDQS LDQS#/NU UDQS UDQS#/NU LDM UDM CK CK# CKE WE# RAS# CAS# ODT CS# BA0 BA1 NC_A2 NC_E2 NC_R8 RFU_L1 RFU_R3 RFU_R7 2 16-BIT DDR2 INSTANCE #1 B9 B1 D9 D1 D3 D7 C2 C8 F9 F1 H9 H1 H3 H7 G2 G8 M8 M3 M7 N2 N8 N3 N7 P2 P8 P3 M2 P7 R2 F7 E8 B7 A8 F3 B3 J8 K8 K2 K3 K7 L7 K9 L8 L2 L3 A2 E2 R8 L1 R3 R7 C159 C161 C162 FPGA_VTT C163 C164 1 C165 VDDQ VREF SD LP2996-SO8 5 4 2 U15 1_8V VTT VSENSE C166 8 3 + + C167 DDR2_DQ15 DDR2_DQ14 DDR2_DQ13 DDR2_DQ12 DDR2_DQ11 DDR2_DQ10 DDR2_DQ9 DDR2_DQ8 DDR2_DQ7 DDR2_DQ6 DDR2_DQ5 DDR2_DQ4 DDR2_DQ3 DDR2_DQ2 DDR2_DQ1 DDR2_DQ0 DDR2_A0 DDR2_A1 DDR2_A2 DDR2_A3 DDR2_A4 DDR2_A5 DDR2_A6 DDR2_A7 DDR2_A8 DDR2_A9 DDR2_A10 DDR2_A11 DDR2_A12 DDR2_DQS0 DDR2_DQS0# DDR2_DQS1 DDR2_DQS1# DDR2_DM0 DDR2_DM1 DDR2_K DDR2_K# DDR2_CKE0 DDR2_WE# DDR2_RAS# DDR2_CAS# DDR2_ODT0 DDR2_CS0# DDR2_BA0 DDR2_BA1 D a te : S iz e C Title R207 Monday, March 10, 2008 C168 + R82 0R-0603SMT PP8 FPGA_VTT 1 S he e t 7 of 9 R ev 2.5 1605 Valley Center Parkway Bethlehem, PA 18017 100R-0402SMT ECP2M VIDEO Card P roje c t DDR2 Memory DDR2_K# Place Close to U16 DDR2_K ALL Memory controller buses, clocks, and control traces must be 50 Ohm Transmission lines 1_8V FPGA_DDR_VREF R86 0R-0603SMT 2_5V 100NF-0603SMT 100NF-0603SMT 100NF-0603SMT 100NF-0603SMT 10NF-0603SMT 10NF-0603SMT 10NF-0603SMT C158 R85 OPEN-0603SMT 1K_ADJ/SMT3MM R83 DDR2-SDRAM-84FBGA U16A 1_8V 2 C153 All these 741X083/22-ohm devices should be placed near the FPGA. C175 1 J2 J2 100NF-0603SMT 1 1 1 1 C2 1UF-16V-0805SMT C154 SP4 Bank5 B2 B2 1UF-16V-0805SMT 1UF-16V-0805SMT SP3 Bank7 H2 H2 R88 51R-0603SMT DDR2_DQS1 C155 All these 741X083/33-ohm devices should be placed near the FPGA. R92 1K-0603SMT R94 1K-0603SMT G2 G2 R89 51R-0603SMT DDR2_DQS1# C156 SP2 C174 A2 A2 C2 22UF-16V_TANTBSMT 100NF-0603SMT SP1 C173 10NF-0603SMT D2 F2 F2 1UF-16V-0805SMT C157 3 C180 R81 1K-0603SMT R87 1K-0603SMT R80 4_7K-0603SMT E2 22UF-16V_TANTBSMT 47UF-10V_TANTBSMT 100UF-FKSMT E2 R90 51R-0603SMT DDR2_DQS0 C178 C160 10NF-0603SMT 6 7 AVIN PVIN GND 1 100NF-0603SMT 1UF-16V-0805SMT 4 10UF-16V_TANTBSMT D2 R91 51R-0603SMT DDR2_DQS0# 22UF-16V_TANTBSMT 100NF-0603SMT 5 1 2 28 C179 DDR2_A[0:12] 10NF-0603SMT 1 2 100NF-0603SMT DDR2_DQ[0:15] 100NF-0603SMT A B C D Lattice Semiconductor LatticeECP2M PCI Express Solutions Board User’s Guide Figure 26. DDR2 Memory DDR2_A[0:12] A B C D LA1 LA3 LA5 LA7 LA9 LA11 LA13 LA15 LA17 LA19 LA21 LA23 LA25 LA27 LA29 LA31 LA33 2 4 6 8 10 12 14 16 18 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 2_767004 5V SCL GND SDA CLK1 CLK 7 8 9 10 11 12 13 14 15 16 17 18 19 20 22 21 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 LA1 CY2304-1 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 GND N/C REF FBK CLKA1 VDD CLKA2 CLKB2 GND CLKB1 U17 Y2 OUT Vcc HEADER 9X2 J10 1 3 5 7 9 11 13 15 17 R78 51R-0603SMT 5 R79 51R-0603SMT PLACE CLOSE TO U1 [6] FPGA_SMA_REFCLKP [6] FPGA_SMA_REFCLKN 1 2 3 4 3 4 8 7 6 5 2 1 LA2 LA4 LA6 LA8 LA10 LA12 LA14 LA16 LA18 LA20 LA22 LA24 LA26 LA28 LA30 LA32 LA34 OSC_IN_3 OSC_IN_4 C183 100NF-0603SMT TP_0 E23 TP_1 E24 TP_2 F26 TP_3 G26 TP_4 F21 TP_5 H20 TP_6 F24 TP_7 F23 TP_8 F22 TP_9 J18 TP_10 G23 TP_11 G24 TP_12 K19 TP_13 G22 TP_14 H26 TP_15 H25 H24 H23 J19 G21 J26 J25 J20 H22 K18 H21 J21 K20 J24 J23 K21 L19 K23 K24 K26 K25 M19 K22 L26 M26 M20 L23 L24 L22 N26 M23 M24 M22 N25 N24 C182 10NF-0603SMT ecp2m-672fpbga Right 4 PR9A/VREF1_2 PR9B/VREF2_2 PR11A*/RUM0_SPLLT_IN_A PR11B*/RUM0_SPLLC_IN_A PR37A*/PCLKT3_0 PR12A/RUM0_SPLLT_FB_A PR37B*/PCLKC3_0 PR12B/RUM0_SPLLC_FB_A PR38A/VREF1_3 PR13A* PR38B/VREF2_3 PR13B* PR39A* PR14A PR39B* PR14B PR40A PR15A* PR40B PR15B* PR41A*/RLM2_SPLLT_IN_A PR16A PR41B*/RLM2_SPLLC_IN_A PR16B PR42A/RLM2_SPLLT_FB_A PR17A* PR42B/RLM2_SPLLC_FB_A PR17B* PR44A* PR18A PR44B* PR18B PR45A PR19A* PR45B PR19B* PR46A* PR20A PR46B* PR20B PR47A PR21A* PR47B PR48A* PR21B* PR22A PR48B* PR22B PR49A PR23A* PR49B PR23B* PR50A* PR24A PR50B* PR24B PR51A PR25A* PR51B PR25B* PR53A* PR26A PR53B* PR26B PR54A PR28A*/RUM1_SPLLT_IN_A PR54B PR28B*/RUM1_SPLLC_IN_A PR55A* PR29A/RUM1_SPLLT_FB_A PR55B* PR29B/RUM1_SPLLC_FB_A PR56A PR30A* PR57A*/RLM0_GPLLT_FB_A PR30B* PR57B*/RLM0_GPLLC_FB_A PR31A PR58A/RLM0_GPLLT_IN_A PR31B PR58B/RLM0_GPLLC_IN_A PR32A* PR59A*/RLM0_GDLLT_IN_A PR32B* PR59B*/RLM0_GDLLC_IN_A PR60A/RLM0_GDLLT_FB_A PR33A PR33B PR60B/RLM0_GDLLC_FB_A PR34A* PR34B* PR35A/PCLKT2_0 PR35B/PCLKC2_0 U1E LOGIC ANALYZER PROBE FLASH_CLK OSC_IN_2 Connected to SMA inputs [5] FLASH_CLK 100NF-0603SMT C181 CTS-CB3LV-3C-100.00MHZ 3_3V 100MHZ GENERAL PURPOSE CLOCKS Bank3 3_3V Bank2 N23 M21 P26 P25 N22 N20 P22 N21 P24 P23 N19 R22 R24 R23 P19 P21 R26 T26 R20 R21 R19 T19 U26 U25 T23 T22 T24 U24 V26 V25 U22 U18 W26 W25 U21 V24 W24 U20 V23 Y26 AA26 U19 V21 PB40A/PCLKT4_0 PB40B/PCLKC4_0 PB41B/VREF1_4 PB42A PB42B PB48A PB49A PB49B PB50B PB51A PB52A PB52B PB54A PB54B PB57A PB58A PB59B PB60A PB61A PB61B PB63A PB65A PB65B PB68B PB69A PB69B PB70B PB71A PB71B PB72B PB73A PB73B Bank4 3_3V 18 PL37A*/PCLKT6_0 PL37B*/PCLKC6_0 PL38A/VREF2_6 PL38B/VREF1_6 PL39A* PL39B* PL40A PL40B PL41A*/LLM2_SPLLT_IN_A PL41B*/LLM2_SPLLC_IN_A PL42A/LLM2_SPLLT_FB_A PL42B/LLM2_SPLLC_FB_A PL44A* PL44B* PL45A PL45B PL46A* PL46B* PL47A PL47B PL48A* PL48B* PL49A PL49B PL50A* PL50B* PL51A PL51B PL55A* PL55B* PL57A*/LLM0_GPLLT_IN_A PL57B*/LLM0_GPLLC_IN_A PL58A/LLM0_GPLLT_FB_A PL58B/LLM0_GPLLC_FB_A PL59A*/LLM0_GDLLT_IN_A PL59B*/LLM0_GDLLC_IN_A PL60A/LLM0_GDLLT_FB_A PL60B/LLM0_GDLLC_FB_A PL62A* PL62B* PL63A PL63B PL64A* PL64B* PL65A PL65B PL66A* PL66B* PL67A PL67B PL68A* PL68B* PL69A PL69B Bank6 3 P3 P2 P5 N6 P4 R3 P6 N7 P1 R1 N8 R5 T3 T4 P8 R6 T1 U1 R7 T5 U3 U4 U5 U6 U2 V1 W2 V2 V4 V3 W4 W3 W1 Y1 AA1 AB1 U7 V6 W5 Y4 U8 W6 Y3 AA3 V7 Y5 AB2 AA4 Y6 U9 AA5 AA6 Y7 V9 3 4 5 6 7 8 13 RN16E 16 RN16F 1 RN16G 2 RN16H [4,5] 2 9 RN16D 8 4 RN14H 8 RN16C 6 3 RN14F 6 RN16B 5 17 RN14E 1 4 15 RN14D 5 RN16A 3 12 RN14C X4_DL_UP X4_USR3 X4_POLL X4_USR0 X4_L0 X4_USR2 X4_PLL_LK X4_USR1 9 10 11 12 13 3 R102 0R-0603SMT GSRN OSC_IN_3 FPGA_0 FPGA_1 FPGA_2 FPGA_3 FPGA_4 FPGA_5 FPGA_6 FPGA_7 FPGA_8 FPGA_9 FPGA_10 FPGA_11 FPGA_12 FPGA_13 FPGA_14 FPGA_15 [6] PCIE_PERSTN R206 OPEN-0603SMT GSRN EXB2HV151JV 14 150R 15 16 9 11 12 13 14 R97 150R-0603SMT 14 RN14A 1 16 EXB2HV151JV 2 15 7 RN14B 150R 11 RN14G 7 10 10 LTP-587HR/16-SEGMENT D13 R192 4_7K-0603SMT 3_3V [5] FPGA_[0:15] OSC_IN_4 OSC_IN_2 SWITCH1 SWITCH2 SWITCH3 SWITCH4 SWITCH5 SWITCH6 SWITCH7 SWITCH8 X1_DL_UP X1_USR3 X1_POLL X1_USR0 X1_L0 X1_USR2 X1_PLL_LK X1_USR1 These pins are connected to the XO CPLD. R191 4_7K-0603SMT [6] x1_PRSNTn [6] x4_PRSNTn ecp2m-672fpbga LA1 LA2 LA3 LA4 LA5 LA6 LA7 LA8 LA9 LA10 LA11 LA12 LA13 LA14 LA15 LA16 LA17 LA18 LA19 LA20 LA21 LA22 LA23 LA24 LA25 LA26 LA27 LA28 LA29 LA30 LA31 LA32 LA33 LA34 AC13 Y14 AC14 AB14 AA14 AC15 AB15 AC16 AB16 AA15 Y15 AC17 W15 AB17 AB20 AC20 W16 AA17 AA18 Y17 AC21 W17 AA19 Y18 AC22 AB21 AD26 AC23 AC25 W20 V17 AA20 U1D G7 G8 F8 J10 D4 C3 F7 G9 C4 B2 C5 B3 E7 H10 F9 G10 E6 D5 H11 D7 F10 C6 A3 A4 A5 A6 H12 D8 G12 C8 C7 D6 H13 D9 A7 B8 C9 G13 E10 F12 A8 B9 E8 C10 A9 H14 D10 F13 E11 G14 D11 B10 A10 H15 H18 H16 D12 A11 A12 F14 C11 G15 C12 Bank0 ecp2m-672fpbga PT2A PT2B PT3A PT3B PT4A PT4B PT5A PT5B PT6A PT6B PT7A PT7B PT8A PT8B PT9A PT9B PT10A PT10B PT11A PT11B PT12A PT12B PT13A PT13B PT14A PT14B PT15A PT15B PT16A PT16B PT17A PT17B PT18A PT18B PT19A PT19B PT20A PT20B PT21A PT21B PT22A PT22B PT23A PT23B PT24B PT29A PT29B PT30A PT30B PT31A PT31B PT32A PT32B PT33A PT33B PT34A PT34B PT35A PT35B PT36A/VREF1_0 PT36B/VREF2_0 PT37A/PCLKT0_0 PT37B/PCLKC0_0 U1F 4 4_7K 13 RN17D EXB2HV472JV 5 4_7K 12 RN17E EXB2HV472JV 11 RN17F 6 4_7K EXB2HV472JV 7 4_7K 10 RN17G EXB2HV472JV SWITCH5 SWITCH4 SWITCH3 SWITCH2 Top E13 H17 E12 F15 D13 D14 E14 G17 E15 G18 D15 E16 F18 F19 D16 F17 D17 E17 8 470R 9 RN18H EXB2HV471JV USR1_PU PT38A/PCLKT1_0 PT38B/PCLKC1_0 PT39A/VREF1_1 PT39B/VREF2_1 PT40A PT40B PT41A PT41B PT42A PT42B PT43A PT43B PT44A PT44B PT45A PT45B PT46A PT46B 7 470R 10 RN18G EXB2HV471JV PLL_LK_PU 6 470R 11 RN18F EXB2HV471JV USR0_PU USR2_PU 3 470R 14 RN18C EXB2HV471JV 4 470R 13 RN18D EXB2HV471JV POLL_PU 5 470R 12 RN18E EXB2HV471JV 2 470R 15 RN18B EXB2HV471JV L0_PU 1 470R 16 RN18A EXB2HV471JV USR3_PU 3_3V SWITCH8 SWITCH7 SWITCH6 SWITCH5 SWITCH4 SWITCH3 SWITCH2 SWITCH1 DL_UP_PU SW DIP-8/SM SW5 14 RN17C 3 4_7K EXB2HV472JV SWITCH6 8 4_7K 9 RN17H EXB2HV472JV 2 4_7K 15 RN17B EXB2HV472JV SWITCH7 SWITCH1 1 4_7K 16 RN17A EXB2HV472JV SWITCH8 3_3V DIP SWITCH 2 SEGMENT A B C D E F G H K M N P R S T U DP 2 D28 LED USER 0 USR0_PU LED USER 3 D24 USR3_PU D26 POLLING STATUS POLL_PU LED-SMT1206_YELLOW BGA H16 H15 B10 G14 F13 H14 C10 B9 F12 G13 B8 D9 D6 C8 D8 A6 A4 D a te : S iz e C Title FPGA TEST D29 LED USER 1 USR1_PU D25 LED USER 2 USR2_PU D27 Thursday, March 13, 2008 1 S he e t 8 of 9 R ev 2.5 1605 Valley Center Parkway Bethlehem, PA 18017 X4_USR1 X1_USR1 LED-SMT1206_BLUE D21 X4_USR2 X1_USR2 D16 LED-SMT1206_RED X4_PLL_LK X1_PLL_LK D23 PLL LOCK STATUS PLL_LK_PU L0 L0_PU ECP2M PCIe Solutions Eval Board P roje c t X4_L0 X1_L0 LED-SMT1206_GREEN D15 1 D19 LED-SMT1206_YELLOW LEDs 16-SEGMENT DISPLAY X4_USR0 X1_USR0 D20 LED-SMT1206_BLUE X4_USR3 X1_USR3 D17 LED-SMT1206_RED X4_POLL X1_POLL D18 LED-SMT1206_YELLOW X4_DL_UP X1_DL_UP LED-SMT1206_GREEN D14 DL UP D22 DL_UP_PU LED-SMT1206_GREEN LED-SMT1206_RED LED-SMT1206_BLUE LED-SMT1206_YELLOW LED-SMT1206_RED 4 Bank1 LED-SMT1206_GREEN LED-SMT1206_BLUE 5 DP U T S R P N M K H G F E D C B 29 A A B C D Lattice Semiconductor LatticeECP2M PCI Express Solutions Board User’s Guide Figure 27. FPGA Test 30 A B C D 5 C209 C239 C230 C241 VCCP VCCRX 1000PF-0402SMT C212 C217 C218 C219 C221 C222 C223 MH2 M HOLE2 MH1 M HOLE2 M HOLE2 MH3 1000PF-0402SMT 1000PF-0402SMT 1000PF-0402SMT 1000PF-0402SMT C220 Device Balls C16,C17,C21,C22 VCCTX 1000PF-0402SMT 1000PF-0402SMT 1000PF-0402SMT 1000PF-0402SMT C216 VCCOB L_1_2V_A Device Ball B19 1000PF-0402SMT C215 U_VCCAUX33 Device Ball C19 1000PF-0402SMT C214 L_VCCAUX33 VCCAUX33 1000PF-0402SMT 1000PF-0402SMT 1000PF-0402SMT 1000PF-0402SMT C234 U_VCCIB Device Balls C13,C14,C24,C25 U_1_2V_A C196 Device Balls C15,C23,B13,B25, VCCIB C195 1000PF-0402SMT 1000PF-0402SMT 1000PF-0402SMT 1000PF-0402SMT C194 L_VCCIB Device Balls AD15,AD23,AE13,AE25, Device Ball AE19 5 C202 C211 C203 C245 C242 C246 C530 C531 C532 C225 C226 C227 4 1000PF-0402SMT 1000PF-0402SMT 1000PF-0402SMT 1000PF-0402SMT C224 VCCTX Device Balls AD16,AD17,AD21,AD22 1000PF-0402SMT 1000PF-0402SMT 1000PF-0402SMT 1000PF-0402SMT C529 Device Balls AD13,AD14,AD24,AD25 VCCRX 1000PF-0402SMT C213 Device Balls AD19 VCCP 1000PF-0402SMT 1000PF-0402SMT 1000PF-0402SMT 1000PF-0402SMT C244 U_VCCOB Device Balls A22,C20,C18,A16 1000PF-0402SMT 1000PF-0402SMT 1000PF-0402SMT 1000PF-0402SMT C201 L_VCCOB 3 ecp2m-672fpbga VSS U1K VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS 3 A13 A19 A2 A25 AA2 AA25 AB18 AB22 AB5 AB9 AE1 AE11 AE16 AE22 AE26 AE6 AF13 AF19 AF2 AF25 B1 B11 B16 B22 B26 B6 E18 E22 E5 E9 F2 F25 G11 G16 J22 J5 K11 K13 K14 K16 L10 L11 L16 L17 L2 L20 L25 L7 M13 M14 N10 N12 N13 N14 N15 N17 P10 P12 P13 P14 P15 P17 R13 R14 T10 T11 T16 T17 T2 T20 T25 T7 U11 U13 U14 U16 V22 V5 Y11 Y16 VCC CORE ALL CAPS PLACED UNDER BGA Device Balls AF16,AD20,AD18,AF22 4 C185 C186 C187 C188 C189 C190 C191 VCCIO5 1_8V 2_5V C205 C192 C206 C193 C207 C208 C197 C198 C199 C200 2 1000PF-0402SMT 1000PF-0402SMT 1000PF-0402SMT 1000PF-0402SMT 1000PF-0402SMT C210 D a te : S iz e C Title Thursday, February 28, 2008 1 S he e t 9 of 9 R ev 2.0 1605 Valley Center Parkway Bethlehem, PA 18017 1 ECP2M PCIe Solutions Eval Board P roje c t VSS/Decoupling 1000PF-0402SMT 1000PF-0402SMT 1000PF-0402SMT 1000PF-0402SMT 1000PF-0402SMT 1000PF-0402SMT 1000PF-0402SMT C204 1000PF-0402SMT 1000PF-0402SMT 1000PF-0402SMT 1000PF-0402SMT 1000PF-0402SMT 1000PF-0402SMT 1000PF-0402SMT 1000PF-0402SMT C184 VCC_CORE 2 A B C D Lattice Semiconductor LatticeECP2M PCI Express Solutions Board User’s Guide Figure 28. VSS/Decoupling LatticeECP2M PCI Express Solutions Board User’s Guide Lattice Semiconductor Appendix B. Bill of Materials Table 17. Bill of Materials Item Quantity 1 1 CN1 Reference PCI Express x1 Edge Finger Conn. Part PCB Edge finger 2 1 CN2 PCI Express x4 Edge Finger Conn. PCB Edge finger 3 1 C1 470UF-FKSMT Panasonic EEV-FK1V471Q CAP 470UF 35V ELECT FK SMD 4 2 C2,C166 100UF-FKSMT Panasonic EEV-FK1V101XP CAP 100UF 35V ELECT FK SMD 5 9 C3,C5,C6,C8,C12,C13,C20,C14 10UF1,C168 16V_TANTBSMT AVX TAJB106K016R CAP 10UF 16V TANT B-SIZE 6 3 C4,C7,C21 Panasonic EEV-FK1C331P CAP 330UF 16V ELECT FK SMD 7 73 C9, C11, C14, C16, C17, C19, 100NF-0603SMT C33, C35, C39, C40, C41, C42, C44, C45,C46, C47, C48, C72, C73, C74, C76, C84, C85, C87, C89, C91,C93, C95, C97, C99, C101, C103, C105, C106, C107, C108, C109, C110, C111, C112, C113, C114, C125, C127, C128, C129, C130, C131, C133, C135, C137, C139, C140, C142, C153, C155, C157, C158, C161, C163, C165, C175, C178, C180, C181, C183, C520, C521, C535, C536, C539, C542, C526 Panasonic ECJ-1VF1C104Z CAP .1UF 16V CERAMIC Y5V 0603 8 19 C10, C15, C18, C31, C37, C49, 22UFC61, C68, C71, C80, C82, 16V_TANTBSMT C169, C171, C176, C522, C524, C537, C540, C527 Kemet T491B226M016AT CAPACITOR TANT 22UF 16V 20% SMD 9 61 C22, C23, C24, C25, C26, C27, 10NF-0603SMT C28, C29, C30, C34, C36, C51, C53, C54, C55, C56, C57, C58, C59, C60, C75, C77, C78, C79, C86, C88, C90, C92, C94, C96, C98, C100, C102, C104, C115, C116, C117, C118, C119, C120, C121, C122, C123, C124, C126, C132, C134, C136, C138, C159, C160, C162, C164, C173, C174, C179, C182, C518, C519, C533, C534 Kemet C0603C103K5RACTU CAP .01UF 50V CERAMIC X7R 0603 10 18 C32, C38, C43, C62, C69, C70, 1UF-16V-0805SMT C81, C83, C154, C167, C170, C172, C177, C523, C525,C528, C538, C541 Panasonic ECJ-2FB1C105K CAP 1UF 16V CERAMIC 0805 X5R 11 2 C50,C52 Panasonic ECJ-1VB1H562K CAP 5600PF 50V CERAMIC X7R 0603 12 59 C63, C64, C65, C66, C67, 1000PF-0402SMT C184, C185, C186, C187, C188, C189, C190, C191, C192, C193, C194, C195, C196, C197, C198, C199, C200, C201, C202, C203, C204, C205, C206, C207, C208, C209, C210, C211, C212, C214, C216, C217, C218, C219, C220, C221, C222, C223, C224, C225, C226, C227, C230, C234, C239, C241, C242, C244, C245, C246, C529, C530, C531, C532 Panasonic ECJ-0EB1E102K CAP 1000PF 25V CERAMIC X7R 0402 13 10 C143, C144, C145, C146, C147, 100NFX5R-0402SMT C148, C149, C150, C151,C152 Kemet C0402C104K8PACTU CAP .10UF 10V CERAMIC X5R 0402 14 1 C156 47UF10V_TANTBSMT Kemet T491B476M010AS CAPACITOR TANT 47UF 10V 20% SMD 15 2 C213, C215 1000pf 25V Ceramic X7R 0402 Panasonic ECJ-OEB1E102K 16 11 D1, D2, D3, D4, D5, D6, D7, D11, D12, D14, D15 LEDSMT1206_GREEN Panasonic LNJ316C83RA LED GREEN (UP) W/LENS 1206 17 5 D8, D9, D10, D16, D17 LED-SMT1206_RED Panasonic LNJ211R82RA LED RED (UP) W/LENS 1206 18 1 D13 LTP-587HR/16-SEGMENT Lite-On LTP-587HR 16-segment array 330UF-FKSMT 5.6nF Manufacturer 31 Part Number Description LatticeECP2M PCI Express Solutions Board User’s Guide Lattice Semiconductor Table 17. Bill of Materials (Continued) Item Quantity 19 2 D18, D19 Reference LEDSMT1206_YELLOW Part Panasonic Manufacturer LNJ411K84RA Part Number LED YELLOW (UP) W/LENS 1206 Description 20 2 D20, D21 LED-SMT1206_BLUE Panasonic LNJ916C8BRA LED BLUE (UP) W/LENS 1206 21 10 FB1, FB3, FB5, FB6, FB7, BLM41PG600SN1 FB19, FB22, FB23, FB26, FB27 Murata BLM41PG600SN1L FERRITE CHIP 60 OHM 6000MA 1806 22 0 FB2, FB4, FB18, FB20 BLM41PG600SN1(NO B) 23 6 F1, F2, F3, F4, F5, F6 F1228CT-ND Littlefuse 0154005.DR FUSEBLOCK WITH 5A FUSE SMD 24 1 J1 22HP037-2.1mm Condor 25 0 J2 HEADER 3 Samtec TSW-103-07-T-S 3x1-0.25 Header 26 2 J3, J11 HEADER 8 Samtec TSW-108-09-T-S-RA 8x1-0.25 Header-Right Angle 27 2 J8, J9 Rosenberger 32K153- Rosenberger 400E3 32K153-400E3 TH- SMA connector 28 1 J10 HEADER 9X2 Samtec TSW-109-07-T-D 9x2-0.25 Header 29 1 LA1 2_767004 Amp 2-767004-2 CONN RECEPT 38POS .025 VERT SMD 30 3 MH1, MH2, MH3 M HOLE2 31 0 PP1, PP2, PP3, PP4, PP5, PP6, PROBEPOINT PP7, PP8, PP9, PP10 32 5 Q1, Q2, Q3, Q4, Q5 2N2222/SOT23 Diodes Inc. MMBT2222A-7 TRANS NPN 40V 350MW SMD SOT-23 33 2 RN1, RN2 EXBV8V472JV Panasonic EXBV8V472JV RES ARRAY 4.7K OHM 5% 4 RES SMD 34 4 RN3, RN5, RN7, RN9 33 CTS Corporation 741X083330J Resistor/Electrocomponents RES ARRAY 33 OHM 8 TERM 4RES SMD 35 7 RN4, RN6, RN8, RN10, RN11, RN12, RN13 22 CTS Corporation 741X083220J Resistor/Electrocomponents RES ARRAY 22 OHM 8 TERM 4RES SMD 36 2 RN14,RN16 EXB2HV151JV Panasonic EXB2HV151JV RES ARRAY 150 OHM 5% 8 RES SMD 37 1 RN15 EXB2HV103JV Panasonic EXB2HV103JV RES ARRAY 10K OHM 5% 8 RES SMD 38 1 RN17 EXB2HV472JV Panasonic EXB2HV472JV RES ARRAY 4.7K OHM 5% 8 RES SMD 39 1 RP1 CTS-RT1402B7 CTS Corporation RT1402B7TR7 Resistor/Electrocomponents RES NET DDR SDRAM 50 OHM 3X9 BGA 40 5 R1, R2, R3, R4, R5 470R-1206SMT Panasonic ERJ-8GEYJ471V RES 470 OHM 1/4W 5% 1206 SMD 41 4 R6, R34, R64, R65 100R-0603SMT Panasonic ERA-3YEB101V RES 100 OHM 1/16W .1% 0603 SMD 42 2 R7, R97 150R-0603SMT Panasonic ERA-3YEB151V RES 150 OHM 1/16W .1% 0603 SMD 43 18 R8, R9, R10, R11, R30, R40, R41, R42, R46, R48, R50, 10K-0603SMT Panasonic ERJ-3GEYJ103V RES 10K OHM 1/10W 5% 0603 SMD 100K-0603SMT Panasonic ERJ-3GEYJ104V RES 100K OHM 1/10W 5% 0603 SMD power input R53, R54, R55, R56, R57, R58, R201 44 2 R12, R13 45 10 R14, R16, R29, R39, R67, R82, 0R-0603SMT R86, R96, R102, R194 Panasonic ERJ-3GEY0R00V RES ZERO OHM 1/10W 5% 0603 SMD 46 3 R15, R26, R27 0R-0805SMT Panasonic ERJ-6GEY0R00V RES 0.0 OHM 1/8W 5% 0805 SMD 47 4 R17, R31, R32, R35 124R-0603SMT Panasonic ERJ-3EKF1240V RES 124 OHM 1/16W 1% 0603 SMD 48 2 R18, R19 OPEN-0805SMT 49 2 R20, R23 BOURNS-3224W-10K Bourns 3224W-1-103E TRIMPOT 10K OHM 4MM TOP ADJ SMD 50 8 R66, R76, R77, R85, R202, R203, R204, R205 OPEN-0603SMT 32 LatticeECP2M PCI Express Solutions Board User’s Guide Lattice Semiconductor Table 17. Bill of Materials (Continued) Item Quantity 51 1 R22 27R-0603SMT Panasonic ERJ-3EKF270V RES 27 OHM 1/16W 1% 0603 SMD 52 1 R24 1_8K-0603SMT Panasonic ERJ-3GEYJ182V RES 1.8K OHM 1/10W 5% 0603 SMD 53 1 R25 BOURNS-3224W-2K Bourns 3224W-1-202E TRIMPOT 2K OHM 4MM TOP ADJ SMD 54 1 R28 100R-0805SMT Panasonic ERJ-6GEYJ101V RES 100 OHM 1/8W 5% 0805 SMD 55 1 R33 49_9R-0603SMT Yageo RC0603FR-0749R9RL RES 49.9 OHM 1/10W 1% 0603 SMD 56 2 R36, R38 BOURNS-3224W-5K Bourns 3224W-1-502E TRIMPOT 5K OHM 4MM TOP ADJ SMD 57 1 R37 56R-0603SMT Panasonic ERJ-3EKF560V RES 56 OHM 1/16W 1% 0603 SMD 58 3 R43, R44, R47 680R-0603SMT Panasonic ERJ-3GEYJ681V RES 680 OHM 1/10W 5% 0603 SMD 59 6 R45, R59, R60, R61, R62, R80 4_7K-0603SMT Panasonic ERJ-3GEYJ472V RES 4.7K OHM 1/10W 5% 0603 SMD 60 2 R49, R63 220R-0603SMT Panasonic ERJ-3GEYJ221V RES 220 OHM 1/10W 5% 0603 SMD 61 1 R68 2_2K-0603SMT Panasonic ERJ-3GEYJ222V RES 2.2K OHM 1/10W 5% 0603 SMD 62 9 R51, R52, R69, R70, R81, R87, 1K-0603SMT R92, R94, R195 Panasonic ERJ-3EKF1001V RES 1.00K OHM 1/16W 1% 0603 SMD 63 2 R71, R72 130R-0603SMT Panasonic ERA-3YEB131V RES 130 OHM 1/16W .1% 0603 SMD 64 1 R73 1_6R-0603SMT Panasonic ERJ-3GEYJ1R6V RESISTOR 1.6 OHM 1/10W 5% 0603 65 2 R74, R75 82R-0603SMT Yageo RC06031A82R0FKHFT RES 82.0 OHM 1/10W 1% 0603 SMD 66 6 R78, R79, R88, R89, R90, R91 51R-0603SMT Panasonic ERJ-3GEYJ510V RES 51 OHM 1/10W 5% 0603 SMD 67 2 R83, R93 1K_ADJ/SMT3MM BC Components ST3A102CT POT 1K 3MM CERM SQ S/T SMD 68 1 R84 22R-0603SMT Yageo RC0603FR-0722RL RES 22.0 OHM 1/10W 1% 0603 SMD 69 8 R98, R99, R100, R101, R103, R104, R105, R106 680R-1206SMT Panasonic ERJ-8GEYJ681V RES 680 OHM 1/4W 5% 1206 SMD 70 12 SP1, SP2, SP3, SP4, SP5, SP6, TEST POINT SP7, SP8, SP9, SP10, SP11, SP12 71 1 SW1 SW DIP-3 CTS 1943MST CTS Corporation 194-3MST Resistor/Electrocomponents SWITCH SIDE ACTUATED GOLD 3 SEC 72 2 SW2, SW3 SW PUSHBUTTONSPST C&K Components EP11SD1ABE SPST- Momentary RA 73 1 SW4 B3F-1150 Omron B3F-1150 SWITCH TACT 6MM 100GF H=7.3MM 74 1 SW5 SW DIP-8/SM C&K Components BPA08SB 8-POSITION DIP PACK 75 1 TB1 Terminal Block/ED1202DS On-Shore Tech. ED120/2DS TERMINAL BLOCK 5.08MM VERT 2POS 76 14 TP1, TP2, TP3, TP4, TP5, TP6, TESTPOINT TP7, TP8, TP9, TP10, TP11, TP12, TP13, TP14 1 U1 77 ALT: Reference Part Manufacturer ecp2m-672fpbga LATTICE SUPPLIED Part Number Description LFE2M50E-6FN672C 78 3 U2, U5, U7 AMS1503CM Advanced Monolithic Systems AMS1503CM 3A LOW DROPOUT VOLTAGE REGULATORS 79 2 U3, U4 PTH12060W Texas Instruments PTH12060WAH MODULE PIP 12VIN 10A ADJ 10-SMD 80 1 U6 SC1592 Semtech SC1592IMTRT IC LDO ADJ REG 3A TO263-7 81 1 U8 M25P64-FLASH Macronix MX25L6405MC20G IC SRL FLASH 64MBIT 3V 16-SOP Wide(300MIL) 33 LatticeECP2M PCI Express Solutions Board User’s Guide Lattice Semiconductor Table 17. Bill of Materials (Continued) Item Quantity 82 1 U9 Reference MAX6817 Part Maxim Manufacturer MAX6817-EUT+T ±15kV ESD-Protected, Dual, CMOS Switch Debouncers 83 2 U10, U12 NC7WZ16MACO6A/Fairchild TinyLogic Fairchild NC7WZ16P6X IC BUFFER UHS DUAL SC70-6 84 1 U11 SN74LVC125A/SO14 Texas Instruments SN74LVC125AD IC QUAD BUS BUFFER GATE 14-SOIC 85 1 U13 LCMX01200C3MN1321 LATTICE SUPPLIED 86 1 U14 S29GL064A90BFIR40 Spansion GL064N10BFIR30 48fBGA FLASH-VBN048 87 1 U15 LP2996-SO8 National Semi LP2996M IC DDR TERMINATION REG 8SOIC 88 1 U16 DDR2-SDRAM84FBGA Micron MT47H16M16BG-37E 16-Bit DDR2 89 1 U17 CY2304-1 Cypress Semiconductor CY2304SC-1 zero delay buffer 90 1 Y2 CTS-CB3LV-3C100.00MHZ CTS-Frequency Controls CB3LV-3C-100M0000-T OSC CLOCK 100.000 MHZ 3.3V SMD 91 1 RN18 EXB2HV471JV Panasonic EXB2HV471JV RES ARRAY 470 OHM 5% 8 RES SMD 92 4 R197, R198, R199, R200 33R-0603SMT Panasonic ERJ-3EKF33R0V RES 33 OHM 1/16W 1% 0603 SMD 93 1 R21 1M-0603SMT Panasonic ERJ-3GEYJ105V RES 1M OHM 1/10W 5% 0603 SMD 94 1 R207 RES. 100 ohm 1 /16 W, 0402 SMD Panasonic ERJ-2GEJ101X 95 1 Bracket Back Panel Bracket 96 2 Screw 4-40 x .250 97 2 Flat washer 4-40 98 2 Lock washer 4-40 34 Part Number Description