ESD9B D

ESD9B, SZESD9B
Transient Voltage
Suppressors
Micro−Packaged Diodes for ESD Protection
The ESD9B Series is designed to protect voltage sensitive
components from ESD. Excellent clamping capability, low leakage,
and fast response time provide best in class protection on designs that
are exposed to ESD. Because of its small size, it is suited for use in
cellular phones, MP3 players, digital cameras and many other portable
applications where board space comes at a premium.
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Specification Features
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Low Capacitance 15 pF
Low Clamping Voltage
Small Body Outline Dimensions: 0.039″ x 0.024″ (1.0mm x 0.60mm)
Low Body Height: 0.016″ (0.4 mm)
Stand−off Voltage: 3.3 V, 5 V
Low Leakage
Response Time is < 1 ns
IEC61000−4−2 Level 4 ESD Protection
AEC−Q101 Qualified and PPAP Capable
SZ Prefix for Automotive and Other Applications Requiring Unique
Site and Control Change Requirements
This is a Pb−Free Device
Mechanical Characteristics
CASE: Void-free, transfer-molded, thermosetting plastic
SOD−923
CASE 514AB
MARKING DIAGRAM
XM
X
M
= Specific Device Code
Date Code
ORDERING INFORMATION
Epoxy Meets UL 94 V−0
LEAD FINISH: 100% Matte Sn (Tin)
MOUNTING POSITION: Any
Device
Package
Shipping†
ESD9B3.3ST5G
SOD−923 8000/Tape & Reel
(Pb−Free)
ESD9B5.0ST5G
SOD−923 8000/Tape & Reel
(Pb−Free)
SZESD9B5.0ST5G
SOD−923 8000/Tape & Reel
(Pb−Free)
QUALIFIED MAX REFLOW TEMPERATURE: 260°C
Device Meets MSL 1 Requirements
MAXIMUM RATINGS
Rating
IEC 61000−4−2 (ESD)
Symbol
Contact
Air
IEC 61000−4−4 (EFT)
Value
Unit
±18
±18
kV
40
A
Total Power Dissipation on FR−5 Board
(Note 1) @ TA = 25°C
Thermal Resistance, Junction−to−Ambient
°PD°
300
mW
RqJA
400
°C/W
Junction and Storage Temperature Range
TJ, Tstg
−55 to +150
°C
TL
260
°C
Lead Solder Temperature − Maximum
(10 Second Duration)
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
1. FR−5 = 1.0 x 0.75 x 0.62 in.
© Semiconductor Components Industries, LLC, 2015
May, 2015 − Rev. 5
1
Publication Order Number:
ESD9B/D
ESD9B, SZESD9B
ELECTRICAL CHARACTERISTICS
I
(TA = 25°C unless otherwise noted)
Symbol
IPP
Parameter
IPP
Maximum Reverse Peak Pulse Current
VC
Clamping Voltage @ IPP
VRWM
IR
C
IR VRWM VBR VC
IT
Working Peak Reverse Voltage
V
Maximum Reverse Leakage Current @ VRWM
VBR
IT
IT
VC VBR VRWM IR
Breakdown Voltage @ IT
IPP
Test Current
Bi−Directional TVS
Capacitance @ VR = 0 V and f = 1.0 MHz
ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise noted)
VRWM
(V)
IR (nA)
@ VRWM
Device
Marking
Max
Max
Min
ESD9B3.3ST5G
2*
3.3
100
ESD9B5.0ST5G,
SZESD9B5.0ST5G
E
5.0
100
Device
VBR (V) @ IT
(Note 2)
IT
C (pF)
VC
Max
mA
Typ
Per IEC61000−4−2
(Note 3)
5.0
7.0
1.0
15
5.8
7.8
1.0
15
VC (V)
Max Per 8 x 20 ms
(Note 4)
IPP = 1 A
IPP = 2 A
Figures 1 and 2
See Below
10.5
11.5
Figures 1 and 2
See Below
12.5
15.0
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
* Rotated 270°.
2. VBR is measured with a pulse test current IT at an ambient temperature of 25°C.
3. For test procedure see Figures 3 and 4 and Application Note AND8307/D.
4. Surge current waveforms per Figure 5.
Figure 1. ESD Clamping Voltage Screenshot
Positive 8 kV Contact per IEC61000−4−2
Figure 2. ESD Clamping Voltage Screenshot
Negative 8 kV Contact per IEC61000−4−2
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2
ESD9B, SZESD9B
IEC61000−4−2 Waveform
IEC 61000−4−2 Spec.
Ipeak
Level
Test Voltage (kV)
First Peak
Current
(A)
Current at
30 ns (A)
Current at
60 ns (A)
1
2
7.5
4
2
2
4
15
8
4
3
6
22.5
12
6
4
8
30
16
8
100%
90%
I @ 30 ns
I @ 60 ns
10%
tP = 0.7 ns to 1 ns
Figure 3. IEC61000−4−2 Spec
ESD Gun
Oscilloscope
TVS
50 W
Cable
50 W
Figure 4. Diagram of ESD Test Setup
The following is taken from Application Note
AND8308/D − Interpretation of Datasheet Parameters
for ESD Devices.
systems such as cell phones or laptop computers it is not
clearly defined in the spec how to specify a clamping voltage
at the device level. ON Semiconductor has developed a way
to examine the entire voltage waveform across the ESD
protection diode over the time domain of an ESD pulse in the
form of an oscilloscope screenshot, which can be found on
the datasheets for all ESD protection diodes. For more
information on how ON Semiconductor creates these
screenshots and how to interpret them please refer to
AND8307/D.
ESD Voltage Clamping
For sensitive circuit elements it is important to limit the
voltage that an IC will be exposed to during an ESD event
to as low a voltage as possible. The ESD clamping voltage
is the voltage drop across the ESD protection diode during
an ESD event per the IEC61000−4−2 waveform. Since the
IEC61000−4−2 was written as a pass/fail spec for larger
% OF PEAK PULSE CURRENT
100
PEAK VALUE IRSM @ 8 ms
tr
90
PULSE WIDTH (tP) IS DEFINED
AS THAT POINT WHERE THE
PEAK CURRENT DECAY = 8 ms
80
70
60
HALF VALUE IRSM/2 @ 20 ms
50
40
30
tP
20
10
0
0
20
40
t, TIME (ms)
60
Figure 5. 8 X 20 ms Pulse Waveform
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3
80
ESD9B, SZESD9B
PACKAGE DIMENSIONS
SOD−923
CASE 514AB
ISSUE C
−X−
D
NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME
Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. MAXIMUM LEAD THICKNESS INCLUDES LEAD
FINISH. MINIMUM LEAD THICKNESS IS THE
MINIMUM THICKNESS OF BASE MATERIAL.
4. DIMENSIONS D AND E DO NOT INCLUDE MOLD
FLASH, PROTRUSIONS, OR GATE BURRS.
−Y−
E
1
2X b
0.08 X Y
2
TOP VIEW
DIM
A
b
c
D
E
HE
L
L2
A
c
HE
SIDE VIEW
MILLIMETERS
MIN
NOM MAX
0.34
0.37
0.40
0.15
0.20
0.25
0.07
0.12
0.17
0.75
0.80
0.85
0.55
0.60
0.65
0.95
1.00
1.05
0.19 REF
0.05
0.10
0.15
SOLDERING FOOTPRINT*
2X
L
1.20
2X
2X
0.36
2X
INCHES
MIN
NOM MAX
0.013 0.015 0.016
0.006 0.008 0.010
0.003 0.005 0.007
0.030 0.031 0.033
0.022 0.024 0.026
0.037 0.039 0.041
0.007 REF
0.002 0.004 0.006
L2
PACKAGE
OUTLINE
BOTTOM VIEW
0.25
DIMENSIONS: MILLIMETERS
See Application Note AND8455/D for more mounting details
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
ON Semiconductor and the
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at www.onsemi.com/site/pdf/Patent−Marking.pdf. SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation
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specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets
and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each
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For additional information, please contact your local
Sales Representative
ESD9B/D
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