Data Sheet

PMGD175XNE
30 V, Dual N-channel Trench MOSFET
15 April 2016
Product data sheet
1. General description
Dual N-channel enhancement mode Field-Effect Transistor (FET) in a very small SOT363
(TSSOP6) Surface-Mounted Device (SMD) plastic package using Trench MOSFET
technology.
2. Features and benefits
•
•
•
•
Low threshold voltage
Very fast switching
Trench MOSFET technology
ElectroStatic Discharge (ESD) protection > 2 kV HBM
3. Applications
•
•
•
•
Relay driver
High-speed line driver
Low-side loadswitch
Switching circuits
4. Quick reference data
Table 1.
Quick reference data
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
VDS
drain-source voltage
Tj = 25 °C
-
-
30
V
VGS
gate-source voltage
-12
-
12
V
ID
drain current
-
-
0.95
A
-
211
252
mΩ
Per transistor
VGS = 4.5 V; Tamb = 25 °C; t ≤ 5 s
[1]
Static characteristics (per transistor)
RDSon
drain-source on-state
resistance
[1]
VGS = 4.5 V; ID = 0.9 A; Tj = 25 °C
Device mounted on an FR4 Printed-Circuit Board (PCB), single-sided copper, tin-plated, mounting pad for
2
drain 6 cm .
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PMGD175XNE
NXP Semiconductors
30 V, Dual N-channel Trench MOSFET
5. Pinning information
Table 2.
Pinning information
Pin
Symbol Description
1
S1
source TR1
2
G1
gate TR1
3
D2
drain TR2
4
S2
source TR2
5
G2
gate TR2
6
D1
drain TR1
Simplified outline
6
5
Graphic symbol
D1
4
D2
G1
1
2
G2
3
TSSOP6 (SOT363)
S1
S2
017aaa256
6. Ordering information
Table 3.
Ordering information
Type number
PMGD175XNE
Package
Name
Description
Version
TSSOP6
plastic surface-mounted package; 6 leads
SOT363
7. Marking
Table 4.
Marking codes
Type number
Marking code
[1]
PMGD175XNE
LU%
[1]
PMGD175XNE
Product data sheet
% = placeholder for manufacturing site code
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30 V, Dual N-channel Trench MOSFET
8. Limiting values
Table 5.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol
Parameter
Conditions
Min
Max
Unit
VDS
drain-source voltage
Tj = 25 °C
-
30
V
VGS
gate-source voltage
-12
12
V
ID
drain current
Per transistor
VGS = 4.5 V; Tamb = 25 °C; t ≤ 5 s
[1]
-
0.95
A
VGS = 4.5 V; Tamb = 25 °C
[1]
-
0.87
A
VGS = 4.5 V; Tamb = 100 °C
[1]
-
0.5
A
-
4
A
[2]
-
260
mW
[1]
-
310
mW
-
905
mW
-
390
mW
IDM
peak drain current
Tamb = 25 °C; single pulse; tp ≤ 10 µs
Ptot
total power dissipation
Tamb = 25 °C
Tsp = 25 °C
Per device
Ptot
total power dissipation
Tamb = 25 °C
Tj
junction temperature
-55
150
°C
Tamb
ambient temperature
-55
150
°C
Tstg
storage temperature
-65
150
°C
-
0.31
A
[2]
Source-drain diode
IS
source current
PMGD175XNE
Product data sheet
Tamb = 25 °C
[1]
[1]
Device mounted on an FR4 Printed-Circuit Board (PCB), single-sided copper, tin-plated, mounting pad for
[2]
drain 6 cm .
Device mounted on an FR4 PCB, single-sided copper, tin-plated and standard footprint.
2
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30 V, Dual N-channel Trench MOSFET
017aaa123
120
Pder
(%)
Ider
(%)
80
80
40
40
0
- 75
Fig. 1.
017aaa124
120
- 25
25
75
125
Tj (°C)
0
- 75
175
Normalized total power dissipation as a
function of junction temperature
Fig. 2.
- 25
25
75
125
175
Normalized continuous drain current as a
function of junction temperature
aaa-022576
10
ID
(A)
Tj (°C)
tp = 10 µs
Limit RDSon = VDS/ID
100 µs
1
1 ms
DC; Tsp = 25 °C
10-1
10 ms
DC; Tamb = 25 °C;
drain mounting pad 6 cm2
10-2
10-1
1
100 ms
10
VDS (V)
102
IDM = single pulse
Fig. 3.
Safe operating area; junction to ambient; continuous and peak drain currents as a function of drainsource voltage
PMGD175XNE
Product data sheet
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9. Thermal characteristics
Table 6.
Thermal characteristics
Symbol
Parameter
Conditions
thermal resistance
from junction to
ambient
in free air
Min
Typ
Max
Unit
[1]
-
417
480
K/W
[2]
-
352
405
K/W
[2]
-
295
340
K/W
-
120
138
K/W
-
-
320
K/W
Per transistor
Rth(j-a)
Rth(j-sp)
in free air; t ≤ 5 s
thermal resistance
from junction to solder
point
Per device
Rth(j-a)
thermal resistance
from junction to
ambient
[1]
[2]
in free air
[1]
Device mounted on an FR4 PCB, single-sided copper, tin-plated and standard footprint.
2
Device mounted on an FR4 PCB, single-sided copper, tin-plated, mounting pad for drain 6 cm .
aaa-022577
103
duty cycle = 1
Zth(j-a)
(K/W)
0.75
102
0.33
0.20
0.50
0.25
0.10
0.05 0.02
0.01
0
10
1
10-3
10-2
10-1
1
10
102
tp (s)
103
FR4 PCB, standard footprint
Fig. 4.
Transient thermal impedance from junction to ambient as a function of pulse duration; typical values
PMGD175XNE
Product data sheet
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PMGD175XNE
NXP Semiconductors
30 V, Dual N-channel Trench MOSFET
aaa-022578
103
duty cycle = 1
Zth(j-a)
(K/W)
0.75
102
0.33
0.20
0.50
0.25
0.10
0.05
10
0.02
0.01
0
1
10-3
10-2
10-1
FR4 PCB, mounting pad for drain 6 cm
Fig. 5.
1
10
102
tp (s)
103
2
Transient thermal impedance from junction to ambient as a function of pulse duration; typical values
PMGD175XNE
Product data sheet
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30 V, Dual N-channel Trench MOSFET
10. Characteristics
Table 7.
Characteristics
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
Static characteristics (per transistor)
V(BR)DSS
drain-source
breakdown voltage
ID = 250 µA; VGS = 0 V; Tj = 25 °C
30
-
-
V
VGSth
gate-source threshold
voltage
ID = 250 µA; VDS = VGS; Tj = 25 °C
0.75
1
1.25
V
IDSS
drain leakage current
VDS = 30 V; VGS = 0 V; Tj = 25 °C
-
-
1
µA
IGSS
gate leakage current
VGS = 12 V; VDS = 0 V; Tj = 25 °C
-
-
10
µA
VGS = -12 V; VDS = 0 V; Tj = 25 °C
-
-
-10
µA
VGS = 4.5 V; VDS = 0 V; Tj = 25 °C
-
-
5
µA
VGS = -4.5 V; VDS = 0 V; Tj = 25 °C
-
-
-5
µA
VGS = 4.5 V; ID = 0.9 A; Tj = 25 °C
-
211
252
mΩ
VGS = 4.5 V; ID = 0.9 A; Tj = 150 °C
-
344
411
mΩ
VGS = 2.5 V; ID = 0.8 A; Tj = 25 °C
-
267
319
mΩ
VDS = 10 V; ID = 0.9 A; Tj = 25 °C
-
3.5
-
S
RDSon
gfs
drain-source on-state
resistance
forward
transconductance
Dynamic characteristics (per transistor)
QG(tot)
total gate charge
VDS = 15 V; ID = 0.9 A; VGS = 4.5 V;
-
1.05
1.65
nC
QGS
gate-source charge
Tj = 25 °C
-
0.15
-
nC
QGD
gate-drain charge
-
0.27
-
nC
Ciss
input capacitance
VDS = 15 V; f = 1 MHz; VGS = 0 V;
-
81
-
pF
Coss
output capacitance
Tj = 25 °C
-
13
-
pF
Crss
reverse transfer
capacitance
-
9
-
pF
td(on)
turn-on delay time
VDS = 15 V; ID = 0.9 A; VGS = 4.5 V;
-
7
-
ns
tr
rise time
RG(ext) = 6 Ω; Tj = 25 °C
-
14
-
ns
td(off)
turn-off delay time
-
17
-
ns
tf
fall time
-
6
-
ns
-
0.7
1.2
V
Source-drain diode (per transistor)
VSD
source-drain voltage
PMGD175XNE
Product data sheet
IS = 0.3 A; VGS = 0 V; Tj = 25 °C
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NXP Semiconductors
30 V, Dual N-channel Trench MOSFET
aaa-022730
4
4.5 V
ID
(A)
3.0 V
aaa-022731
10-2
2.6 V
ID
(A)
2.5 V
10-3
3
2.2 V
min
typ
max
10-4
2
2.0 V
10-5
1.8 V
1
VGS = 1.6 V
0
Fig. 6.
0
1
2
3
VDS (V)
10-6
4
0
0.5
Tj = 25 °C
VDS = 10 V
Output characteristics: drain current as a
function of drain-source voltage; typical values Fig. 7.
Tj = 25 °C
aaa-022732
1.2
1.6 V 1.8 V
2.0 V
2.2 V
1.0
1.5
2.0
Sub-threshold drain current as a function of
gate-source voltage
aaa-022733
1.0
2.5 V
VGS (V)
RDSon
(Ω)
RDSon
(Ω)
0.8
0.8
0.6
0.4
0.4
0.2
VGS = 4.5 V
0
0
1
2
3
VDS (V)
0
4
Tj = 25 °C
Fig. 8.
Tj = 150 °C
3.0 V
Product data sheet
0
4
8
VGS (V)
12
ID = 1 A
Drain-source on-state resistance as a function
of drain current; typical values
PMGD175XNE
Tj = 25 °C
Fig. 9.
Drain-source on-state resistance as a function
of gate-source voltage; typical values
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NXP Semiconductors
30 V, Dual N-channel Trench MOSFET
aaa-022734
3
aaa-022735
2.0
a
ID
(A)
1.5
2
1.0
1
Tj = 150 °C
0.5
Tj = 25 °C
0
0
1
2
0
-60
3
VGS (V)
VDS > ID x RDSon
Fig. 10. Transfer characteristics: drain current as a
function of gate-source voltage; typical values
60
120
180
aaa-022737
103
VGS(th)
(V)
Tj (°C)
Fig. 11. Normalized drain-source on-state resistance
as a function of ambient temperature; typical
values
aaa-022736
2.0
0
C
(pF)
1.5
102
1.0
Ciss
max
Coss
10
typ
0.5
Crss
min
0
-60
0
60
120
Tj (°C)
1
10-1
180
ID = 250 μA; VDS = VGS
Product data sheet
10
VDS (V)
102
f = 1 MHz; VGS = 0 V
Fig. 12. Gate-source threshold voltage as a function of
ambient temperature
PMGD175XNE
1
Fig. 13. Input, output and reverse transfer capacitances
as a function of drain-source voltage; typical
values
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30 V, Dual N-channel Trench MOSFET
aaa-022738
5
VDS
VGS
(V)
ID
4
VGS(pl)
3
VGS(th)
VGS
2
QGS1
1
0
QGS2
0
0.5
1.0
QG (nC)
QGS
QGD
QG(tot)
003aaa508
Fig. 15. Gate charge waveform definitions
1.5
VDS = 15 V; ID = 0.91 A
Fig. 14. Gate-source voltage as a function of gate
charge; typical values
aaa-022739
0.3
IS
(A)
0.2
0.1
Tj = 150 °C
Tj = 25 °C
0
0
0.2
0.4
0.6
0.8
1.0
VSD (V)
VGS = 0 V
Fig. 16. Source current as a function of source-drain voltage; typical values
11. Test information
P
t2
duty cycle δ =
t1
t2
t1
t
006aaa812
Fig. 17. Duty cycle definition
PMGD175XNE
Product data sheet
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30 V, Dual N-channel Trench MOSFET
12. Package outline
Plastic surface-mounted package; 6 leads
SOT363
D
B
E
y
A
X
HE
6
5
v M A
4
Q
pin 1
index
A
1
2
e1
A1
3
bp
c
Lp
w M B
e
detail X
0
1
2 mm
scale
DIMENSIONS (mm are the original dimensions)
UNIT
A
A1
max
bp
c
D
E
e
e1
HE
Lp
Q
v
w
y
mm
1.1
0.8
0.1
0.30
0.20
0.25
0.10
2.2
1.8
1.35
1.15
1.3
0.65
2.2
2.0
0.45
0.15
0.25
0.15
0.2
0.2
0.1
OUTLINE
VERSION
REFERENCES
IEC
JEDEC
SOT363
JEITA
SC-88
EUROPEAN
PROJECTION
ISSUE DATE
04-11-08
06-03-16
Fig. 18. Package outline TSSOP6 (SOT363)
PMGD175XNE
Product data sheet
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30 V, Dual N-channel Trench MOSFET
13. Soldering
2.65
solder lands
2.35 1.5
0.4 (2×)
0.6 0.5
(4×) (4×)
solder resist
solder paste
0.5
(4×)
0.6
(2×)
occupied area
0.6
(4×)
Dimensions in mm
1.8
sot363_fr
Fig. 19. Reflow soldering footprint for TSSOP6 (SOT363)
1.5
solder lands
0.3 2.5
4.5
1.5
solder resist
occupied area
Dimensions in mm
1.3
preferred transport
direction during soldering
1.3
2.45
5.3
sot363_fw
Fig. 20. Wave soldering footprint for TSSOP6 (SOT363)
PMGD175XNE
Product data sheet
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14. Revision history
Table 8.
Revision history
Data sheet ID
Release date
Data sheet status
Change notice
Supersedes
PMGD175XNE v.1
20160415
Product data sheet
-
-
PMGD175XNE
Product data sheet
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30 V, Dual N-channel Trench MOSFET
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punitive, special or consequential damages (including - without limitation lost profits, lost savings, business interruption, costs related to the removal
or replacement of any products or rework charges) whether or not such
damages are based on tort (including negligence), warranty, breach of
contract or any other legal theory.
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Notwithstanding any damages that customer might incur for any reason
whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards
customer for the products described herein shall be limited in accordance
with the Terms and conditions of commercial sale of NXP Semiconductors.
Document
status [1][2]
Product
status [3]
Objective
[short] data
sheet
Development This document contains data from
the objective specification for product
development.
Preliminary
[short] data
sheet
Qualification
This document contains data from the
preliminary specification.
Product
[short] data
sheet
Production
This document contains the product
specification.
[1]
[2]
[3]
Definition
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limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all information supplied prior
to the publication hereof.
Please consult the most recently issued document before initiating or
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subject to formal approval, which may result in modifications or additions.
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intended for quick reference only and should not be relied upon to contain
detailed and full information. For detailed and full information see the
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PMGD175XNE
Product data sheet
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product data given in the Limiting values and Characteristics sections of this
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Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) will cause permanent
damage to the device. Limiting values are stress ratings only and (proper)
operation of the device at these or any other conditions above those
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Characteristics sections of this document is not warranted. Constant or
repeated exposure to limiting values will permanently and irreversibly affect
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30 V, Dual N-channel Trench MOSFET
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between the translated and English versions.
15.4 Trademarks
Notice: All referenced brands, product names, service names and
trademarks are the property of their respective owners.
Bitsound, CoolFlux, CoReUse, DESFire, FabKey, GreenChip,
HiPerSmart, HITAG, I²C-bus logo, ICODE, I-CODE, ITEC, MIFARE,
MIFARE Plus, MIFARE Ultralight, SmartXA, STARplug, TOPFET,
TrenchMOS, TriMedia and UCODE — are trademarks of NXP
Semiconductors N.V.
HD Radio and HD Radio logo — are trademarks of iBiquity Digital
Corporation.
PMGD175XNE
Product data sheet
All information provided in this document is subject to legal disclaimers.
15 April 2016
© NXP Semiconductors N.V. 2016. All rights reserved
15 / 16
PMGD175XNE
NXP Semiconductors
30 V, Dual N-channel Trench MOSFET
16. Contents
1
General description ............................................... 1
2
Features and benefits ............................................1
3
Applications ........................................................... 1
4
Quick reference data ............................................. 1
5
Pinning information ............................................... 2
6
Ordering information ............................................. 2
7
Marking ................................................................... 2
8
Limiting values .......................................................3
9
Thermal characteristics .........................................5
10
Characteristics ....................................................... 7
11
Test information ................................................... 10
12
Package outline ................................................... 11
13
Soldering .............................................................. 12
14
Revision history ................................................... 13
15
15.1
15.2
15.3
15.4
Legal information .................................................14
Data sheet status ............................................... 14
Definitions ...........................................................14
Disclaimers .........................................................14
Trademarks ........................................................ 15
© NXP Semiconductors N.V. 2016. All rights reserved
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: [email protected]
Date of release: 15 April 2016
PMGD175XNE
Product data sheet
All information provided in this document is subject to legal disclaimers.
15 April 2016
© NXP Semiconductors N.V. 2016. All rights reserved
16 / 16