Data Sheet

Freescale Semiconductor
Technical Data
Document Number: A2I20H080N
Rev. 0, 3/2016
RF LDMOS Wideband Integrated
Power Amplifiers
The A2I20H080N wideband integrated circuit is an asymmetrical Doherty
designed with on--chip matching that makes it usable from 1800 to 2200 MHz.
This multi--stage structure is rated for 26 to 32 V operation and covers all typical
cellular base station modulation formats.
1800 MHz
 Typical Doherty Single--Carrier W--CDMA Characterization Performance:
VDD = 30 Vdc, IDQ1A = 30 mA, IDQ2A = 195 mA, VGS1B = 1.35 Vdc,
VGS2B = 1.25 Vdc, Pout = 13.5 W Avg., Input Signal PAR = 9.9 dB @ 0.01%
Probability on CCDF.(1)
Frequency
Gps
(dB)
PAE
(%)
ACPR
(dBc)
1805 MHz
28.4
42.1
–36.9
1840 MHz
28.2
43.4
–38.6
1880 MHz
27.9
42.9
–34.0
A2I20H080NR1
A2I20H080GNR1
1800–2200 MHz, 13.5 W AVG., 30 V
AIRFAST RF LDMOS WIDEBAND
INTEGRATED POWER AMPLIFIERS
TO--270WB--15
PLASTIC
A2I20H080NR1
1. All data measured in fixture with device soldered to heatsink.
Features
TO--270WBG--15
PLASTIC
A2I20H080GNR1
 Advanced High Performance In--Package Doherty
 On--Chip Matching (50 Ohm Input, DC Blocked)
 Integrated Quiescent Current Temperature Compensation with
Enable/Disable Function (2)
 Designed for Digital Predistortion Error Correction Systems
VDS1A
RFinA
VGS1A
VGS2A
VGS1B
VGS2B
RFout1/VDS2A
Quiescent Current
Temperature Compensation (2)
Quiescent Current
Temperature Compensation (2)
RFinB
RFout2/VDS2B
VDS1A
VGS2A
VGS1A
RFinA
N.C.
GND
GND
N.C.
RFinB
VGS1B
VGS2B
VDS1B
1
2 Carrier
15
3
4
5
6
14
7
8
13
9
10
11 Peaking
12
RFout1/VDS2A
GND
RFout2/VDS2B
(Top View)
Note: Exposed backside of the package is
the source terminal for the transistor.
VDS1B
Figure 1. Functional Block Diagram
Figure 2. Pin Connections
2. Refer to AN1977, Quiescent Current Thermal Tracking Circuit in the RF Integrated Circuit Family, and to AN1987, Quiescent Current
Control for the RF Integrated Circuit Device Family. Go to http://www.nxp.com/RF and search for AN1977 or AN1987.
 Freescale Semiconductor, Inc., 2016. All rights reserved.
RF Device Data
Freescale Semiconductor, Inc.
A2I20H080NR1 A2I20H080GNR1
1
Table 1. Maximum Ratings
Symbol
Value
Unit
Drain--Source Voltage
Rating
VDSS
–0.5, +65
Vdc
Gate--Source Voltage
VGS
–0.5, +10
Vdc
Operating Voltage
VDD
32, +0
Vdc
Storage Temperature Range
Tstg
–65 to +150
C
TC
–40 to +150
C
Case Operating Temperature Range
Operating Junction Temperature Range
(1,2)
Input Power
TJ
–40 to +225
C
Pin
21
dBm
Symbol
Value (2,3)
Unit
Table 2. Thermal Characteristics
Characteristic
Thermal Resistance, Junction to Case
Case Temperature 76C, 13.5 W Avg., W--CDMA, 1840 MHz
Stage 1, 30 Vdc, IDQ1A = 30 mA, VGS1B = 1.35 Vdc
Stage 2, 30 Vdc, IDQ2A = 195 mA, VGS2B = 1.25 Vdc
RJC
C/W
6.4
1.9
Table 3. ESD Protection Characteristics
Test Methodology
Class
Human Body Model (per JESD22--A114)
1C
Machine Model (per EIA/JESD22--A115)
A
Charge Device Model (per JESD22--C101)
IV
Table 4. Moisture Sensitivity Level
Test Methodology
Per JESD22--A113, IPC/JEDEC J--STD--020
Rating
Package Peak Temperature
Unit
3
260
C
1. Continuous use at maximum temperature will affect MTTF.
2. MTTF calculator available at http://www.nxp.com/RF/calculators.
3. Refer to AN1955, Thermal Measurement Methodology of RF Power Amplifiers. Go to http://www.nxp.com/RF and search for AN1955.
A2I20H080NR1 A2I20H080GNR1
2
RF Device Data
Freescale Semiconductor, Inc.
Table 5. Electrical Characteristics (TA = 25C unless otherwise noted)
Symbol
Min
Typ
Max
Unit
Zero Gate Voltage Drain Leakage Current
(VDS = 65 Vdc, VGS = 0 Vdc)
IDSS
—
—
10
Adc
Zero Gate Voltage Drain Leakage Current
(VDS = 32 Vdc, VGS = 0 Vdc)
IDSS
—
—
1
Adc
Gate--Source Leakage Current
(VGS = 1.0 Vdc, VDS = 0 Vdc)
IGSS
—
—
1
Adc
Gate Threshold Voltage (1)
(VDS = 10 Vdc, ID = 4 Adc)
VGS(th)
0.8
1.2
1.6
Vdc
Gate Quiescent Voltage
(VDS = 30 Vdc, IDQ1A = 30 mA)
VGS(Q)
—
2.2
—
Vdc
Fixture Gate Quiescent Voltage
(VDD = 30 Vdc, IDQ1A = 30 mA, Measured in Functional Test)
VGG(Q)
3.2
4.0
4.7
Vdc
Zero Gate Voltage Drain Leakage Current
(VDS = 65 Vdc, VGS = 0 Vdc)
IDSS
—
—
10
Adc
Zero Gate Voltage Drain Leakage Current
(VDS = 32 Vdc, VGS = 0 Vdc)
IDSS
—
—
1
Adc
Gate--Source Leakage Current
(VGS = 1.0 Vdc, VDS = 0 Vdc)
IGSS
—
—
1
Adc
Gate Threshold Voltage (1)
(VDS = 10 Vdc, ID = 28 Adc)
VGS(th)
0.8
1.2
1.6
Vdc
Gate Quiescent Voltage
(VDS = 30 Vdc, IDQ2A = 195 mA)
VGS(Q)
—
2.2
—
Vdc
Fixture Gate Quiescent Voltage
(VDD = 30 Vdc, IDQ2A = 195 mA, Measured in Functional Test)
VGG(Q)
3.0
3.9
4.5
Vdc
Drain--Source On--Voltage
(VGS = 10 Vdc, ID = 280 mAdc)
VDS(on)
0.1
0.2
1.5
Vdc
Characteristic
Carrier Stage 1 -- Off Characteristics (1)
Carrier Stage 1 -- On Characteristics
Carrier Stage 2 -- Off Characteristics (1)
Carrier Stage 2 -- On Characteristics
1. Each side of device measured separately.
(continued)
A2I20H080NR1 A2I20H080GNR1
RF Device Data
Freescale Semiconductor, Inc.
3
Table 5. Electrical Characteristics (TA = 25C unless otherwise noted) (continued)
Characteristic
Symbol
Min
Typ
Max
Unit
Zero Gate Voltage Drain Leakage Current
(VDS = 65 Vdc, VGS = 0 Vdc)
IDSS
—
—
10
Adc
Zero Gate Voltage Drain Leakage Current
(VDS = 32 Vdc, VGS = 0 Vdc)
IDSS
—
—
1
Adc
Gate--Source Leakage Current
(VGS = 1.0 Vdc, VDS = 0 Vdc)
IGSS
—
—
1
Adc
VGS(th)
0.8
1.2
1.6
Vdc
Zero Gate Voltage Drain Leakage Current
(VDS = 65 Vdc, VGS = 0 Vdc)
IDSS
—
—
10
Adc
Zero Gate Voltage Drain Leakage Current
(VDS = 32 Vdc, VGS = 0 Vdc)
IDSS
—
—
1
Adc
Gate--Source Leakage Current
(VGS = 1.0 Vdc, VDS = 0 Vdc)
IGSS
—
—
1
Adc
Gate Threshold Voltage
(VDS = 10 Vdc, ID = 44 Adc)
VGS(th)
0.8
1.2
1.6
Vdc
Drain--Source On--Voltage
(VGS = 10 Vdc, ID = 440 mAdc)
VDS(on)
0.1
0.2
1.5
Vdc
Peaking Stage 1 -- Off Characteristics (1)
Peaking Stage 1 -- On Characteristics (1)
Gate Threshold Voltage
(VDS = 10 Vdc, ID = 9 Adc)
Peaking Stage 2 -- Off Characteristics (1)
Peaking Stage 2 -- On Characteristics (1)
1. Each side of device measured separately.
(continued)
A2I20H080NR1 A2I20H080GNR1
4
RF Device Data
Freescale Semiconductor, Inc.
Table 5. Electrical Characteristics (TA = 25C unless otherwise noted) (continued)
Characteristic
Symbol
Min
Typ
Max
Unit
(1,2,3)
Functional Tests
(In Freescale Doherty Production Test Fixture, 50 ohm system) VDD = 30 Vdc, IDQ1A = 30 mA, IDQ2A = 195 mA,
VGS1B = 1.35 Vdc, VGS2B = 1.25 Vdc, Pout = 13.5 W Avg., f = 1880 MHz, Single--Carrier W--CDMA, IQ Magnitude Clipping, Input Signal
PAR = 9.9 dB @ 0.01% Probability on CCDF. ACPR measured in 3.84 MHz Channel Bandwidth @ 5 MHz Offset.
Power Gain
Gps
26.5
27.8
30.0
dB
Power Added Efficiency
PAE
38.5
41.6
—
%
Adjacent Channel Power Ratio
ACPR
—
–31.6
–28.0
dBc
Pout @ 3 dB Compression Point, CW
P3dB
74.1
82.4
—
W
(2,4)
Load Mismatch
(In Freescale Doherty Characterization Fixture, 50 ohm system) IDQ1A = 30 mA, IDQ2A = 195 mA, VGS1B = 1.35 Vdc,
VGS2B = 1.25 Vdc, f = 1840 MHz
VSWR 10:1 at 32 Vdc, 89 W CW Output Power
(3 dB Input Overdrive from 76 W CW Rated Power)
No Device Degradation
Typical Performance (2,4) (In Freescale Doherty Characterization Fixture, 50 ohm system) VDD = 30 Vdc, IDQ1A = 30 mA, IDQ2A = 195 mA,
VGS1B = 1.35 Vdc, VGS2B = 1.25 Vdc, 1805–1880 MHz Bandwidth
Pout @ 1 dB Compression Point, CW
P1dB
—
70
—
W
(5)
P3dB
—
90
—
W
AM/PM
(Maximum value measured at the P3dB compression point across
the 1805–1880 MHz frequency range.)

—
–22
—

VBWres
—
160
—
MHz
—
—
1.0
2.0
—
—
Pout @ 3 dB Compression Point
VBW Resonance Point
(IMD Third Order Intermodulation Inflection Point)
Quiescent Current Accuracy over Temperature (6)
with 2 k Gate Feed Resistors (–30 to 85C) Stage 1
with 2 k Gate Feed Resistors (–30 to 85C) Stage 2
IQT
Gain Flatness in 75 MHz Bandwidth @ Pout = 13.5 W Avg.
GF
—
0.5
—
dB
Gain Variation over Temperature
(–30C to +85C)
G
—
0.018
—
dB/C
P1dB
—
0.01
—
dB/C
Output Power Variation over Temperature
(–30C to +85C)
%
Table 6. Ordering Information
Device
A2I20H080NR1
A2I20H080GNR1
Tape and Reel Information
R1 Suffix = 500 Units, 44 mm Tape Width, 13--inch Reel
Package
TO--270WB--15
TO--270WBG--15
1. Part internally input matched.
2. Measurements made with device in an asymmetrical Doherty configuration.
3. Measurements made with device in straight lead configuration before any lead forming operation is applied. Lead forming is used for gull
wing (GN) parts.
4. All data measured in fixture with device soldered to heatsink.
5. P3dB = Pavg + 7.0 dB where Pavg is the average output power measured using an unclipped W--CDMA single--carrier input signal
where output PAR is compressed to 7.0 dB @ 0.01% probability on CCDF.
6. Refer to AN1977, Quiescent Current Thermal Tracking Circuit in the RF Integrated Circuit Family, and to AN1987, Quiescent Current Control
for the RF Integrated Circuit Device Family. Go to http://www.nxp.com/RF and search for AN1977 or AN1987.
A2I20H080NR1 A2I20H080GNR1
RF Device Data
Freescale Semiconductor, Inc.
5
VGG2A
R1
VGG1A
R2
VDD2A
A2I20H080N
Rev. 1
VDD1A
C8
C1C2
C7
C3
C11
C15
C20
C17
C27**
C19
C12
C25
C
Z1
C24
Q1
R5
C26*
C22
P
C14
C18
C16
C13
C21
C23
C4 C5 C6
C9
C10
R4
VGG1B
R3
VGG2B
VDD1B
D76754
VDD2B
Note: All data measured in fixture with device soldered to heatsink. Production fixture does not include device
soldered to heatsink.
**C26 is mounted vertically.
**C27 on characterization board only.
Figure 3. A2I20H080NR1 Test Circuit Component Layout
Table 7. A2I20H080NR1 Test Circuit Component Designations and Values
Part
Description
Part Number
Manufacturer
C1, C2, C3, C4, C5, C6, C7, C8,
C9, C10, C11, C12, C13, C14
10 F Chip Capacitors
GRM32ER61H106KA12L
Murata
C15, C16, C17, C18
10 nF Chip Capacitors
C0805C103J5RACTU
Kemet
C19, C20, C21, C22, C23
10 pF Chip Capacitors
ATC600S100JT250XT
ATC
C24, C26
0.4 pF Chip Capacitors
ATC100B0R4BT500XT
ATC
C25, C27*
0.1 pF Chip Capacitors
ATC100B0R1BT500XT
ATC
Q1
RF LDMOS Power Amplifier
A2I20H080NR1
Freescale
R1, R2, R3, R4
2.2 k, 1/8 W Chip Resistors
CRCW08052K20JNEA
Vishay
R5
50 , 8 W Chip Resistor
C8A50Z4A
Anaren
Z1
1700–2000 MHz Band, 5 dB Directional Coupler
X3C19P1-05S
Anaren
PCB
RF35, 0.020, r = 3.55
D76754
MTL
*C27 on characterization board only.
A2I20H080NR1 A2I20H080GNR1
6
RF Device Data
Freescale Semiconductor, Inc.
TYPICAL CHARACTERISTICS — 1805–1880 MHz
D
Gps, POWER GAIN (dB)
28.6
42
VGS1B = 1.35 Vdc, VGS2B = 1.25 Vdc
40
Single--Carrier W--CDMA
28.4
28.2
27.8
38
Gps
3.84 MHz Channel Bandwidth
Input Signal PAR = 9.9 dB
@ 0.01% Probability on CCDF
28
44
27.6
–30
–1.2
–32
–1.4
–34
27.4
ACPR
27.2
27
1760
1780
1800
1820 1840 1860
f, FREQUENCY (MHz)
PARC
1880
1900
–36
–38
–40
1920
–1.6
–1.8
–2
PARC (dB)
28.8
46
D, DRAIN
EFFICIENCY (%)
VDD = 30 Vdc, Pout = 13.5 W (Avg.), IDQ1A = 30 mA, IDQ2A = 195 mA
ACPR (dBc)
29
–2.2
IMD, INTERMODULATION DISTORTION (dBc)
Figure 4. Single--Carrier Output Peak--to--Average Ratio Compression
(PARC) Broadband Performance @ Pout = 13.5 Watts Avg.
–10
VDD = 30 Vdc, Pout = 21 W (PEP), IDQ1A = 30 mA, IDQ2A = 195 mA
IDQ1B = 65 mA, IDQ2B = 305 mA, Two--Tone Measurements
–20 (f1 + f2)/2 = Center Frequency of 1840 MHz
IM3--U
–30
IM3--L
–40
IM5--U IM5--L
–50
IM7--L
IM7--U
–60
10
1
100
200
TWO--TONE SPACING (MHz)
28.6
0
28.4
28.2
28
27.8
27.6
55
VDD = 30 Vdc, IDQ1A = 30 mA, IDQ2A = 195 mA, VGS1B = 1.35 Vdc
VGS2B = 1.25 Vdc, f = 1840 MHz, Single--Carrier W--CDMA
50
3.84 MHz Channel Bandwidth
D
45
–1
–2 dB = 15.68 W
–2
ACPR
–1 dB = 11.71 W
–3
Gps
–4
Input Signal PAR = 9.9 dB
@ 0.01% Probability on CCDF
–5
5
10
–3 dB = 20.24 W
15
20
Pout, OUTPUT POWER (WATTS)
PARC
25
40
35
–15
–20
–25
–30
ACPR (dBc)
1
D DRAIN EFFICIENCY (%)
28.8
OUTPUT COMPRESSION AT 0.01%
PROBABILITY ON CCDF (dB)
Gps, POWER GAIN (dB)
Figure 5. Intermodulation Distortion Products
versus Two--Tone Spacing
–35
30
–40
25
30
–45
Figure 6. Output Peak--to--Average Ratio
Compression (PARC) versus Output Power
A2I20H080NR1 A2I20H080GNR1
RF Device Data
Freescale Semiconductor, Inc.
7
TYPICAL CHARACTERISTICS — 1805–1880 MHz
28
10
50
0
40
1805 MHz
1840 MHz
27
1880 MHz
Gps
30
1880 MHz
26
1840 MHz
D
1880 MHz
1805 MHz
1840 MHz
20
1805 MHz
25
24
60
ACPR
1
Input Signal PAR = 9.9 dB
@ 0.01% Probability on CCDF
10
Pout, OUTPUT POWER (WATTS) AVG.
10
0
35
–10
–20
–30
ACPR (dBc)
Gps, POWER GAIN (dB)
VDD = 30 Vdc, IDQ1A = 30 mA, IDQ2A = 195 mA, VGS1B = 1.35 Vdc
VGS2B = 1.25 Vdc, Single--Carrier W--CDMA, 3.84 MHz Channel
29 Bandwidth
D, DRAIN EFFICIENCY (%)
30
–40
–50
Figure 7. Single--Carrier W--CDMA Power Gain, Drain
Efficiency and ACPR versus Output Power
30
29
VDD = 30 Vdc, Pin = 0 dBm, IDQ1A = 30 mA, IDQ2A = 195 mA
VGS1B = 1.35 Vdc, VGS2B = 1.25 Vdc
GAIN (dB)
28
Gain
27
26
25
24
1400
1500
1600
1700 1800 1900
f, FREQUENCY (MHz)
2000
2100
2200
Figure 8. Broadband Frequency Response
A2I20H080NR1 A2I20H080GNR1
8
RF Device Data
Freescale Semiconductor, Inc.
Table 8. Carrier Side Load Pull Performance — Maximum Power Tuning
VDD = 30 Vdc, IDQ1A = 30 mA, IDQ2A = 205 mA, Pulsed CW, 10 sec(on), 10% Duty Cycle
Max Output Power
P1dB
f
(MHz)
Zsource
()
Zin
()
1805
33.8 – j12.2
31.2 + j8.75
1840
34.9 – j13.8
34.8 + j13.3
1880
40.8 – j9.23
39.0 + j17.1
Zload
()
(1)
Gain (dB)
(dBm)
(W)
D
(%)
AM/PM
()
4.15 + j0.65
32.2
44.5
28
58.1
–8
4.00 + j0.80
32.2
44.5
28
57.6
–8
3.87 + j0.86
31.9
44.6
29
58.1
–8
Max Output Power
P3dB
f
(MHz)
Zsource
()
Zin
()
Zload (2)
()
Gain (dB)
(dBm)
(W)
D
(%)
AM/PM
()
1805
33.8 – j12.2
34.3 + j8.61
4.49 + j0.38
30.0
45.3
34
59.2
–12
1840
34.9 – j13.8
38.1 + j12.5
4.24 + j0.62
30.1
45.3
34
59.0
–12
1880
40.8 – j9.23
42.6 + j15.0
4.19 + j0.63
29.7
45.3
34
58.8
–11
(1) Load impedance for optimum P1dB power.
(2) Load impedance for optimum P3dB power.
Zsource = Measured impedance presented to the input of the device at the package reference plane.
Zin
= Impedance as measured from gate contact to ground.
Zload = Measured impedance presented to the output of the device at the package reference plane.
Table 9. Carrier Side Load Pull Performance — Maximum Drain Efficiency Tuning
VDD = 30 Vdc, IDQ1A = 30 mA, IDQ2A = 205 mA, Pulsed CW, 10 sec(on), 10% Duty Cycle
Max Drain Efficiency
P1dB
f
(MHz)
Zsource
()
Zin
()
Zload (1)
()
Gain (dB)
(dBm)
(W)
D
(%)
AM/PM
()
1805
33.8 – j12.2
29.5 + j12.7
3.09 + j3.00
33.7
43.1
20
67.0
–10
1840
34.9 – j13.8
33.3 + j19.2
2.52 + j3.11
33.8
42.7
19
67.4
–11
1880
40.8 – j9.23
38.8 + j22.4
2.68 + j2.78
33.1
43.3
22
67.7
–11
Max Drain Efficiency
P3dB
Gain (dB)
(dBm)
(W)
D
(%)
AM/PM
()
2.70 + j3.07
31.9
43.5
23
68.6
–16
35.9 + j18.4
2.47 + j3.21
31.9
43.3
21
68.4
–16
41.2 + j22.0
2.32 + j3.02
31.3
43.5
22
68.4
–15
f
(MHz)
Zsource
()
Zin
()
1805
33.8 – j12.2
31.1 + j12.8
1840
34.9 – j13.8
1880
40.8 – j9.23
Zload
()
(2)
(1) Load impedance for optimum P1dB efficiency.
(2) Load impedance for optimum P3dB efficiency.
Zsource = Measured impedance presented to the input of the device at the package reference plane.
Zin
= Impedance as measured from gate contact to ground.
Zload = Measured impedance presented to the output of the device at the package reference plane.
Input Load Pull
Tuner and Test
Circuit
Output Load Pull
Tuner and Test
Circuit
Device
Under
Test
Zsource Zin
Zload
A2I20H080NR1 A2I20H080GNR1
RF Device Data
Freescale Semiconductor, Inc.
9
Table 10. Peaking Side Load Pull Performance — Maximum Power Tuning
VDD = 30 Vdc, IDQ1B = 60 mA, VGS2B = 1.25 Vdc, Pulsed CW, 10 sec(on), 10% Duty Cycle
Max Output Power
P1dB
f
(MHz)
Zsource
()
Zin
()
1805
30.8 – j15.3
27.3 + j12.4
1840
35.4 – j16.8
29.6 + j15.5
1880
38.3 – j17.1
32.5 + j17.8
Zload
()
(1)
Gain (dB)
(dBm)
(W)
D
(%)
AM/PM
()
2.44 – j0.54
31.3
46.9
50
60.3
–18
2.49 – j0.51
31.3
46.9
49
59.3
–18
2.42 – j0.57
31.0
46.9
49
58.7
–17
Max Output Power
P3dB
f
(MHz)
Zsource
()
Zin
()
Zload (2)
()
Gain (dB)
(dBm)
(W)
D
(%)
AM/PM
()
1805
30.8 – j15.3
30.5 + j14.0
2.67 – j0.73
29.1
47.6
58
60.8
–23
1840
35.4 – j16.8
33.3 + j16.6
2.65 – j0.67
29.2
47.5
56
59.8
–23
1880
38.3 – j17.1
36.8 + j18.2
2.67 – j0.72
28.8
47.5
57
59.6
–22
(1) Load impedance for optimum P1dB power.
(2) Load impedance for optimum P3dB power.
Zsource = Measured impedance presented to the input of the device at the package reference plane.
Zin
= Impedance as measured from gate contact to ground.
Zload = Measured impedance presented to the output of the device at the package reference plane.
Table 11. Peaking Side Load Pull Performance — Maximum Drain Efficiency Tuning
VDD = 30 Vdc, IDQ1B = 60 mA, VGS2B = 1.25 Vdc, Pulsed CW, 10 sec(on), 10% Duty Cycle
Max Drain Efficiency
P1dB
f
(MHz)
Zsource
()
Zin
()
Zload (1)
()
Gain (dB)
(dBm)
(W)
D
(%)
AM/PM
()
1805
30.8 – j15.3
22.7 + j17.8
1.34 + j1.73
32.7
43.8
24
73.5
–36
1840
35.4 – j16.8
25.4 + j22.1
1.26 + j1.66
32.5
43.7
23
72.0
–35
1880
38.3 – j17.1
30.5 + j23.6
1.61 + j1.37
32.1
44.8
30
71.2
–28
Max Drain Efficiency
P3dB
Gain (dB)
(dBm)
(W)
D
(%)
AM/PM
()
1.70 + j1.31
30.8
45.6
36
73.3
–36
29.7 + j20.8
1.65 + j1.40
30.5
45.3
34
71.5
–36
33.4 + j23.0
1.61 + j1.20
30.2
45.6
36
71.0
–34
f
(MHz)
Zsource
()
Zin
()
1805
30.8 – j15.3
26.4 + j16.9
1840
35.4 – j16.8
1880
38.3 – j17.1
Zload
()
(2)
(1) Load impedance for optimum P1dB efficiency.
(2) Load impedance for optimum P3dB efficiency.
Zsource = Measured impedance presented to the input of the device at the package reference plane.
Zin
= Impedance as measured from gate contact to ground.
Zload = Measured impedance presented to the output of the device at the package reference plane.
Input Load Pull
Tuner and Test
Circuit
Output Load Pull
Tuner and Test
Circuit
Device
Under
Test
Zsource Zin
Zload
A2I20H080NR1 A2I20H080GNR1
10
RF Device Data
Freescale Semiconductor, Inc.
P1dB – TYPICAL CARRIER SIDE LOAD PULL CONTOURS — 1840 MHz
8
41
40.5
8
41.5
42
6
42.5
43
4
IMAGINARY ()
IMAGINARY ()
6
43.5
E
2
P
0
44
–2
–4
41
2
42
3
4
5
6
REAL ()
7
8
6
1
2
–2
33.5
4
33
E
34
32.5
32
31.5
31
P
0
30.5
–2
3
4
5
6
7
4
5
6
REAL ()
7
8
9
8
9
10
10
–4
–6
–8
4
–12
–14
2
E
–10
P
0
–2
30
2
3
–4
6
IMAGINARY ()
IMAGINARY ()
0
8
1
54
52
P
Figure 10. P1dB Load Pull Efficiency Contours (%)
8
–4
62 60 58 56
66
2
–4
10
9
Figure 9. P1dB Load Pull Output Power Contours (dBm)
2
64
E
–2
40.5
1
4
–4
–6
1
2
3
4
5
6
7
8
9
REAL ()
REAL ()
Figure 11. P1dB Load Pull Gain Contours (dB)
Figure 12. P1dB Load Pull AM/PM Contours ()
NOTE:
P
= Maximum Output Power
E
= Maximum Drain Efficiency
10
Gain
Drain Efficiency
Linearity
Output Power
A2I20H080NR1 A2I20H080GNR1
RF Device Data
Freescale Semiconductor, Inc.
11
P3dB – TYPICAL CARRIER SIDE LOAD PULL CONTOURS — 1840 MHz
8
8
42.5
43
6
43.5
4
IMAGINARY ()
IMAGINARY ()
42
41.5
6
E
2
P
0
45
–2
–4
1
42
2
43
3
44
43.5
4
5
6
REAL ()
7
8
9
2
8
6
6
30.5
E
30
29
29.5
P
0
2
3
52
1
2
3
4
5
6
REAL ()
7
8
9
10
–6
4
5
6
7
4
E
–18
2
–20
–10
–12
–16
P
0
–2
28
1
56
58
P
–14
28.5
–2
–4
54
–8
IMAGINARY ()
2
64 62 60
31
31.5
32
66
Figure 14. P3dB Load Pull Efficiency Contours (%)
8
4
68
0
–4
10
Figure 13. P3dB Load Pull Output Power Contours (dBm)
IMAGINARY ()
E
–2
44.5
41.5
4
8
9
10
–4
1
2
3
4
5
6
7
8
9
REAL ()
REAL ()
Figure 15. P3dB Load Pull Gain Contours (dB)
Figure 16. P3dB Load Pull AM/PM Contours ()
NOTE:
P
= Maximum Output Power
E
= Maximum Drain Efficiency
10
Gain
Drain Efficiency
Linearity
Output Power
A2I20H080NR1 A2I20H080GNR1
12
RF Device Data
Freescale Semiconductor, Inc.
P1dB -- TYPICAL PEAKING SIDE LOAD PULL CONTOURS — 1840 MHz
3
3
44 44.5
45
2
45.5
E
1
IMAGINARY ()
IMAGINARY ()
2
0
P
--1
--3
44
64 62
70 68
60
58
66
0
56
P
--1
46.5
45
--2
E
1
44.5
2
1
--2
46
45.5
3
4
REAL ()
5
6
--3
7
Figure 17. P1dB Load Pull Output Power Contours (dBm)
2
1
3
4
REAL ()
5
6
7
Figure 18. P1dB Load Pull Efficiency Contours (%)
3
3
2
2
E
1
32
32.5
31.5
IMAGINARY ()
IMAGINARY ()
--32
31
0
P
30.5
--1
30
--2
--3
1
2
3
4
REAL ()
--24
--22
--28
1
--18
--20
--26
0
--16
P
--1
--2
29.5
29
E
5
6
7
Figure 19. P1dB Load Pull Gain Contours (dB)
NOTE:
--3
1
2
3
4
REAL ()
5
6
7
Figure 20. P1dB Load Pull AM/PM Contours ()
P
= Maximum Output Power
E
= Maximum Drain Efficiency
Gain
Drain Efficiency
Linearity
Output Power
A2I20H080NR1 A2I20H080GNR1
RF Device Data
Freescale Semiconductor, Inc.
13
P3dB -- TYPICAL PEAKING SIDE LOAD PULL CONTOURS — 1840 MHz
4
43.5 44
4
44.5
45
3
2
1
2
46
E
IMAGINARY ()
IMAGINARY ()
3
45.5
0
P
–1
47
–2
–4
45.5
44
2
1
3
4
REAL ()
5
6
–1
–4
7
Figure 21. P3dB Load Pull Output Power Contours (dBm)
4
4
3
3
P
56
2
1
3
4
REAL ()
5
6
7
2
29.5
30.5
0
29
28.5
P
–1
IMAGINARY ()
30
E
1
28
–2
1
2
1
E
--30 --26
--34 --32
--28
0
--22
--24
P
–1
–2
27.5
27
–3
–4
60 58
Figure 22. P3dB Load Pull Efficiency Contours (%)
2
IMAGINARY ()
0
68
66
–3
46.5
46
64 62
70
–2
45
–3
E
1
--20
–3
3
4
6
2
REAL ()
Figure 24. P3dB Load Pull AM/PM Contours ()
1
P
= Maximum Output Power
E
= Maximum Drain Efficiency
3
6
Figure 23. P3dB Load Pull Gain Contours (dB)
NOTE:
7
–4
4
REAL ()
5
5
7
Gain
Drain Efficiency
Linearity
Output Power
A2I20H080NR1 A2I20H080GNR1
14
RF Device Data
Freescale Semiconductor, Inc.
PACKAGE DIMENSIONS
A2I20H080NR1 A2I20H080GNR1
RF Device Data
Freescale Semiconductor, Inc.
15
A2I20H080NR1 A2I20H080GNR1
16
RF Device Data
Freescale Semiconductor, Inc.
A2I20H080NR1 A2I20H080GNR1
RF Device Data
Freescale Semiconductor, Inc.
17
A2I20H080NR1 A2I20H080GNR1
18
RF Device Data
Freescale Semiconductor, Inc.
A2I20H080NR1 A2I20H080GNR1
RF Device Data
Freescale Semiconductor, Inc.
19
A2I20H080NR1 A2I20H080GNR1
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RF Device Data
Freescale Semiconductor, Inc.
PRODUCT DOCUMENTATION, SOFTWARE AND TOOLS
Refer to the following resources to aid your design process.
Application Notes




AN1907: Solder Reflow Attach Method for High Power RF Devices in Over--Molded Plastic Packages
AN1955: Thermal Measurement Methodology of RF Power Amplifiers
AN1977: Quiescent Current Thermal Tracking Circuit in the RF Integrated Circuit Family
AN1987: Quiescent Current Control for the RF Integrated Circuit Device Family
Engineering Bulletins
 EB212: Using Data Sheet Impedances for RF LDMOS Devices
Software
 Electromigration MTTF Calculator
 RF High Power Model
 .s2p File
Development Tools
 Printed Circuit Boards
To Download Resources Specific to a Given Part Number:
1. Go to http://www.nxp.com/RF
2. Search by part number
3. Click part number link
4. Choose the desired resource from the drop down menu
REVISION HISTORY
The following table summarizes revisions to this document.
Revision
Date
0
Mar. 2016
Description
 Initial release of data sheet
A2I20H080NR1 A2I20H080GNR1
RF Device Data
Freescale Semiconductor, Inc.
21
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E 2016 Freescale Semiconductor, Inc.
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Document Number: A2I20H080N
Rev. 0, 3/2016
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RF Device Data
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