STMICROELECTRONICS STB55NE06

STB55NE06
N - CHANNEL ENHANCEMENT MODE
” SINGLE FEATURE SIZE ” POWER MOSFET
TYPE
ST B55NE06
■
■
■
■
■
■
■
V DSS
R DS(on)
ID
60 V
< 0.022 Ω
55 A
TYPICAL RDS(on) = 0.019 Ω
EXCEPTIONAL dv/dt CAPABILITY
100% AVALANCHE TESTED
LOW GATE CHARGE 100 oC
HIGH dv/dt CAPABILITY
APPLICATION ORIENTED
CHARACTERIZATION
FOR THROUGH-HOLE VERSION CONTACT
SALES OFFICE
3
1
DESCRIPTION
This Power Mosfet is the latest development of
SGS-THOMSON unique ”Single Feature Size”
strip-based process. The resulting transistor
shows extremely high packing density for low onresistance, rugged avalance characteristics and
less critical alignment steps therefore a remarkable manufacturing reproducibility.
D2PAK
TO-263
(suffix ”T4”)
INTERNAL SCHEMATIC DIAGRAM
APPLICATIONS
■
DC MOTOR CONTROL
■
DC-DC & DC-AC CONVERTERS
■
SYNCHRONOUS RECTIFICATION
ABSOLUTE MAXIMUM RATINGS
Symbol
V DS
Parameter
Value
Uni t
Drain-source Voltage (V GS = 0)
60
V
V DGR
Drain- gate Voltage (R GS = 20 kΩ)
60
V
V GS
Gate-source Voltage
± 20
V
55
A
Drain Current (continuous) at T c = 100 C
39
A
Drain Current (pulsed)
220
A
Total Dissipation at T c = 25 C
130
W
Derating F actor
0.96
W/ C
7
V/ ns
o
ID
Drain Current (continuous) at T c = 25 C
ID
o
IDM (•)
P t ot
dv/dt
T stg
Tj
o
Peak Diode Recovery voltage slope
Storage Temperature
Max. O perating Junction Temperature
(•) Pulse width limited by safe operating area
December 1997
o
-65 to 175
o
C
175
o
C
( 1) ISD ≤ 55 A, di/dt ≤ 300 A/µs, VDD ≤ V(BR)DSS, Tj ≤ TJMAX
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STB55NE06
THERMAL DATA
R t hj-ca se
Rthj -amb
R thc- si nk
Tl
Thermal Resistance Junction-case
Max
Thermal Resistance Junction-ambient
Max
Thermal Resistance Case-sink
Typ
Maximum Lead Temperature For Soldering Purpose
o
1.15
62.5
0.5
300
C/W
oC/W
o
C/W
o
C
Max Valu e
Unit
55
A
200
mJ
AVALANCHE CHARACTERISTICS
Symb ol
Parameter
I AR
Avalanche Current, Repetitive or Not-Repetitive
(pulse width limited by Tj max, δ < 1%)
E AS
Single Pulse Avalanche Energy
(starting Tj = 25 oC, ID = I AR , V DD = 25 V)
ELECTRICAL CHARACTERISTICS (Tcase = 25 oC unless otherwise specified)
OFF
Symb ol
V (BR)DSS
Parameter
Drain-source
Breakdown Voltage
Test Cond ition s
I D = 250 µA
Zero Gate Voltage
V DS = Max Rating
Drain Current (V GS = 0) V DS = Max Rating
I GSS
Gate-body Leakage
Current (V DS = 0)
Typ .
Max.
60
VGS = 0
I DSS
Min.
Un it
V
T c = 125 o C
V GS = ± 20 V
1
10
µA
µA
± 100
nA
ON (∗)
Symb ol
Parameter
Test Cond ition s
V GS(th)
Gate T hreshold Voltage V DS = VGS
ID = 250 µA
R DS( on)
Static Drain-source On
Resistance
V GS = 10V
I D = 27.5 A
ID(o n)
On State Drain Current
V DS > I D(on) x R DS(on) max
V GS = 10 V
Min.
Typ .
Max.
Un it
2
3
4
V
0.019
0.022
Ω
55
A
DYNAMIC
Symb ol
g fs (∗)
C iss
C oss
C rss
2/8
Parameter
Test Cond ition s
Forward
Transconductance
V DS > I D(on) x R DS(on) max
Input Capacitance
Output Capacitance
Reverse Transfer
Capacitance
V DS = 25 V
f = 1 MHz
I D =27.5 A
VGS = 0
Min.
Typ .
25
35
3050
380
100
Max.
Un it
S
4000
500
130
pF
pF
pF
STB55NE06
ELECTRICAL CHARACTERISTICS (continued)
SWITCHING ON
Symb ol
Typ .
Max.
Un it
t d(on)
tr
Turn-on T ime
Rise Time
Parameter
V DD = 30 V
ID = 27.5 A
R G =4.7 W
V GS = 10 V
(see test circuit, figure 3)
Test Cond ition s
30
120
40
160
ns
ns
Qg
Q gs
Q gd
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
V DD = 48 V
80
13
25
105
nC
nC
nC
Typ .
Max.
Un it
20
50
75
30
70
100
ns
ns
ns
Typ .
Max.
Un it
55
220
A
A
ID = 55 A
Min.
V GS = 10 V
SWITCHING OFF
Symb ol
t r(Vof f)
tf
tc
Parameter
Off-voltage Rise Time
Fall T ime
Cross-over T ime
Test Cond ition s
Min.
V DD = 48 V I D = 55 A
R G =4.7 Ω VGS = 10 V
(see test circuit, figure 5)
SOURCE DRAIN DIODE
Symb ol
I SD
I SDM (•)
V SD (∗)
t rr
Q rr
I RRM
Parameter
Test Cond ition s
Min.
Source-drain Current
Source-drain Current
(pulsed)
Forward O n Voltage
Reverse Recovery
Time
Reverse Recovery
Charge
Reverse Recovery
Current
I SD = 60 A
V GS = 0
di/dt = 100 A/µs
I SD = 55 A
o
Tj = 150 C
V DD = 30 V
(see test circuit, figure 5)
1.5
V
110
ns
430
µC
7.5
A
(∗) Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %
(•) Pulse width limited by safe operating area
Safe Operating Area
Thermal Impedance
3/8
STB55NE06
Output Characteristics
Transfer Characteristics
Transconductance
Static Drain-source On Resistance
Gate Charge vs Gate-source Voltage
Capacitance Variations
4/8
STB55NE06
Normalized Gate Threshold Voltage vs
Temperature
Normalized On Resistance vs Temperature
Source-drain Diode Forward Characteristics
5/8
STB55NE06
Fig. 1: Unclamped Inductive Load Test Circuit
Fig. 2: Unclamped Inductive Waveform
Fig. 3: Switching Times Test Circuits For
Resistive Load
Fig. 4: Gate Charge test Circuit
Fig. 5: Test Circuit For Inductive Load Switching
And Diode Recovery Times
6/8
STB55NE06
TO-263 (D2PAK) MECHANICAL DATA
mm
DIM.
MIN.
inch
TYP.
MAX.
MIN.
TYP.
MAX.
A
4.3
4.6
0.169
0.181
A1
2.49
2.69
0.098
0.106
B
0.7
0.93
0.027
0.036
B2
1.25
1.4
0.049
0.055
C
0.45
0.6
0.017
0.023
C2
1.21
1.36
0.047
0.053
D
8.95
9.35
0.352
0.368
E
10
10.28
0.393
0.404
G
4.88
5.28
0.192
0.208
L
15
15.85
0.590
0.624
L2
1.27
1.4
0.050
0.055
L3
1.4
1.75
0.055
0.068
E
A
C2
L2
D
L
L3
B2
B
A1
C
G
P011P6/C
7/8
STB55NE06
Information furnished is believed to be accurate and reliable. However, SGS-THOMSON Microelectronics assumes no responsability for the
consequences of use of such information nor for any infringement of patents or other rights of third parties which may results from its use. No
license is granted by implication or otherwise under any patent or patent rights of SGS-THOMSON Microelectronics. Specifications mentioned
in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied.
SGS-THOMSON Microelectronics products are not authorized for use as critical components in life support devices or systems without express
written approval of SGS-THOMSON Microelectonics.
 1997 SGS-THOMSON Microelectronics - Printed in Italy - All Rights Reserved
SGS-THOMSON Microelectronics GROUP OF COMPANIES
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