STD19NE06 N-CHANNEL 60V - 0.042 Ω - 19A IPAK/DPAK STripFET™ POWER MOSFET TYPE STD19NE06 ■ ■ ■ ■ ■ ■ VDSS RDS(on) ID 60 V <0.050 Ω 19 A TYPICAL RDS(on) = 0.042 Ω AVALANCHE RUGGED TECHNOLOGY 100% AVALANCHE TESTED 175 oC OPERATING TEMPERATURE THROUGH-HOLE IPAK (TO-251) POWER PACKAGE IN TUBE (SUFFIX “-1") SURFACE-MOUNTING DPAK (TO-252) POWER PACKAGE IN TAPE & REEL (SUFFIX “T4") 3 3 1 2 1 IPAK TO-251 (Suffix “-1”) DPAK TO-252 (Suffix “T4”) DESCRIPTION This Power MOSFET is the latest development of STMicroelectronis unique "Single Feature Size™" stripbased process. The resulting transistor shows extremely high packing density for low on-resistance, rugged avalanche characteristics and less critical alignment steps therefore a remarkable manufacturing reproducibility. INTERNAL SCHEMATIC DIAGRAM APPLICATIONS ■ DC MOTOR CONTROL ■ DC-DC & DC-AC CONVERTERS ■ SYNCHRONOUS RECTIFICATION ABSOLUTE MAXIMUM RATINGS Symbol VDS VDGR VGS Parameter Value Unit Drain-source Voltage (VGS = 0) 60 V Drain-gate Voltage (RGS = 20 kΩ) 60 V ± 20 V ID Drain Current (continuous) at TC = 25°C 19 A ID Drain Current (continuous) at TC = 100°C 13.5 A 76 A IDM(•) Ptot EAS (1) Tstg Tj Gate- source Voltage Drain Current (pulsed) Total Dissipation at TC = 25°C 70 W Derating Factor 0.46 W/°C Single Pulse Avalanche Energy 1.45 mJ -55 to 175 °C Storage Temperature Max. Operating Junction Temperature (•) Pulse width limited by safe operating area March 2002 . (1) Starting T j = 25 oC, ID = 30A, VDD = 30 V 1/9 STD19NE06 THERMAL DATA Rthj-case Rthj-amb Tl Thermal Resistance Junction-case Thermal Resistance Junction-ambient Maximum Lead Temperature For Soldering Purpose Max Max 2.14 100 300 °C/W °C/W °C ELECTRICAL CHARACTERISTICS (Tcase = 25 °C unless otherwise specified) OFF Symbol Parameter Test Conditions Drain-source Breakdown Voltage ID = 250 µA, VGS = 0 IDSS Zero Gate Voltage Drain Current (VGS = 0) VDS = Max Rating VDS = Max Rating TC = 125°C IGSS Gate-body Leakage Current (VDS = 0) VGS = ± 20 V V(BR)DSS Min. Typ. Max. 60 Unit V 1 10 µA µA ±100 nA ON (*) Symbol Parameter Test Conditions VGS(th) Gate Threshold Voltage VDS = VGS RDS(on) Static Drain-source On Resistance VGS = 10 V ID = 250 µA Min. Typ. Max. Unit 2 3 4 V 0.042 0.05 Ω Min. Typ. Max. Unit 4 10 S 1450 200 45 pF pF pF ID = 9.5 A DYNAMIC Symbol 2/9 Parameter gfs (*) Forward Transconductance Ciss Coss Crss Input Capacitance Output Capacitance Reverse Transfer Capacitance Test Conditions VDS = 15 V ID = 9.5 A VDS = 25V, f = 1 MHz, VGS = 0 STD19NE06 ELECTRICAL CHARACTERISTICS (continued) SWITCHING ON Symbol Parameter Test Conditions Min. Typ. Max. Unit td(on) tr Turn-on Delay Time Rise Time ID = 15 A VDD = 30 V RG = 4.7 Ω VGS = 10 V (Resistive Load, Figure 3) 18 95 Qg Qgs Qgd Total Gate Charge Gate-Source Charge Gate-Drain Charge VDD = 48V ID = 30A VGS= 10V 35 10 12 50 nC nC nC Typ. Max. Unit ns ns SWITCHING OFF Symbol tr(Voff) tf tc Parameter Off-voltage Rise Time Fall Time Cross-over Time Test Conditions Min. ID = 30 A Vclamp = 48 V RG = 4.7Ω, VGS = 10 V (Inductive Load, Figure 5) 10 41 60 ns ns ns SOURCE DRAIN DIODE Symbol Parameter ISD ISDM (•) Source-drain Current Source-drain Current (pulsed) VSD (*) Forward On Voltage ISD = 19 A Reverse Recovery Time Reverse Recovery Charge Reverse Recovery Current di/dt = 100A/µs ISD = 19 A VDD = 30 V Tj = 150°C (see test circuit, Figure 5) trr Qrr IRRM Test Conditions Min. Typ. VGS = 0 85 190 4.5 Max. Unit 19 76 A A 1.2 V ns nC A (*)Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %. (•)Pulse width limited by safe operating area. Safe Operating Area Thermal Impedance 3/9 STD19NE06 Output Characteristics Transfer Characteristics Transconductance Static Drain-source On Resistance Gate Charge vs Gate-source Voltage Capacitance Variations 4/9 STD19NE06 Normalized Gate Threshold Voltage vs Temperature Normalized on Resistance vs Temperature Source-drain Diode Forward Characteristics . . . 5/9 STD19NE06 Fig. 1: Unclamped Inductive Load Test Circuit Fig. 2: Unclamped Inductive Waveform Fig. 3: Switching Times Test Circuits For Resistive Load Fig. 4: Gate Charge test Circuit Fig. 5: Test Circuit For Inductive Load Switching And Diode Recovery Times 6/9 STD19NE06 TO-251 (IPAK) MECHANICAL DATA mm DIM. MIN. inch TYP. MAX. MIN. TYP. MAX. A 2.2 2.4 0.086 0.094 A1 0.9 1.1 0.035 0.043 A3 0.7 1.3 0.027 0.051 B 0.64 0.9 0.025 0.031 B2 5.2 5.4 0.204 0.212 B3 0.85 B5 0.033 0.3 0.012 B6 0.95 0.037 C 0.45 0.6 0.017 0.023 C2 0.48 0.6 0.019 0.023 D 6 6.2 0.236 0.244 E 6.4 6.6 0.252 0.260 G 4.4 4.6 0.173 0.181 H 15.9 16.3 0.626 0.641 L 9 9.4 0.354 0.370 L1 0.8 1.2 0.031 0.047 L2 0.8 1 0.031 0.039 A1 C2 A3 A C H B B3 = 1 = 2 G = = = E B2 = 3 B5 L D B6 L2 L1 0068771-E 7/9 STD19NE06 TO-252 (DPAK) MECHANICAL DATA mm DIM. MIN. inch TYP. MAX. MIN. TYP. MAX. A 2.2 2.4 0.086 0.094 A1 0.9 1.1 0.035 0.043 A2 0.03 0.23 0.001 0.009 B 0.64 0.9 0.025 0.035 B2 5.2 5.4 0.204 0.212 C 0.45 0.6 0.017 0.023 C2 0.48 0.6 0.019 0.023 D 6 6.2 0.236 0.244 E 6.4 6.6 0.252 0.260 G 4.4 4.6 0.173 0.181 H 9.35 10.1 0.368 0.397 L2 0.8 L4 0.031 0.6 1 0.023 0.039 A1 C2 A H A2 C DETAIL "A" L2 D = 1 = G 2 = = = E = B2 3 B DETAIL "A" L4 0068772-B 8/9 STD19NE06 Information furnished is believed to be accurate and reliable. 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