STB180N55 STP180N55 N-CHANNEL 55V - 2.9mΩ - 120A - D²PAK - TO-220 MDmesh™ Low Voltage Power MOSFET TARGET SPECIFICATION General features ■ ■ Type VDSS RDS(on) ID STB180N55 55V 3.5mΩ 120A (Note 1) STP180N55 55V 3.8mΩ 120A (Note 1) 3 ULTRA LOW ON-RESISTANCE 3 1 1 100% AVALANCHE TESTED D²PAK 2 TO-220 Description This N-Channel enhancement mode MOSFET is the latest refinement of STMicroelectronic unique “Single Feature Size™“ strip-based process with less critical aligment steps and therefore a remarkable manufacturing reproducibility. The resulting transistor shows extremely high packing density for low on-resistance, rugged avalanche characteristics and low gate charge. Internal schematic diagram Applications ■ HIGH CURRENT SWITCHING APPLICATION Order codes Sales Type Marking Package Packaging STB180N55 B180N55 D²PAK TAPE & REEL STP180N55 P180N55 TO-220 TUBE January 2006 This is a preliminary information on a new product foreseen to be developed. Details are subject to change without notice Rev 1 1/11 www.st.com 11 STP180N55 - STB180N55 1 Electrical ratings 1 Electrical ratings Table 1. Absolute maximum ratings Symbol Parameter Value Unit 55 V VDS Drain-source Voltage (VGS=0) VGS Gate-Source Voltage ± 20 V ID Note 1 Drain Current (continuous) at TC = 25°C 120 A ID Note 1 Drain Current (continuous) at TC = 100°C 120 A Drain Current (pulsed) 480 A Total Dissipation at TC = 25°C 315 W Derating Factor 2.1 W/°C Peak Diode Recovery voltage slope TBD V/ns EAS Note 4 Single Pulse Avalanche Energy TBD mJ Tj Operating Junction Temperature Storage Temperature -55 to 175 °C IDM Note 2 PTOT dv/dt Tstg Table 2. Thermal data TO-220 Rthj-case Thermal Resistance Junction-case D²PAK 0.48 Unit °C/W Rthj-a Thermal Resistance Junction-ambient Max 62.5 -- °C/W Rthj-pcb Note 5 Thermal Resistance Junction-ambient Max -- 35 °C/W Tl Maximum Lead Temperature For Soldering Purpose 300 -- °C 2/11 STP180N55 - STB180N55 2 2 Electrical characteristics Electrical characteristics (TCASE = 25 °C unless otherwise specified) Table 3. On/off states Symbol Parameter V(BR)DSS Drain-Source Breakdown Voltage IDSS Zero Gate Voltage Drain Current (VGS = 0) IGSS Test Conditions ID = 250µA, V GS= 0 Min. Typ. Max. 55 Unit V VDS = Max Rating, VDS = Max Rating,Tc = 125°C 10 100 µA µA Gate Body Leakage Current (VDS = 0) VGS = ±20V ±200 nA VGS(th) Gate Threshold Voltage VDS= VGS, ID = 250µA 4 V RDS(on) Static Drain-Source On Resistance VGS= 10V, ID= 60A 3.5 3.8 mΩ mΩ Max. Unit Table 4. Symbol gfs Note 3 Ciss Coss Crss Qg Qgs Qgd 2 D²PAK TO-220 Dynamic Parameter Forward Transconductance Test Conditions VDS =15V, ID = 60A Input Capacitance VDS =25V, f=1 MHz, V GS=0 Output Capacitance Reverse Transfer Capacitance Total Gate Charge Gate-Source Charge Gate-Drain Charge VDD=44V, ID = 120A VGS =10V (see Figure 2) Min. Typ. TBD S 6200 1800 100 pF pF pF 110 TBD TBD TBD nC nC nC 3/11 STP180N55 - STB180N55 2 Electrical characteristics Table 5. Symbol td(on) tr td(off) tf Table 6. Switching times Parameter Test Conditions VDD=27V, ID= 60A, Turn-on Delay Time Rise Time RG=4.7Ω, VGS=10V Off voltage Rise Time FallTime RG=4.7Ω, VGS=10V (see Figure 3) VDD=27V, ID= 60A, (see Figure 3) Parameter ISD ISDM Note 2 Source-drain Current Source-drain Current (pulsed) VSDNote 3 Forward on Voltage ISD=120A, V GS=0 Reverse Recovery Time Reverse Recovery Charge Reverse Recovery Current ISD=120A, di/dt = 100A/µs, VDD=30V, Tj=150°C trr IRRM (1) Current limited by package (2) Pulse width limited by safe operating area (3) Pulsed: pulse duration = 300µs, duty cycle 1.5% (4) Starting Tj=25°C, Id=60A, Vdd=40V (5) When mounted o inch² FR4 2oz Cu 4/11 Typ. Max. Unit TBD TBD ns ns TBD TBD ns ns Source drain diode Symbol Qrr Min. Test Conditions Min. Typ. TBD TBD TBD Max. Unit 120 480 A A 1.5 V ns nC A STP180N55 - STB180N55 3 3 Test circuits Test circuits Figure 1. Switching Times Test Circuit For Resistive Load Figure 2. Gate Charge Test Circuit Figure 3. Test Circuit For Indictive Load Switching and Diode Recovery Times Figure 5. Unclamped Inductive Load Test Circuit Figure 4. Unclamped Inductive Waveform Figure 6. Switching Time Waveform 5/11 4 Package mechanical data 4 STP180N55 - STB180N55 Package mechanical data In order to meet environmental requirements, ST offers these devices in ECOPACK® packages. These packages have a Lead-free second level interconnect . The category of second level interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK is an ST trademark. ECOPACK specifications are available at: www.st.com 6/11 STP180N55 - STB180N55 4 Package mechanical data TO-220 MECHANICAL DATA DIM. mm. MIN. TYP inch MAX. MIN. TYP. MAX. A 4.40 4.60 0.173 0.181 b 0.61 0.88 0.024 0.034 b1 1.15 1.70 0.045 0.066 c 0.49 0.70 0.019 0.027 D 15.25 15.75 0.60 0.620 E 10 10.40 0.393 0.409 e 2.40 2.70 0.094 0.106 e1 4.95 5.15 0.194 0.202 F 1.23 1.32 0.048 0.052 H1 6.20 6.60 0.244 0.256 J1 2.40 2.72 0.094 0.107 0.551 L 13 14 0.511 L1 3.50 3.93 0.137 L20 16.40 L30 0.154 0.645 28.90 1.137 øP 3.75 3.85 0.147 0.151 Q 2.65 2.95 0.104 0.116 7/11 STP180N55 - STB180N55 4 Package mechanical data D2PAK MECHANICAL DATA TO-247 MECHANICAL DATA mm. inch DIM. MAX. MIN. A MIN. 4.4 TYP 4.6 0.173 TYP. 0.181 MAX. A1 2.49 2.69 0.098 0.106 A2 0.03 0.23 0.001 0.009 B 0.7 0.93 0.027 0.036 B2 1.14 1.7 0.044 0.067 C 0.45 0.6 0.017 0.023 C2 1.23 1.36 0.048 0.053 D 8.95 9.35 0.352 0.368 10.4 0.393 4.88 5.28 0.192 0.208 D1 E 8 10 E1 G 0.315 8.5 0.334 L 15 15.85 0.590 0.625 L2 1.27 1.4 0.050 0.055 L3 1.4 1.75 0.055 0.068 M 2.4 3.2 0.094 0.126 R 0º 0.015 4º 3 V2 0.4 1 8/11 STP180N55 - STB180N55 5 5 Packing mechanical data Packing mechanical data D2PAK FOOTPRINT TAPE AND REEL SHIPMENT REEL MECHANICAL DATA DIM. mm MIN. A B 1.5 C 12.8 D 20.2 G 24.4 N 100 T TAPE MECHANICAL DATA DIM. mm inch MIN. MAX. MIN. A0 10.5 10.7 0.413 0.421 B0 15.7 15.9 0.618 0.626 D 1.5 1.6 0.059 0.063 D1 1.59 1.61 0.062 0.063 E 1.65 1.85 0.065 0.073 F 11.4 11.6 0.449 0.456 inch MAX. MIN. MAX. 330 12.992 13.2 0.504 0.520 26.4 0.960 1.039 0.059 0795 3.937 30.4 1.197 BASE QTY BULK QTY 1000 1000 MAX. K0 4.8 5.0 0.189 0.197 P0 3.9 4.1 0.153 0.161 P1 11.9 12.1 0.468 0.476 P2 1.9 2.1 0.075 0.082 R 50 1.574 T 0.25 0.35 0.0098 0.0137 W 23.7 24.3 0.933 0.956 * on sales type 9/11 STP180N55 - STB180N55 6 Revision History 6 10/11 Revision History Date Revision 03-Jan-2006 1 Changes First release STP180N55 - STB180N55 6 Revision History Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. 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