STD100N03L-1 STD100N03L N-CHANNEL 30V - 0.0045Ω - 80A - DPAK - IPAK Planar STripFET™ MOSFET General features Package Type VDSSS STD100N03L 30 V <0.0055 Ω 80 A(1) 110 W STD100N03L-1 30 V <0.0055 Ω 80 A(1) 110 W RDS(on) ID Pw 3 3 ■ 100%AVALANCHE TESTED ■ SURFACE-MOUNTING DPAK (TO-252) ■ LOGIC LEVEL THRESHOLD 2 1 1 DPAK IPAK Description This MOSFET is the latest refinement of STMicroelectronic unique “Single Feature Size™” stripbased process. The resulting transistor shows extremely high packing density for low on-resistance, rugged avalanche characteristics, low gate charge and less critical aligment steps therefore a remarkable manufacturing reproducibility. This new improved device has been specifically designed for Automotive application and DC-DC converters. Internal schematic diagram Applications ■ HIGH CURRENT, HIGH SWITCHING DC-DC CONVERTER ■ AUTOMOTIVE Order codes Sales Type Marking Package Packaging STD100N03LT4 D100N03L DPAK TAPE & REEL STD100N03L-1 D100N03L-1 IPAK TUBE September 2005 Rev 2 1/14 www.st.com 14 STD100N03L - STD100N03L-1 1 Electrical ratings 1 Electrical ratings Table 1. Absolute maximum ratings Symbol Parameter VDS Drain-Source Voltage (VGS = 0) VGS Gate-Source Voltage Value Unit 30 V ± 20 V ID Note 1 Drain Current (continuous) at TC = 25°C 80 A ID Drain Current (continuous) at TC = 100°C 70 A Drain Current (pulsed) 320 A Total Dissipation at TC = 25°C 110 W Derating Factor 0.73 W/°C 3.9 V/ns -55 to 175 °C IDM Note 2 PTOT dv/dt Note 3 Peak Diode Recovery Voltage Slope Tj Tstg Table 2. Operating Junction Temperature Storage Temperature Thermal Data Rthj-case Thermal Resistance Junction-case Max 1.36 °C/W Rthj-amb Thermal Resistance Junction-ambient Max 100 °C/W Tl Maximum Lead Temperature For Soldering Purpose (for 10sec. 1.6 mm from case) 275 °C Value Unit Table 3. Symbol 2/14 Avalanche characteristics Parameter IAV Not-Repetitive Avalanche Current (pulse width limited by Tj max) 40 A EAS Single pulsed avalanche Energy (starting Tj=25°C, ID=IAV, VDD = 24V 500 mJ STD100N03L - STD100N03L-1 2 2 Electrical characteristics Electrical characteristics (TCASE = 25 °C unless otherwise specified) Table 4. On/Off states Symbol Parameter V(BR)DSS Drain-Source Breakdown Voltage IDSS Zero Gate Voltage Drain Current (VGS = 0) IGSS Test Conditions ID = 250µA, V GS= 0 Min. Typ. Max. 30 Unit V VDS = Max Rating, VDS = Max Rating, Tc=125°C 10 100 µA µA Gate Body Leakage Current (VDS = 0) VDS = ± 20 V ±200 nA VGS(th) Gate Threshold Voltage VDS= VGS, ID = 250 µA RDS(on) Static Drain-Source On Resistance VGS= 10 V, ID= 40 A RDS(on) Static Drain-Source On Resistance VGS= 10 V, ID= 40 A @125°C Table 5. Symbol gfs Note 4 Ciss Coss Crss Qg Parameter Forward Transconductance RG Gate Input Resistance Symbol td(on) tr td(off) tf 0.0045 0.008 VGS= 5 V, ID= 20 A 0.0055 0.01 Ω Ω Ω Ω 0.0068 0.0146 VGS= 5 V, ID= 20 A @125°C Test Conditions Min. VDS = 10 V, ID= 15 A Input Capacitance VDS = 25V, f = 1 MHz, V GS =0 Output Capacitance Reverse Transfer Capacitance Qgd Table 6. V Dynamic Total Gate Charge Gate-Source Charge Gate-Drain Charge Qgs 1 VDD = 24 V, ID = 80 A, Typ. (see Figure 15) f=1 MHz Gate DC Bias = 0 Test Signal Level = 20mV Open Drain Unit 31 S 2060 728 67 pF pF pF 20 7 7.5 VGS = 5V Max. 27 nC nC nC Ω 1.9 Switching time Parameter Turn-on Delay Time Rise Time Turn-off Delay Time Fall Time Test Conditions VDD = 15 V, ID = 40 A RG= 4.7 Ω, VGS= 10V, (see Figure 14) VDD = 15 V, ID = 40 A RG= 4.7 Ω, VGS= 10V, (see Figure 14) Min. Typ. Max. Unit 9 205 ns ns 31 35 ns ns 3/14 STD100N03L - STD100N03L-1 2 Electrical characteristics Table 7. Symbol Source-Drain Diode Parameter Test Conditions Min. Typ. ISD Source-Drain Current ISDMNote 2 Source-Drain Current (pulsed) VSD Note 4 trr Qrr IRRM Forward On Voltage ISD = 40 A, V GS = 0 Reverse Recovery Time Reverse Recovery Charge Reverse Recovery Current ISD = 80 A, di/dt = 100 A/µs VDD = 25 V, Tj = 150 °C (see Figure 16) (1) Current limited by package. (2) Pulse width limited by safe operating area (3) ISD ≤ 80A, di/dt ≤ 360 A/µs, VDS≤ V(BR)DSS , Tj ≤ TjMAX (4) Pulsed: Pulse duration = 300 µs, duty cycle 1.5% 4/14 40 40 2 Max. Unit 80 320 A A 1.3 V ns nC A STD100N03L - STD100N03L-1 2.1 2 Electrical characteristics Electrical characteristics (curves) Figure 1. Safe Operating Area Figure 2. Thermal Impedance Figure 3. Output Characteristics Figure 4. Transfer Characteristics Figure 5. Transconductance Figure 6. Static Drain-source on Resistance 5/14 STD100N03L - STD100N03L-1 2 Electrical characteristics Figure 7. Gate Charge vs Gate-source Voltage Figure 8. Figure 9. Normalized Gate Thereshold Voltage vs Temperature Figure 10. Normalized BVDSS vs Temperature Figure 11. Normalized on Resistance vs Temperature 6/14 Capacitance Variation Figure 12. Source-Drain Diode Forward Characteristics STD100N03L - STD100N03L-1 2 Electrical characteristics Figure 13. Allowable Iav vs. Time in Avalanche The previous curve gives the single pulse safe operating area for unclamped inductive loads, under the following conditions: PD(AVE) =0.5*(1.3*BV DSS *I AV ) EAS(AR) =PD(AVE) *tAV Where: IAV is the Allowable Current in Avalanche PD(AVE) is the Average Power Dissipation in Avalanche (Single Pulse) tAV is the Time in Avalanche 7/14 3 Test Circuits 3 Test Circuits Figure 14. Switching Times Test Circuit For Resistive Load Figure 16. Test Circuit For Indictive Load Switching and Diode Recovery Times 8/14 STD100N03L - STD100N03L-1 Figure 15. Gate Charge Test Circuit STD100N03L - STD100N03L-1 4 4 Package Mechanical Data Package Mechanical Data In order to meet environmental requirements, ST offers these devices in ECOPACK® packages. These packages have a Lead-free second level interconnect . The category of second level interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK is an ST trademark. ECOPACK specifications are available at: www.st.com 9/14 STD100N03L - STD100N03L-1 4 Package Mechanical Data TO-251 (IPAK) MECHANICAL DATA mm DIM. MIN. inch TYP. MAX. MIN. TYP. MAX. A 2.2 2.4 0.086 0.094 A1 0.9 1.1 0.035 0.043 A3 0.7 1.3 0.027 0.051 B 0.64 0.9 0.025 0.031 B2 5.2 5.4 0.204 0.212 B3 0.85 B5 0.033 0.3 0.012 B6 0.95 C 0.45 C2 0.48 D 6 E 6.4 6.6 0.037 0.6 0.017 0.023 0.6 0.019 0.023 6.2 0.236 0.244 0.252 0.260 G 4.4 4.6 0.173 0.181 H 15.9 16.3 0.626 0.641 L 9 9.4 0.354 0.370 L1 0.8 1.2 0.031 0.047 L2 0.8 1 0.031 0.039 A1 C2 A3 A C H B B3 = 1 = 2 G = = = E B2 = 3 B5 L D B6 L2 L1 0068771-E 10/14 STD100N03L - STD100N03L-1 4 Package Mechanical Data TO-252 (DPAK) MECHANICAL DATA mm DIM. MIN. TYP. inch MAX. MIN. TYP. MAX. A 2.20 2.40 0.087 0.094 A1 0.90 1.10 0.035 0.043 A2 0.03 0.23 0.001 0.009 B 0.64 0.90 0.025 0.035 B2 5.20 5.40 0.204 0.213 C 0.45 0.60 0.018 0.024 C2 0.48 0.60 0.019 0.024 D 6.00 6.20 0.236 0.244 E 6.40 6.60 0.252 0.260 G 4.40 4.60 0.173 0.181 H 9.35 10.10 0.368 0.398 1.00 0.024 L2 L4 V2 0.8 0.60 0 o 0.031 8 o 0 o 0.039 0o P032P_B 11/14 STD100N03L - STD100N03L-1 5 Packing mechanical data 5 Packing mechanical data DPAK FOOTPRINT All dimensions are in millimeters TAPE AND REEL SHIPMENT REEL MECHANICAL DATA DIM. mm MIN. A DIM. mm MIN. MAX. A0 6.8 7 0.267 0.275 B0 10.4 10.6 0.409 0.417 B1 D 12/14 inch MIN. 12.1 1.5 D1 1.5 E 1.65 MAX. 0.476 1.6 0.059 0.063 1.85 0.065 0.073 0.059 F 7.4 7.6 0.291 0.299 K0 2.55 2.75 0.100 0.108 P0 3.9 4.1 0.153 0.161 P1 7.9 8.1 0.311 P2 1.9 2.1 0.075 0.082 R 40 W 15.7 0.319 1.574 16.3 0.618 0.641 MIN. 330 B 1.5 C 12.8 D 20.2 G 16.4 N 50 T TAPE MECHANICAL DATA inch MAX. MAX. 12.992 0.059 13.2 0.504 0.520 0.795 18.4 0.645 0.724 1.968 22.4 0.881 BASE QTY BULK QTY 2500 2500 STD100N03L - STD100N03L-1 6 6 Revision History Revision History Date Revision Changes 01-Sep-2005 1 Initial release. 14-Sep-2005 2 Value changed on Figure 1 13/14 STD100N03L - STD100N03L-1 6 Revision History Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. 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