STS2DPF80 DUAL P-CHANNEL 80V - 0.21 Ω - 2.3A SO-8 STripFET™ POWER MOSFET TYPE VDSS RDS(on) ID STS2DPF80 80 V <0.25 Ω 2.3 A ■ ■ TYPICAL RDS(on) = 0.21 Ω STANDARD OUTLINE FOR EASY AUTOMATED SURFACE MOUNT ASSEMBLY DESCRIPTION This application specific Power MOSFET is the second generation of STMicroelectronis unique "Single Feature Size™" strip-based process. The resulting transistor shows extremely high packing density for low on-resistance, rugged avalanche characteristics and less critical alignment steps therefore a remarkable manufacturing reproducibility. APPLICATIONS ■ DC/DC CONVERTERS ■ BATTERY MANAGEMENT IN NOMADIC EQUIPMENT ■ POWER MANAGEMENT IN CELLULAR PHONES AND DISPLAY NEW GENERATION SO-8 INTERNAL SCHEMATIC DIAGRAM Ordering Information SALES TYPE STS8DPF80 MARKING S8DPF80 PACKAGE SO-8 PACKAGING TAPE & REEL ABSOLUTE MAXIMUM RATINGS Symbol VDS VDGR VGS ID IDM(•) Value Unit Drain-source Voltage (VGS = 0) Parameter 80 V Drain-gate Voltage (RGS = 20 kΩ) 80 V ± 20 V 2.0 1.3 A A 8 A Gate- source Voltage Drain Current (continuous) at TC = 25°C Single Operation Drain Current (continuous) at TC = 100°C Single Operation Drain Current (pulsed) Ptot Total Dissipation at TC = 25°C Tstg Storage Temperature Tj Max. Operating Junction Temperature (•) Pulse width limited by safe operating area. June 2004 2.5 W -55 to 150 °C 150 °C Note: For the P-CHANNEL MOSFET actual polarity of voltages and current has to be reversed Rev.0.1 1/9 STS2DPF80 TAB.1 THERMAL DATA Rthj-PCB(*) Thermal Resistance Junction-PCB 62.5 °C/W (*) When Mounted on 1 inch2 FR-4 board, 2 oz of Cu and t [ 10 sec. ELECTRICAL CHARACTERISTICS (TCASE = 25 °C UNLESS OTHERWISE SPECIFIED) TAB.2 OFF Symbol Parameter Test Conditions Drain-source Breakdown Voltage ID = 250 µA, VGS = 0 IDSS Zero Gate Voltage Drain Current (VGS = 0) VDS = Max Rating VDS = Max Rating TC = 125°C IGSS Gate-body Leakage Current (VDS = 0) VGS = ± 20 V V(BR)DSS Min. Typ. Max. 80 Unit V 1 10 µA µA ±100 nA Max. Unit 4 V 0.21 0.25 Ω Typ. Max. Unit TAB.3 ON (*) Symbol Parameter Test Conditions VGS(th) Gate Threshold Voltage VDS = VGS RDS(on) Static Drain-source On Resistance VGS = 10 V ID = 250 µA Min. Typ. 2 ID = 1 A TAB.4 DYNAMIC Symbol 2/9 Parameter Test Conditions gfs (*) Forward Transconductance VDS= 10V Ciss Coss Crss Input Capacitance Output Capacitance Reverse Transfer Capacitance VDS = 25V, f = 1 MHz, VGS = 0 ID = 1 A Min. 4 S 739 89.5 31 pF pF pF STS2DPF80 ELECTRICAL CHARACTERISTICS (continued) TAB.5 SWITCHING ON Symbol Parameter Test Conditions Min. Typ. Max. Unit td(on) tr Turn-on Delay Time Rise Time ID = 1 A VDD = 40 V VGS = 10 V RG = 4.7 Ω (Resistive Load, Figure 1) 13.5 18 ns ns Qg Qgs Qgd Total Gate Charge Gate-Source Charge Gate-Drain Charge VDD= 64V ID= 2A VGS=10V 20 2.5 4.9 nC nC nC (See test circuit, Figure 2) TAB.6 SWITCHING OFF Symbol td(off) tf Parameter Turn-off Delay Time Fall Time Test Conditions Min. VDD = 40 V ID = 1 A VGS = 10 V RG = 4.7Ω, (Resistive Load, Figure 1) Typ. Max. 32 13 Unit ns ns TAB.7 SOURCE DRAIN DIODE Symbol Parameter ISD ISDM (•) Source-drain Current Source-drain Current (pulsed) VSD (*) Forward On Voltage ISD = 1 A Reverse Recovery Time Reverse Recovery Charge Reverse Recovery Current ISD = 2 A di/dt = 100A/µs Tj = 150°C VDD = 40 V (See test circuit, Figure 3) trr Qrr IRRM Test Conditions Min. Typ. VGS = 0 47 87 3.7 Max. Unit 2.3 9.2 A A 1.2 V ns nC A (*)Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %. (•)Pulse width limited by safe operating area. Safe Operating Area Thermal Impedance 3/9 STS2DPF80 Output Characteristics Transfer Characteristics Transconductance Static Drain-source On Resistance Gate Charge vs Gate-source Voltage Capacitance Variations 4/9 STS2DPF80 Normalized Gate Threshold Voltage vs Temperature Normalized on Resistance vs Temperature Source-drain Diode Forward Characteristics Normalized Breakdown Voltage Temperature. . . 5/9 STS2DPF80 Fig. 1: Switching Times Test Circuits For Resistive Load Fig. 3: Test Circuit For Diode Recovery Behaviour 6/9 Fig. 2: Gate Charge test Circuit STS2DPF80 SO-8 MECHANICAL DATA mm DIM. MIN. TYP. A a1 MAX. MIN. TYP. 1.75 0.1 0.003 0.009 1.65 0.65 MAX. 0.068 0.25 a2 a3 inch 0.064 0.85 0.025 0.033 b 0.35 0.48 0.013 0.018 b1 0.19 0.25 0.007 0.010 C 0.25 0.5 0.010 0.019 c1 45 (typ.) D 4.8 5.0 0.188 0.196 E 5.8 6.2 0.228 0.244 e 1.27 0.050 e3 3.81 0.150 F 3.8 4.0 0.14 0.157 L 0.4 1.27 0.015 0.050 M S 0.6 0.023 8 (max.) 0016023 7/9 STS2DPF80 Revision History Date Revision Wednesday 16 June 2004 0.1 8/9 Description of Changes FIRST ISSUE STS2DPF80 Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. 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