NEC UPA1742TP

DATA SHEET
MOS FIELD EFFECT TRANSISTOR
µ PA1742TP
SWITCHING
N-CHANNEL POWER MOS FET
PACKAGE DRAWING (Unit: mm)
DESCRIPTION
The µPA1742TP is N-channel MOS FET device that
features a low on-state resistance and excellent switching
characteristics, and designed for high voltage applications
such as DC/DC converter.
8
5
• High voltage: VDSS = 250 V
• Gate voltage rating: ±30 V
• Low on-state resistance
RDS(on) = 0.55 Ω MAX. (VGS = 10 V, ID = 3.5 A)
• Low input capacitance
Ciss = 460 pF TYP. (VDS = 10 V, VGS = 0 V)
• Built-in gate protection diode
• Small and surface mount package (Power HSOP8)
1
0.8 ±0.2
0.05 ±0.05
+0.10
–0.05
4
Power HSOP8
8
0.12 M
1.1 ±0.2
1
2.9 MAX.
µPA1742TP
0.10 S
1.27 TYP.
0.40
2.0 ±0.2
PACKAGE
4.4 ±0.15
0.15
S
ORDERING INFORMATION
PART NUMBER
6.0 ±0.3
4
5.2 +0.17
–0.2
+0.10
–0.05
1.49 ±0.21
FEATURES
1.44 TYP.
1, 2, 3
; Source
4
; Gate
5, 6, 7, 8, 9 ; Drain
9
4.1 MAX.
5
ABSOLUTE MAXIMUM RATINGS (TA = 25°C, unless otherwise noted. All terminals are connected.)
Drain to Source Voltage (VGS = 0 V)
VDSS
250
V
Gate to Source Voltage (VDS = 0 V)
VGSS
±30
V
ID(DC)
±7.0
A
ID(pulse)
±21
A
PT1
24
W
PT2
1.0
W
Tch
150
°C
Tstg
−55 to +150
°C
IAS
7.0
A
EAS
4.9
mJ
IAR
7.0
A
Drain Current (DC) (TC = 25°C)
Drain Current (pulse)
Note1
Total Power Dissipation (TC = 25°C)
Total Power Dissipation (TA = 25°C)
Note2
Channel Temperature
Storage Temperature
Single Avalanche Current
Note3
Single Avalanche Energy
Note3
Repetitive Avalanche Current
Note4
EQUIVALENT CIRCUIT
Drain
Body
Diode
Gate
Gate
Protection
Diode
Source
Note4
Repetitive Pulse Avalanche Energy
EAR
4.9
mJ
Notes 1. PW ≤ 10 µs, Duty Cycle ≤ 1%
2. Mounted on glass epoxy board of 1 inch x 1 inch x 0.8 mm
3. Starting Tch = 25°C, VDD = 125 V, RG = 25 Ω, L = 100 µH, VGS = 20 → 0 V
4. Tch(peak) ≤ 150°C, L = 100 µH
Remark The diode connected between the gate and source of the transistor serves as a protector against ESD.
When this device actually used, an additional protection circuit is externally required if a voltage exceeding
the rated voltage may be applied to this device.
The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.
Not all products and/or types are available in every country. Please check with an NEC Electronics
sales representative for availability and additional information.
Document No. G16325EJ1V0DS00 (1st edition)
Date Published April 2003 NS CP(K)
Printed in Japan
2002
µ PA1742TP
ELECTRICAL CHARACTERISTICS (TA = 25°C, unless otherwise noted. All terminals are connected.)
CHARACTERISTICS
SYMBOL
TEST CONDITIONS
MIN.
TYP.
MAX.
UNIT
Zero Gate Voltage Drain Current
IDSS
VDS = 250 V, VGS = 0 V
10
µA
Gate Leakage Current
IGSS
VGS = ±30 V, VDS = 0 V
±10
µA
VGS(off)
VDS = 10 V, ID = 1 mA
2.5
3.5
4.5
V
| yfs |
VDS = 10 V, ID = 3.5 A
2.5
5
RDS(on)
VGS = 10 V, ID = 3.5 A
0.41
Gate Cut-off Voltage
Forward Transfer Admittance
Note
Drain to Source On-state Resistance
Note
S
Ω
0.55
Input Capacitance
Ciss
VDS = 10 V
460
pF
Output Capacitance
Coss
VGS = 0 V
100
pF
Reverse Transfer Capacitance
Crss
f = 1 MHz
45
pF
Turn-on Delay Time
td(on)
VDD = 125 V, ID = 3.5 A
11
ns
tr
VGS = 10 V
9
ns
td(off)
RG = 10 Ω
24
ns
8
ns
Rise Time
Turn-off Delay Time
Fall Time
tf
Total Gate Charge
QG
VDD = 200 V
14
nC
Gate to Source Charge
QGS
VGS = 10 V
3
nC
QGD
ID = 7.0 A
7
nC
Gate to Drain Charge
Body Diode Forward Voltage
Note
VF(S-D)
IF = 7.0 A, VGS = 0 V
0.9
1.5
V
Reverse Recovery Time
trr
IF = 7.0 A, VGS = 0 V
140
ns
Reverse Recovery Charge
Qrr
di/dt = 100 A/µs
560
nC
Note Pulsed: PW ≤ 800 µs, Duty Cycle ≤ 2%
TEST CIRCUIT 1 AVALANCHE CAPABILITY
D.U.T.
RG = 25 Ω
PG.
VGS = 20 → 0 V
TEST CIRCUIT 2 SWITCHING TIME
D.U.T.
L
50 Ω
VGS
RL
Wave Form
RG
PG.
VDD
VGS
0
VGS
10%
90%
VDD
VDS
90%
BVDSS
IAS
VDS
VDS
ID
Starting Tch
τ
τ = 1 µs
Duty Cycle ≤ 1%
TEST CIRCUIT 3 GATE CHARGE
PG.
2
50 Ω
10%
0
10%
Wave Form
VDD
D.U.T.
IG = 2 mA
90%
VDS
VGS
0
RL
VDD
Data Sheet G16325EJ1V0DS
td(on)
tr
ton
td(off)
tf
toff
µ PA1742TP
TYPICAL CHARACTERISTICS (TA = 25°C, unless otherwise noted. All terminals are connected.)
TOTAL POWER DISSIPATION vs.
CASE TEMPERATURE
120
25
PT - Total Power Dissipation - W
dT - Percentage of Rated Power - %
DERATING FACTOR OF FORWARD BIAS
SAFE OPERATING AREA
100
80
60
40
20
0
20
15
10
5
0
0
25
50
75
100
125
150
0
25
TC - Case Temperature - °C
50
75
100
125
150
175
TC - Case Temperature - °C
FORWARD BIAS SAFE OPERATING AREA
100
PW = 100 µs
10 ms
ID(DC) = 7.0 A
10
1 ms
DC
1
RDS(on) Limited
(at VGS = 10 V)
0.1
TC = 25°C
Single pulse
Power Dissipation Limited
0.01
0.1
1
10
100
1000
VDS - Drain to Source Voltage - V
TRANSIENT THERMAL RESISTANCE vs. PULSE WIDTH
rth(t) - Transient Thermal Resistance - °C/W
ID - Drain Current - A
ID(pulse) = 21 A
1000
Rth(ch-A) = 125°C/W
100
Rth(ch-C) = 5.2°C/W
10
1
Single pulse
Rth(ch-A):Mounted on glass epoxy board
(1 inch x 1inch x 0.8 mm), TA = 25°C
Rth(ch-C):TC = 25°C
0.1
0.01
100 µ
1m
10 m
100 m
1
10
100
1000
PW - Pulse Width - s
Data Sheet G16325EJ1V0DS
3
µ PA1742TP
DRAIN CURRENT vs.
DRAIN TO SOURCE VOLTAGE
FORWARD TRANSFER CHARACTERISTICS
30
100
Pulsed
VGS = 10 V
ID - Drain Current - A
ID - Drain Current - A
25
20
15
10
5
Pulsed
VDS = 10 V
10
1
T A = 150°C
125°C
75°C
25°C
−25°C
0.1
0.01
0.001
0
0.0001
0
5
10
15
20
25
30
0
5
VDS - Drain to Source Voltage - V
| yfs | - Forward Transfer Admittance - S
FORWARD TRANSFER ADMITTANCE vs.
DRAIN CURRENT
VGS(off) - Gate Cut-off Voltage - V
4.5
VDS = 10 V
ID = 1 mA
4
3.5
3
2.5
-25
0
25
50
75
100
125
100
10
1
0.1
0.01
0.01
150
0.1
Pulsed
VGS = 10 V
1.1
1
0.9
0.8
0.7
0.6
0.5
0.4
0.3
10
100
RDS(on) - Drain to Source On-state Resistance - Ω
RDS(on) - Drain to Source On-state Resistance - Ω
1.3
1
10
100
DRAIN TO SOURCE ON-STATE RESISTANCE vs.
GATE TO SOURCE VOLTAGE
1.3
Pulsed
1.2
1.1
1
ID = 7.0 A
3.5 A
1.4 A
0.9
0.8
0.7
0.6
0.5
0.4
0.3
ID - Drain Current - A
4
1
ID - Drain Current - A
DRAIN TO SOURCE ON-STATE RESISTANCE vs.
DRAIN CURRENT
0.1
VDS = 10 V
Pulsed
TA = −25°C
25°C
75°C
125°C
150°C
Tch - Channel Temperature - °C
1.2
15
VGS - Gate to Source Voltage - V
GATE CUT-OFF VOLTAGE vs.
CHANNEL TEMPERATURE
2
-50
10
0
2
4
6
8
10
12
14
16
18
VGS - Gate to Source Voltage - V
Data Sheet G16325EJ1V0DS
20
DRAIN TO SOURCE ON-STATE RESISTANCE vs.
CHANNEL TEMPERATURE
CAPACITANCE vs. DRAIN TO SOURCE VOLTAGE
1.5
1000
VGS = 10 V
Pulsed
Ciss, Coss, Crss - Capacitance - pF
1.25
ID = 7.0 A
1
0.75
3.5 A
0.5
0.25
C iss
100
C oss
10
C rss
VGS = 0 V
f = 1 MHz
1
0
-50
-25
0
25
50
75
100
125
150
0.1
175
1
Tch - Channel Temperature - °C
SWITCHING CHARACTERISTICS
1000
250
VDS - Drain to Source Voltage - V
td(on), tr, td(off), tf - Switching Time - ns
100
DYNAMIC INPUT/OUTPUT CHARACTERISTICS
100
VDD = 125 V
VGS = 10 V
RG = 0 Ω
td(off)
tf
td(on)
10
tr
15
ID = 7.0 A
200
12
V DD = 200 V
125 V
62.5 V
150
9
6
100
V GS
50
3
V DS
0
1
0.1
1
10
0
0
100
1
2
3
4
5
6
7
8
9 10 11 12 13 14 15
QG - Gate Charge - nC
ID - Drain Current - A
SOURCE TO DRAIN DIODE
FORWARD VOLTAGE
REVERSE RECOVERY TIME vs.
DIODE FORWARD CURRENT
1000
100
Pulsed
VGS = 0 V
trr - Reverse Recovery Time - ns
IF - Diode Forward Current - A
10
VDS - Drain to Source Voltage - V
VGS - Gate to Source Voltage - V
RDS(on) - Drain to Source On-state Resistance - Ω
µ PA1742TP
10
1
0.1
di/dt = 100 A/µs
VGS = 0 V
100
10
1
0.01
0
0.25
0.5
0.75
1
1.25
1.5
0.1
1
10
100
IF - Diode Forward Current - A
VF(S-D) - Source to Drain Voltage - V
Data Sheet G16325EJ1V0DS
5
µ PA1742TP
SINGLE AVALANCHE CURRENT vs.
INDUCTIVE LOAD
SINGLE AVALANCHE ENERGY
DERATING FACTOR
100
VDD = 125 V
RG = 25 Ω
VGS = 20 → 0 V
IAS = 7.0 A
Energy Derating Factor - %
IAS - Single Avalanche Current - A
10
EAS = 4.9 mJ
1
0.1
0.001
80
60
40
20
0
0.01
0.1
1
10
L - Inductive Load - mH
6
VDD = 125 V
RG = 25 Ω
VGS = 20 → 0 V
IAS ≤ 7.0 A
25
50
75
100
125
150
Starting Tch - Starting Channel Temperature - °C
Data Sheet G16325EJ1V0DS
µ PA1742TP
• The information in this document is current as of April, 2003. The information is subject to change
without notice. For actual design-in, refer to the latest publications of NEC Electronics data sheets or
data books, etc., for the most up-to-date specifications of NEC Electronics products. Not all
products and/or types are available in every country. Please check with an NEC Electronics sales
representative for availability and additional information.
• No part of this document may be copied or reproduced in any form or by any means without the prior
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M8E 02. 11-1