LZ24BP 1/4-type Progressive-scan Color CCD Area Sensor with 350 k Pixels LZ24BP DESCRIPTION PIN CONNECTIONS The LZ24BP is a 1/4-type (4.5 mm) solid-state image sensor that consists of PN photo-diodes and CCDs (charge-coupled devices). With approximately 350 000 pixels (692 horizontal x 504 vertical), the sensor provides a stable highresolution color image. All pixel signals can be read independently via the vertical shift register and horizontal shift register. 14-PIN HALF-PITCH WDIP FEATURES • • • • • • • • • • • • • • • • Progressive scan Square pixel Compatible with VGA format Number of effective pixels : 659 (H) x 494 (V) Number of optical black pixels – Horizontal : 2 front and 31 rear – Vertical : 8 front and 2 rear Number of dummy bits – Horizontal : 16 – Vertical : 5 Pixel pitch : 5.6 µm (H) x 5.6 µm (V) R, G, and B primary color mosaic filters Low fixed-pattern noise and lag No burn-in and no image distortion Blooming suppression structure Built-in output amplifier Built-in overflow drain voltage circuit and reset gate voltage circuit Horizontal shift register clock and reset gate clock voltage : 3.3 V (TYP.) Variable electronic shutter (1/30 to 1/10 000 s) Package : 14-pin half-pitch WDIP [Plastic] (WDIP014-P-0400A) Row space : 10.16 mm TOP VIEW ØV2 1 14 ØH2 ØV1 2 13 ØH1 ØV3A 3 12 ØRS ØV3B 4 11 NC PW 5 10 OFD GND 6 9 GND OS 7 8 OD (WDIP014-P-0400A) PRECAUTIONS • The exit pupil position of lens should be more than 25 mm from the top surface of the CCD. • Refer to "PRECAUTIONS FOR CCD AREA SENSORS" for details. In the absence of confirmation by device specification sheets, SHARP takes no responsibility for any defects that may occur in equipment using any SHARP devices shown in catalogs, data books, etc. Contact SHARP in order to obtain the latest device specification sheets before using any SHARP device. 1 LZ24BP PIN DESCRIPTION SYMBOL OD PIN NAME Output transistor drain OS ØRS Output signals ØV1, ØV2, ØV3A, ØV3B ØH1, ØH2 Vertical shift register clock Reset transistor clock Horizontal shift register clock OFD Overflow drain PW GND P-well Ground NC No connection ABSOLUTE MAXIMUM RATINGS PARAMETER Output transistor drain voltage (TA = +25 ˚C) SYMBOL VOD RATING 0 to +18 UNIT V Overflow drain voltage VOFD Reset gate clock voltage VØRS Internal output Internal output V V Vertical shift register clock voltage Horizontal shift register clock voltage VØV VØH –11.5 to +17.5 –0.3 to +12 V V Voltage difference between P-well and vertical clock VPW-VØV –29 to 0 V Voltage difference between vertical clocks VØV-VØV 0 to +15 V Storage temperature TSTG –40 to +85 ˚C Ambient operating temperature TOPR –20 to +70 ˚C NOTE 1 2 3 NOTES : 1. Do not connect to DC voltage directly. When OFD is connected to GND, connect VOD to GND. Overflow drain clock is applied below 27 Vp-p. 2. Do not connect to DC voltage directly. When ØRS is connected to GND, connect VOD to GND. Reset gate clock is applied below 8 Vp-p. 3. When clock width is below 10 µs, and clock duty factor is below 0.1%, voltage difference between vertical clocks will be below 28 V. 2 LZ24BP RECOMMENDED OPERATING CONDITIONS PARAMETER Ambient operating temperature SYMBOL TOPR MIN. TYP. 25.0 MAX. UNIT ˚C Output transistor drain voltage Overflow drain clock p-p level VOD VØOFD 14.55 15.0 15.45 V Ground P-well voltage GND VPW LOW level Vertical shift register clock Horizontal shift register clock INTERMEDIATE level VØV1L, VØV2L VØV3AL, VØV3BL 22.5 V 1 VØVL V V 2 –8.5 V 0.0 –10.0 –9.5 VØV1I, VØV2I –9.0 0.0 V HIGH level VØV3AI, VØV3BI VØV3AH, VØV3BH 14.55 15.0 15.45 V LOW level HIGH level VØH1L, VØH2L VØH1H, VØH2H –0.05 3.0 0.0 3.3 0.05 5.5 V V VØRS 3.0 3.3 5.5 V Reset gate clock p-p level Vertical shift register clock frequency Horizontal shift register clock frequency fØV1, fØV2 fØV3A, fØV3B fØH1, fØH2 Reset gate clock frequency fØRS NOTE 15.73 kHz 12.27 12.27 MHz MHz 1 NOTES : 1. Use the circuit parameter indicated in "SYSTEM CONFIGURATION EXAMPLE", and do not connect to DC voltage directly. 2. VPW is set below VØVL that is low level of vertical shift register clock, or is used with the same power supply that is connected to VL of V driver IC. * To apply power, first connect GND and then turn on VOD. After turning on VOD, turn on PW first and then turn on other powers and pulses. Do not connect the device to or disconnect it from the plug socket while power is being applied. 3 LZ24BP CHARACTERISTICS (1/30 s progressive scan readout mode) (TA = +25 ˚C, Operating conditions : The typical values specified in "RECOMMENDED OPERATING CONDITIONS". Color temperature of light source : 3 200 K, IR cut-off filter (CM-500, 1 mmt) is used.) PARAMETER Standard output voltage SYMBOL VO Photo response non-uniformity Saturation output voltage PRNU VSAT MIN. TYP. 150 MAX. UNIT mV NOTE 2 10 % mV 3 4 450 Dark output voltage VDARK 0.5 3.0 mV 1, 5 Dark signal non-uniformity Sensitivity (green channel) DSNU R 0.5 230 2.0 mV mV 1, 6 7 –94 –86 1.0 dB % 8 9 4.0 8.0 mA Smear ratio Image lag SMR AI Blooming suppression ratio ABL Output transistor drain current IOD 165 300 10 NOTES : 7. The average output voltage of G signal when a 1 000 lux light source with a 90% reflector is imaged by a lens of F4, f50 mm. 8. The sensor is exposed only in the central area of V/10 square with a lens at F4, where V is the vertical image size. SMR is defined by the ratio of the output voltage detected during the vertical blanking period to the maximum output voltage in the V/10 square. 9. The sensor is exposed at the exposure level corresponding to the standard conditions. AI is defined by the ratio of the output voltage measured at the 1st field during the non-exposure period to the standard output voltage. 10. The sensor is exposed only in the central area of V/10 square, where V is the vertical image size. ABL is defined by the ratio of the exposure at the standard conditions to the exposure at a point where blooming is observed. • Within the recommended operating conditions of VOD, VOFD of the internal output satisfies with ABL larger than 300 times exposure of the standard exposure conditions, and VSAT larger than 450 mV. 1. TA = +60 ˚C 2. The average output voltage of G signal under uniform illumination. The standard exposure conditions are defined as when Vo is 150 mV. 3. The image area is divided into 10 x 10 segments under the standard exposure conditions. Each segment's voltage is the average output voltage of all pixels within the segment. PRNU is defined by (Vmax – Vmin)/Vo, where Vmax and Vmin are the maximum and minimum values of each segment's voltage respectively. 4. The image area is divided into 10 x 10 segments. Each segment's voltage is the average output voltage of all pixels within the segment. VSAT is the minimum segment's voltage under 10 times exposure of the standard exposure conditions. 5. The average output voltage under non-exposure conditions. 6. The image area is divided into 10 x 10 segments under non-exposure conditions. DSNU is defined by (Vdmax – Vdmin), where Vdmax and Vdmin are the maximum and minimum values of each segment's voltage respectively. 4 LZ24BP PIXEL STRUCTURE OPTICAL BLACK (2 PIXELS) OPTICAL BLACK (2 PIXELS) yyyyyyyyy ,,,,,,,,, ,,,,,,,,, yyyyyyyyy ,,,,,,,,, yyyyyyyyy ,,,,,,,,, yyyyyyyyy ,,,,,,,,, yyyyyyyyy ,,,,,,,,, yyyyyyyyy ,,,,,,,,, yyyyyyyyy 1 pin OPTICAL BLACK (31 PIXELS) 659 (H) x 494 (V) OPTICAL BLACK (8 PIXELS) COLOR FILTER ARRAY (1, 494) (659, 494) G B G B G G B G B G R G R G R R G R G R G B G B G G B G B G R G R G R R G R G R G B G B G G B G B G R G R G R R G R G R G B G B G G B G B G R G R G R R G R G R G B G B G G B G B G R G R G R R G R G R G B G B G G B G B G R G R G R R G R G R (1, 1) (659, 1) 5 LZ24BP TIMING CHART VERTICAL TRANSFER TIMING 525 1 10 20 30 HD VD ØV1 ØV2 ØV3A ØV3B ØOFD 492 493 494 OB2 OB1 D1 D2 D3 D4 D5 OB2 OB4 OB6 OB8 OB1 OB3 OB5 OB7 1 2 OS HORIZONTAL TRANSFER TIMING 780, 1 78 HD 35 107 ØH1 ØH2 ØRS OS πππππ659 PRE SCAN (16) OB (2) OUTPUT (659) 1πππππππππππ OB (31) 35 71 ØV1 83 47 ØV2 59 ØV3A ØV3B 95 72 95 ØOFD READOUT TIMING HD ØV1 ØV2 ØV3A ØV3B 5.05 µs 39.8 µs (489 bits) (62 bits) 46.9 µs (576 bits) 63.5 µs (780 bits) 6 V4 V3B V3A V1B V1A VMa VH 7 13 14 15 16 17 18 19 20 21 22 23 24 (*1) 9 4 ØV3B 3 ØV3A ØV1 ØV2 + VDD (*1) ØRS, OFD : Use the circuit parameter indicated in this circuit example, and do not connect to DC voltage directly. (*2) Connect V1X of timing generator to V4X of V driver IC, LR36685. (*3) Connect V4 of V driver IC to ØV1 of LZ24BP. 7 6 5 PW 2 8 GND 1 (*3) LZ24BP (*1) 14 13 12 11 10 OS +5 V V3X V2X OFDX VH3BX NC 1 1 M$ CCD OUT + VH3AX V2 (*2) VL LR36685 VMb 2 POFD 3 ØH2 5 4 (*3) ØH1 6 ØRS 7 NC 8 1 M$ 270 pF OFD 9 0.01 µF 0. 47 µF GND 12 11 10 100 $ OD (*2) V1X VH ØH2 VL (VPW) ØRS ØH1 VOD LZ24BP SYSTEM CONFIGURATION EXAMPLE VOFDH VH3BX OFDX V2X V1X VH1AX V3X GND + VH3AX V4X VH1BX + PACKAGES FOR CCD AND CMOS DEVICES PACKAGE (Unit : mm) 14 WDIP (WDIP014-P-0400A) 0.03 9.00±0.10 (◊) (◊ : Lid's size) 0.50±0.50 CCD 1 0.50±0.50 Glass Lid CCD Package 0.03 Cross section A-A' 7 MAX. Rotation error of die : ¬= 1.0˚ 0.80±0.05 (◊) 5.00±0.075 ¬ 1.27±0.25 A 5.02MAX. 2.55±0.10 5.00±0.075 3.50±0.30 3.35±0.10 10.00±0.10 8 1.39±0.05 9.00±0.10 (◊) 14 Center of effective imaging area and center of package 1.96±0.05 10.00±0.10 A' 0.30TYP. 0.46TYP. 0.25 0.25±0.10 P-1.27TYP. +0.5 10.16–0 M 8 PRECAUTIONS FOR CCD AREA SENSORS PRECAUTIONS FOR CCD AREA SENSORS (In the case of plastic packages) – The leads of the package are fixed with package body (plastic), so stress added to a lead could cause a crack in the package body (plastic) in the jointed part of the lead. 1. Package Breakage In order to prevent the package from being broken, observe the following instructions : 1) The CCD is a precise optical component and the package material is ceramic or plastic. Therefore, ø Take care not to drop the device when mounting, handling, or transporting. ø Avoid giving a shock to the package. Especially when leads are fixed to the socket or the circuit board, small shock could break the package more easily than when the package isn’t fixed. 2) When applying force for mounting the device or any other purposes, fix the leads between a joint and a stand-off, so that no stress will be given to the jointed part of the lead. In addition, when applying force, do it at a point below the stand-off part. Glass cap Package Lead Fixed Stand-off 3) When mounting the package on the housing, be sure that the package is not bent. – If a bent package is forced into place between a hard plate or the like, the package may be broken. 4) If any damage or breakage occurs on the surface of the glass cap, its characteristics could deteriorate. Therefore, ø Do not hit the glass cap. ø Do not give a shock large enough to cause distortion. ø Do not scrub or scratch the glass surface. – Even a soft cloth or applicator, if dry, could cause dust to scratch the glass. (In the case of ceramic packages) – The leads of the package are fixed with low melting point glass, so stress added to a lead could cause a crack in the low melting point glass in the jointed part of the lead. Low melting point glass Lead 2. Electrostatic Damage As compared with general MOS-LSI, CCD has lower ESD. Therefore, take the following anti-static measures when handling the CCD : 1) Always discharge static electricity by grounding the human body and the instrument to be used. To ground the human body, provide resistance of about 1 M$ between the human body and the ground to be on the safe side. 2) When directly handling the device with the fingers, hold the part without leads and do not touch any lead. Fixed Stand-off 9 PRECAUTIONS FOR CCD AREA SENSORS ø The contamination on the glass surface should be wiped off with a clean applicator soaked in Isopropyl alcohol. Wipe slowly and gently in one direction only. – Frequently replace the applicator and do not use the same applicator to clean more than one device. ◊ Note : In most cases, dust and contamination are unavoidable, even before the device is first used. It is, therefore, recommended that the above procedures should be taken to wipe out dust and contamination before using the device. 3) To avoid generating static electricity, a. do not scrub the glass surface with cloth or plastic. b. do not attach any tape or labels. c. do not clean the glass surface with dustcleaning tape. 4) When storing or transporting the device, put it in a container of conductive material. 3. Dust and Contamination Dust or contamination on the glass surface could deteriorate the output characteristics or cause a scar. In order to minimize dust or contamination on the glass surface, take the following precautions : 1) Handle the CCD in a clean environment such as a cleaned booth. (The cleanliness level should be, if possible, class 1 000 at least.) 2) Do not touch the glass surface with the fingers. If dust or contamination gets on the glass surface, the following cleaning method is recommended : ø Dust from static electricity should be blown off with an ionized air blower. For antielectrostatic measures, however, ground all the leads on the device before blowing off the dust. 4. Other 1) Soldering should be manually performed within 5 seconds at 350 °C maximum at soldering iron. 2) Avoid using or storing the CCD at high temperature or high humidity as it is a precise optical component. Do not give a mechanical shock to the CCD. 3) Do not expose the device to strong light. For the color device, long exposure to strong light will fade the color of the color filters. 10