SSM9926TGO
N-CHANNEL ENHANCEMENT
MODE
8
POWER MOSFET
A
t
PRODUCT SUMMARY
D2
D1
Low on-resistance
Capable of 2.5V gate drive
G2
G1
Surface mount package
S1
S2
DESCRIPTION
The Advanced Power MOSFETs from Silicon Standard Corp.
BVDSS
20V
provide the designer with the best combination of fast switching,
RDS(ON)
32mΩ
ruggedized device design, ultra low on-resistance and
ID
4.7A
cost-effectiveness.
8
G2
S2
Pb-free; RoHS-compliant
D2
S2
G1
TSSOP-8
S1
D1
S1
ABSOLUTE MAXIMUM RATINGS
Symbol
Parameter
VDS
Drain-Source Voltage
VGS
Gate-Source Voltage
ID@TA=25℃
ID@TA=70℃
Rating
Units
20
V
±12
V
Continuous Drain Current
3
4.7
A
Continuous Drain Current
3
3.8
A
20
A
1
IDM
Pulsed Drain Current
PD@TA=25℃
Total Power Dissipation
1
W
Linear Derating Factor
0.008
W/℃
TSTG
Storage Temperature Range
-55 to 150
℃
TJ
Operating Junction Temperature Range
-55 to 150
℃
THERMAL
DATA
T
Symbol
Rthj-a
03/11/2007 Rev.1.00
D
Parameter
Thermal Resistance Junction-ambient
3
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Max.
Value
Unit
125
℃/W
1
SSM9926TGO
A
ELECTRICAL CHARACTERISTICS
Symbol
o
@Tj=25 C(unless otherwise specified)
Parameter
Test Conditions
Typ.
Max. Units
20
-
-
V
BVDSS
Drain-Source Breakdown Voltage
ΔBVDSS/ΔTj
Breakdown Voltage Temperature Coefficient Reference to 25℃, ID=1mA
-
0.03
-
V/℃
RDS(ON)
Static Drain-Source On-Resistance 2
VGS=4.5V, ID=4A
-
-
32
mΩ
VGS=2.5V, ID=2A
-
-
45
mΩ
0.5
-
1.2
V
-
12
-
S
VGS(th)
VGS=0V, ID=250uA
Min.
Gate Threshold Voltage
VDS=VGS, ID=250uA
gfs
Forward Transconductance
VDS=5V, ID=6A
IDSS
Drain-Source Leakage Current (Tj=25oC)
VDS=20V, VGS=0V
-
-
1
uA
Drain-Source Leakage Current (Tj=70oC)
VDS=16V ,VGS=0V
-
-
25
uA
Gate-Source Leakage
VGS=±12V
-
-
±100
nA
ID=6A
-
9
15
nC
IGSS
2
Qg
Total Gate Charge
Qgs
Gate-Source Charge
VDS=16V
-
2
-
nC
Qgd
Gate-Drain ("Miller") Charge
VGS=4.5V
-
4
-
nC
2
td(on)
Turn-on Delay Time
VDS=10V
-
8
-
ns
tr
Rise Time
ID=1A
-
10
-
ns
td(off)
Turn-off Delay Time
RG=3.3Ω,VGS=5V
-
16
-
ns
tf
Fall Time
RD=10Ω
-
7
-
ns
Ciss
Input Capacitance
VGS=0V
-
550
880
pF
Coss
Output Capacitance
VDS=20V
-
120
-
pF
Crss
Reverse Transfer Capacitance
f=1.0MHz
-
94
-
pF
Rg
Gate Resistance
f=1.0MHz
-
1.2
1.9
Ω
Min.
Typ.
IS=1.7A, VGS=0V
-
-
1.2
V
SOURCE-DRAIN DIODE
Symbol
VSD
Parameter
Forward On Voltage
Test Conditions
2
2
Max. Units
trr
Reverse Recovery Time
IS=6A, VGS=0V,
-
15
-
ns
Qrr
Reverse Recovery Charge
dI/dt=100A/µs
-
8
-
nC
Notes:
1.Pulse width limited by Max. junction temperature.
2.Pulse width <300us , duty cycle <2%.
2
3.Surface mounted on 1 in copper pad of FR4 board ; 208℃/W when mounted on Min. copper pad.
03/11/2007 Rev.1.00
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2
SSM9926TGO
30
30
5.0V
4.5V
3.5V
ID , Drain Current (A)
25
2.5V
20
5.0V
4.5V
3.5V
o
T A =150 C
25
ID , Drain Current (A)
o
TA=25 C
15
10
5
20
2.5V
15
10
V G =1.5V
5
V G =1.5V
0
0
0
1
2
3
0
1
Fig 1. Typical Output Characteristics
3
Fig 2. Typical Output Characteristics
50
1.6
ID=2A
T A =25 o C
ID=4A
V G =4.5V
Normalized R DS(ON)
1.4
40
RDS(ON) (mΩ )
2
V DS , Drain-to-Source Voltage (V)
V DS , Drain-to-Source Voltage (V)
30
1.2
1.0
0.8
0.6
20
0
2
4
6
8
10
-50
0
50
100
150
o
T j , Junction Temperature ( C)
V GS , Gate-to-Source Voltage (V)
Fig 3. On-Resistance v.s. Gate Voltage
Fig 4. Normalized On-Resistance
v.s. Junction Temperature
1.6
Normalized VGS(th) (V)
6
IS(A)
4
T j =150 o C
T j =25 o C
2
0
1.2
0.8
0.4
0
0.2
0.4
0.6
0.8
1
1.2
-50
Reverse Diode
03/11/2007 Rev.1.00
50
100
150
o
T j , Junction Temperature ( C)
V SD , Source-to-Drain Voltage (V)
Fig 5. Forward Characteristic of
0
Fig 6. Gate Threshold Voltage v.s.
Junction Temperature
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3
SSM9926TGO
A
f=1.0MHz
1000
15
C iss
V DS =10V
V DS =12V
V DS =16V
9
C (pF)
VGS , Gate to Source Voltage (V)
I D =6A
12
C oss
100
C rss
6
3
10
0
0
5
10
15
1
20
5
Q G , Total Gate Charge (nC)
Fig 7. Gate Charge Characteristics
Normalized Thermal Response (Rthja)
10
100us
1ms
ID (A)
13
17
21
25
29
Fig 8. Typical Capacitance Characteristics
100
10ms
1
100ms
0.1
9
V DS , Drain-to-Source Voltage (V)
1s
o
T A =25 C
Single Pulse
1
Duty factor=0.5
0.2
0.1
0.1
0.05
0.02
0.01
PDM
0.01
t
Single Pulse
T
Duty factor = t/T
Peak Tj = PDM x Rthja + Ta
DC
Rthja=208oC/W
0.001
0.01
0.1
1
10
100
0.0001
0.001
V DS , Drain-to-Source Voltage (V)
0.01
0.1
1
10
100
1000
t , Pulse Width (s)
Fig 9. Maximum Safe Operating Area
Fig 10. Effective Transient Thermal Impedance
VG
VDS
90%
QG
4.5V
QGS
QGD
10%
VGS
td(on) tr
td(off) tf
Charge
Fig 11. Switching Time Waveform
03/11/2007 Rev.1.00
Q
Fig 12. Gate Charge Waveform
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4
SSM9926TGO
Information furnished by Silicon Standard Corporation is believed to be accurate and reliable. However, Silicon Standard Corporation makes no
guarantee or warranty, expressed or implied, as to the reliability, accuracy, timeliness or completeness of such information and assumes no
responsibility for its use, or for infringement of any patent or other intellectual property rights of third parties that may result from its
use. Silicon Standard reserves the right to make changes as it deems necessary to any products described herein for any reason, including
without limitation enhancement in reliability, functionality or design. No license is granted, whether expressly or by implication, in relation to
the use of any products described herein or to the use of any information provided herein, under any patent or other intellectual property rights of
Silicon Standard Corporation or any third parties.
03/11/2007 Rev.1.00
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5