SSM4232GM
N-CHANNEL ENHANCEMENT MODE
POWER MOSFET
PRODUCT SUMMARY
D2
D2
Low On-Resistance
Simple Drive Requirement
Dual N MOSFET Package
D1
D1
S1
30V
RDS(ON)
22mΩ
ID
G2
S2
SO-8
BVDSS
7.8A
G1
DESCRIPTION
The advanced power MOSFETs from Silicon Standard Corp.
provide the designer with the best combination of fast
switching, ruggedized device design, ultra low on-resistance
and cost-effectiveness.
D2
D1
G2
G1
S2
S1
Pb-free; RoHS-compliant
ABSOLUTE MAXIMUM RATINGS
Parameter
Symbol
VDS
Drain-Source Voltage
VGS
Gate-Source Voltage
ID@TA=25℃
ID@TA=70℃
Rating
Units
30
V
±20
V
3
7.8
A
3
6.2
A
Continuous Drain Current
Continuous Drain Current
1
IDM
Pulsed Drain Current
30
A
PD@TA=25℃
Total Power Dissipation
2
W
Linear Derating Factor
0.016
W/℃
TSTG
Storage Temperature Range
-55 to 150
℃
TJ
Operating Junction Temperature Range
-55 to 150
℃
THERMAL DATA
Symbol
Rthj-a
09/23/2007 Rev.1.00
Parameter
Thermal Resistance Junction-ambient
3
Max.
www.SiliconStandard.com
Value
Unit
62.5
℃/W
1
SSM4232GM
ELECTRICAL CHARACTERISTICS
@ TJ=25oC ( unless otherwise specified )
Symbol
Parameter
Test Conditions
Min.
Typ.
Max. Units
30
-
-
V
BVDSS
Drain-Source Breakdown Voltage
ΔBVDSS/ΔTj
Breakdown Voltage Temperature Coefficient Reference to 25℃, ID=1mA
-
0.02
-
V/℃
RDS(ON)
Static Drain-Source On-Resistance2
VGS=10V, ID=7A
-
-
22
mΩ
VGS=4.5V, ID=5A
-
-
32
mΩ
VDS=VGS, ID=250uA
1
-
3
V
VGS(th)
Gate Threshold Voltage
gfs
Forward Transconductance
IDSS
VDS=10V, ID=7A
-
12
-
S
o
VDS=30V, VGS=0V
-
-
1
uA
o
Drain-Source Leakage Current (Tj=70 C)
VDS=24V, VGS=0V
-
-
25
uA
Gate-Source Leakage
VGS=±20V
-
-
±100
nA
ID=7A
-
13
21
nC
Drain-Source Leakage Current (Tj=25 C)
IGSS
VGS=0V, ID=250uA
2
Qg
Total Gate Charge
Qgs
Gate-Source Charge
VDS=24V
-
3
-
nC
Qgd
Gate-Drain ("Miller") Charge
VGS=4.5V
-
9
-
nC
VDS=15V
-
10
-
ns
2
td(on)
Turn-on Delay Time
tr
Rise Time
ID=1A
-
7
-
ns
td(off)
Turn-off Delay Time
RG=3.3Ω,VGS=10V
-
22
-
ns
tf
Fall Time
RD=15Ω
-
8
-
ns
Ciss
Input Capacitance
VGS=0V
-
720
1150
pF
Coss
Output Capacitance
VDS=25V
-
230
-
pF
Crss
Reverse Transfer Capacitance
f=1.0MHz
-
200
-
pF
Rg
Gate Resistance
f=1.0MHz
-
1.2
1.8
Ω
Min.
Typ.
IS=1.7A, VGS=0V
-
-
1.2
V
SOURCE-DRAIN DIODE
Symbol
VSD
Parameter
Test Conditions
2
Forward On Voltage
2
Max. Units
trr
Reverse Recovery Time
IS=7A, VGS=0V,
-
16
-
ns
Qrr
Reverse Recovery Charge
dI/dt=100A/µs
-
8
-
nC
Notes:
1.Pulse width limited by Max. junction temperature.
2.Pulse width <300us , duty cycle <2%.
3.Surface mounted on 1 in2 copper pad of FR4 board, t <10sec ; 135 ℃/W when mounted on Min. copper pad.
09/23/2007 Rev.1.00
www.SiliconStandard.com
2
SSM4232GM
40
40
30
20
10
V G = 3.0 V
20
V G = 3.0 V
10
0
0
0
1
2
3
4
0
5
1
Fig 1. Typical Output Characteristics
3
4
5
Fig 2. Typical Output Characteristics
30
1.6
ID=5A
T A =25 ℃
Normalized R DS(ON)
ID=7A
V G =10V
25
RDS(ON) (mΩ )
2
V DS , Drain-to-Source Voltage (V)
V DS , Drain-to-Source Voltage (V)
20
1.3
1.0
0.7
15
2
4
6
8
-50
10
V GS , Gate-to-Source Voltage (V)
100
150
Fig 4. Normalized On-Resistance
v.s. Junction Temperature
6
1.5
Normalized VGS(th) (V)
2.0
4
o
T j =150 C
50
T j , Junction Temperature ( C)
8
o
0
o
Fig 3. On-Resistance v.s. Gate Voltage
IS(A)
10V
7.0 V
5.0 V
4.5 V
30
ID , Drain Current (A)
T A = 25 C
ID , Drain Current (A)
T A = 150 o C
10V
7.0 V
5.0 V
4.5 V
o
T j =25 C
2
0
1.0
0.5
0.0
0
0.2
0.4
0.6
0.8
1
1.2
-50
Fig 5. Forward Characteristic of
Reverse Diode
09/23/2007 Rev.1.00
0
50
100
150
T j , Junction Temperature ( o C)
V SD , Source-to-Drain Voltage (V)
Fig 6. Gate Threshold Voltage v.s.
Junction Temperature
www.SiliconStandard.com
3
SSM4232GM
f=1.0MHz
1000
16
ID=7A
C (pF)
VGS , Gate to Source Voltage (V)
C iss
V DS =15V
V DS =20V
V DS =24V
12
8
C oss
C rss
4
0
100
0
5
10
15
20
25
30
1
5
9
Fig 7. Gate Charge Characteristics
17
21
25
29
Fig 8. Typical Capacitance Characteristics
1
Normalized Thermal Response (Rthja)
100
10
100us
1ms
ID (A)
13
V DS , Drain-to-Source Voltage (V)
Q G , Total Gate Charge (nC)
10ms
1
100ms
0.1
1s
T A =25 o C
Single Pulse
Duty factor=0.5
0.2
0.1
0.1
0.05
PDM
0.02
t
0.01
T
0.01
Duty factor = t/T
Peak Tj = PDM x Rthja + Ta
Single Pulse
Rthja = 135℃
℃ /W
DC
0.01
0.001
0.1
1
10
100
0.0001
0.001
V DS , Drain-to-Source Voltage (V)
0.01
0.1
1
10
100
1000
t , Pulse Width (s)
Fig 9. Maximum Safe Operating Area
Fig 10. Effective Transient Thermal Impedance
30
VG
ID , Drain Current (A)
V DS =5V
T j =25 o C
QG
T j =150 o C
20
4.5V
QGS
QGD
10
Charge
Q
0
0
2
4
6
V GS , Gate-to-Source Voltage (V)
Fig 11. Transfer Characteristics
09/23/2007 Rev.1.00
Fig 12. Gate Charge Waveform
www.SiliconStandard.com
4
SSM4232GM
Information furnished by Silicon Standard Corporation is believed to be accurate and reliable. However, Silicon Standard Corporation makes no
guarantee or warranty, expressed or implied, as to the reliability, accuracy, timeliness or completeness of such information and assumes no
responsibility for its use, or for infringement of any patent or other intellectual property rights of third parties that may result from its
use. Silicon Standard reserves the right to make changes as it deems necessary to any products described herein for any reason, including
without limitation enhancement in reliability, functionality or design. No license is granted, whether expressly or by implication, in relation to
the use of any products described herein or to the use of any information provided herein, under any patent or other intellectual property rights of
Silicon Standard Corporation or any third parties.
09/23/2007 Rev.1.00
www.SiliconStandard.com
5