SSM2306N
N-CHANNEL ENHANCEMENT-MODE POWER MOSFET
Capable of 2.5V gate-drive
Lower on-resistance
D
Surface-mount package
BVDSS
20V
RDS(ON)
32mΩ
5.3A
ID
S
SOT-23
Description
G
Power MOSFETs from Silicon Standard utilize advanced processing techniques to
achieve the lowest possible on-resistance in an extremely efficient and
cost-effective device.
The SOT-23 package is widely used for commercial and industrial
applications.
D
G
S
Absolute Maximum Ratings
Symbol
Parameter
VDS
Drain-Source Voltage
VGS
Gate-Source Voltage
ID @ TA=25°C
ID @ TA=70°C
Rating
Units
20
V
± 12
V
3
5.3
A
3
4.3
A
10
A
Continuous Drain Current , VGS @ 4.5V
Continuous Drain Current , VGS @ 4.5V
1,2
IDM
Pulsed Drain Current
PD @ TA=25°C
Total Power Dissipation
1.38
W
Linear Derating Factor
0.01
W/°C
TSTG
Storage Temperature Range
-55 to 150
°C
TJ
Operating Junction Temperature Range
-55 to 150
°C
Thermal Data
Symbol
Rthj-a
Rev.2.02 3/16/2004
Parameter
Thermal Resistance Junction-ambient
3
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Max.
Value
Unit
90
°C/W
1 of 4
SSM2306N
Electrical Characteristics @ Tj=25oC (unless otherwise specified)
Symbol
Parameter
Test Conditions
Min.
Typ.
20
-
Max. Units
BVDSS
Drain-Source Breakdown Voltage
∆BV DSS/∆ Tj
Breakdown Voltage Temperature Coefficient Reference to 25°C, ID=1mA
-
0.1
-
RDS(ON)
Static Drain-Source On-Resistance
VGS=10V, ID=5.5A
-
-
27
mΩ
VGS=4.5V, ID=5.3A
-
-
32
mΩ
VGS=2.5V, ID=2.6A
-
-
50
mΩ
Gate Threshold Voltage
VDS=VGS, ID=250uA
0.5
-
-
V
gfs
Forward Transconductance
VDS=5V, ID=5.3A
-
13
-
S
IDSS
Drain-Source Leakage Current (Tj=25oC)
VDS=20V, VGS=0V
-
-
1
uA
Drain-Source Leakage Current (Tj=55 C)
VDS=16V ,VGS=0V
-
-
10
uA
Gate-Source Leakage
VGS= ± 12V
-
-
±100
nA
ID=5.3A
-
8.7
-
nC
VGS(th)
o
IGSS
2
VGS=0V, ID=250uA
-
V
V/°C
Qg
Total Gate Charge
Qgs
Gate-Source Charge
VDS=10V
-
1.5
-
nC
Qgd
Gate-Drain ("Miller") Charge
VGS=4.5V
-
3.6
-
nC
VDS=15V
-
6
-
ns
2
td(on)
Turn-on Delay Time
tr
Rise Time
ID=1A
-
14
-
ns
td(off)
Turn-off Delay Time
RG=2Ω ,VGS=10V
-
18.4
-
ns
tf
Fall Time
RD=15Ω
-
2.8
-
ns
Ciss
Input Capacitance
VGS=0V
-
575
-
pF
Coss
Output Capacitance
VDS=10V
-
120
-
pF
Crss
Reverse Transfer Capacitance
f=1.0MHz
-
92.3
-
pF
Min.
Typ.
Source-Drain Diode
Symbol
Parameter
2
Test Conditions
Max. Units
VSD
Forward On Voltage
IS=1.2A, VGS=0V
-
-
1.2
V
trr
Reverse Recovery Time
IS=5A, VGS=0V,
-
16.8
-
ns
Qrr
Reverse Recovery Charge
dI/dt=100A/µs
-
11
-
nC
Notes:
1.Pulse width limited by Max. junction temperature.
2.Pulse width <300us , duty cycle <2%.
3.Surface mounted on 1 in2 copper pad of FR4 board ; 270°C/W when mounted on min. copper pad.
Rev.2.02 3/16/2004
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2 of 4
SSM2306N
50
80
5.0V
T A =25 o C
40
5.0V
V G =2.5V
40
20
ID , Drain Current (A)
60
ID , Drain Current (A)
T A =150 o C
4.5V
4.0V
4.5V
30
4.0V
20
V G =2.5V
10
0
0
0
1
2
3
4
5
6
7
0
1
V DS , Drain-to-Source Voltage (V)
Fig 1. Typical Output Characteristics
3
4
5
6
7
8
Fig 2. Typical Output Characteristics
1.8
100
I D =5.3A
I D =5.3A
1.6
T A =25 o C
V G =4.5V
Normalized RDS(ON)
80
RDS(ON) (mΩ )
2
V DS , Drain-to-Source Voltage (V)
60
1.4
1.2
1.0
40
0.8
0.6
20
1
3
5
7
9
-50
11
0
50
100
150
T j , Junction Temperature ( o C)
V GS , Gate-to-Source Voltage (V)
Fig 3. On-Resistance vs. Gate Voltage
Fig 4. Normalized On-Resistance
vs. Junction Temperature
100
1.6
1.4
10
1.2
T j =25 o C
VGS(th)(V)
IS (A)
T j =150 o C
1
1
0.8
0.6
0.1
0.4
0.01
0.2
0
0.4
0.8
1.2
V SD , Source-to-Drain Voltage (V)
Fig 5. Forward Characteristic of
Reverse Diode
Rev.2.02 3/16/2004
1.6
-50
0
50
T j , Junction Temperature (
100
o
150
C)
Fig 6. Gate Threshold Voltage vs.
Junction Temperature
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3 of 4
SSM2306N
I D =5.3A
12
Ciss
V DS =16V
10
C (pF)
VGS , Gate to Source Voltage (V)
f=1.0MHz
1000
14
8
Coss
Crss
100
6
4
2
10
0
1
0
5
10
15
20
5
25
9
13
17
21
25
29
V DS , Drain-to-Source Voltage (V)
Q G , Total Gate Charge (nC)
Fig 7. Gate Charge Characteristics
Fig 8. Typical Capacitance Characteristics
100
Normalized Thermal Response (Rthja)
1
10
ID (A)
1ms
1
10ms
100ms
0.1
T A =25 o C
Single Pulse
1s
DC
1
10
0.2
0.1
0.1
0.05
PDM
0.01
t
T
Single Pulse
0.01
Duty factor = t/T
Peak Tj = PDM x Rthja + Ta
Rthja = 270 ℃/W
0.001
0.01
0.1
DUTY=0.5
100
0.0001
0.001
0.01
0.1
1
10
100
1000
V DS , Drain-to-Source Voltage (V)
t , Pulse Width (s)
Fig 9. Maximum Safe Operating Area
Fig 10. Effective Transient Thermal Impedance
RD
VDS
TO THE
OSCILLOSCOPE
D
D
VDS
TO THE
OSCILLOSCOPE
0.5 x RATED VDS
RG
G
0.75x RATED
V
G
S
+
10 V
VGS
+
S
1~ 3 mA
VGS
-
-
I
G
Fig 11. Switching Time Circuit
I
D
Fig 12. Gate Charge Circuit
Information furnished by Silicon Standard Corporation is believed to be accurate and reliable. However, Silicon Standard Corporation makes no
guarantee or warranty, express or implied, as to the reliability, accuracy, timeliness or completeness of such information and assumes no
responsibility for its use, or for infringement of any patent or other intellectual property rights of third parties that may result from its
use. Silicon Standard reserves the right to make changes as it deems necessary to any products described herein for any reason, including
without limitation enhancement in reliability, functionality or design. No license is granted, whether expressly or by implication, in relation to
the use of any products described herein or to the use of any information provided herein, under any patent or other intellectual property rights of
Silicon Standard Corporation or any third parties.
Rev.2.02 3/16/2004
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