SSM7002DGU Dual N-channel Enhancement-mode Power MOSFETs PRODUCT SUMMARY BVDSS R DS(ON) 50V 3Ω ID 250mA DESCRIPTION The SSM7002DG acheives fast switching performance with low gate charge without a complex drive circuit. It is suitable for low voltage applications such as DC/DC converters and general load-switching circuits. The SSM7002DGU is supplied in a RoHS-compliant SOT-363 package, which is widely used where board space is critical and a small footprint is required. Pb-free; RoHS-compliant SOT-363 D2 G1 S1 D1 SOT-363 S2 G2 ABSOLUTE MAXIMUM RATINGS Symbol Parameter VDS Drain-source voltage VGS Gate-source voltage 3 , ID Continuous drain current ISD Source-drain diode current IDM PD Pulsed drain current T A = 25°C 1,2 3 Total power dissipation , TA = 25°C TA = 75°C Value Units 50 V ± 20 V 250 mA 115 mA 1.0 A 200 mW 120 mW TSTG Storage temperature range -55 to 150 °C TJ Operating junction temperature range -55 to 150 °C THERMAL CHARACTERISTICS Symbol RΘJA Parameter Maximum thermal resistance, junction-ambient 3 Value Units 625 °C/W Notes: 1.Pulse width must be limited to avoid exceeding the maximum junction temperature of 150°C. 2.Pulse width <300us, duty cycle <2%. 3.Mounted on FR4 board 11/26/2005 Rev.3.01 www.SiliconStandard.com 1 of 5 SSM7002DGU ELECTRICAL CHARACTERISTICS Symbol Parameter (at Tj = 25°C, unless otherwise specified) Test Conditions Min. Typ. Max. Units BVDSS Drain-source breakdown voltage VGS=0V, ID=10uA 50 - - V ID(ON) On-state drain current VDS= 7V, VGS=10V 500 - - mA RDS(ON) Static drain-source on-resistance VGS=10V, ID =250mA - - 3 Ω VGS=5V, ID =50mA - - 4 Ω VDS=VGS, ID=250uA 1 - 2.5 V VGS(th) Gate threshold voltage gfs Forward transconductance VDS=7V, ID=200mA 80 - - mS IDSS Drain-source leakage current VDS=50V, VGS=0V - - 1.0 uA IGSS Gate-source leakage current VGS=±20V - - ±100 nA td(on) Turn-on delay time 2 VDS=30V - 7.5 20 ns tr Rise time ID=100mA - 6 - ns td(off) Turn-off delay time RG=10Ω , VGEN=10V - 7.5 20 ns tf Fall time - 3 - ns Ciss Input capacitance VGS=0V - 19 50 pF Coss Output capacitance VDS=25V - 10 25 pF Crss Reverse transfer capacitance f=1.0MHz - 3 5 pF Min. Typ. - 0.76 Source-Drain Diode Symbol VSD Parameter Forward voltage 2 Test Conditions IS=115mA, VGS=0V Max. Units 1.5 V Notes: 1.Pulse width must be limited to avoid exceeding the maximum junction temperature of 150°C. 2.Pulse width <300us, duty cycle <2%. 11/26/2005 Rev.3.01 www.SiliconStandard.com 2 of 5 Drain Current (A) Drain Current (A) SSM7002DGU Drain to source voltage (V) Gate to source voltage (V) Fig 2. Typical transfer characteristics Capacitance (pF) Drain to source resistance (Ω )) Fig 1. Typical output characteristics Drain current (A) Drain to source voltage (V) Fig 4. Normalized on-resistance vs. junction temperature Source-drain Current (A) Gate– source threshold voltage (V) Fig 3. Typical Capacitance Body diode forward voltage (V) Fig 5. Forward characteristics of the reverse diode 11/26/2005 Rev.3.01 Junction temperature (°C) Fig 6. Gate threshold voltage vs. junction temperature www.SiliconStandard.com 3 of 5 Gate –source voltage (V) Transconductance (S) SSM7002DGU Drain to source current (A) Total gate charge (nC) Fig 8. Typical transconductance Drain Current (A) Fig 7. Gate charge characteristics Drain-source voltage (V) Transient thermal impedance r(t) Fig 9. Maximum safe operating area Square wave pulse duration (S) Fig 10. Normalized Transient Thermal Impedance 11/26/2005 Rev.3.01 www.SiliconStandard.com 4 of 5 PHYSICAL DIMENSIONS SSM7002DGU PHYSICAL DIMENSIONS SOT-363 DIM A A1 bp C D E e e1 He Lp Q W Θ SOT-363 DIMENSION MILLIMETERS INCHES MIN MAX MIN MAX 0.80 1.10 0.031 0.043 -0.10 -0.004 0.10 0.30 0.004 0.012 0.10 0.25 0.004 0.010 1.80 2.20 0.071 0.087 1.15 1.35 0.045 0.053 1.30 (typ) 0.052 (typ) 0.65 (typ) 0.026(typ) 2.00 2.20 0.079 0.087 0.10 0.3 0.004 0.012 0.20 (typ) 0.008 (typ) 0.20 (typ) 0.008 (typ) 10o (typ) 10o (typ) PACKING: Moisture sensitivity level MSL3 3000 pcs in antistatic tape on a reel packed in a moisture barrier bag (MBB). Information furnished by Silicon Standard Corporation is believed to be accurate and reliable. However, Silicon Standard Corporation makes no guarantee or warranty, express or implied, as to the reliability, accuracy, timeliness or completeness of such information and assumes no responsibility for its use, or for infringement of any patent or other intellectual property rights of third parties that may result from its use. Silicon Standard reserves the right to make changes as it deems necessary to any products described herein for any reason, including without limitation enhancement in reliability, functionality or design. No license is granted, whether expressly or by implication, in relation to the use of any products described herein or to the use of any information provided herein, under any patent or other intellectual property rights of Silicon Standard Corporation or any third parties. 11/26/2005 Rev.3.01 www.SiliconStandard.com 5 of 5