SSM9962M/GM
DUAL N-CHANNEL ENHANCEMENT-MODE POWER MOSFETS
Simple drive requirement
D2
D2
Lower gate charge
D1
D1
Fast switching characteristics
S1
40V
R DS(ON)
25mΩ
7A
ID
G2
S2
SO-8
BV DSS
G1
Description
D2
D1
Advanced Power MOSFETs from Silicon Standard provide the
designer with the best combination of fast switching,
ruggedized device design, low on-resistance and cost-effectiveness.
G2
G1
S1
The SSM9962M is in the SO-8 package, which is widely preferred for
commercial and industrial surface mount applications, and is well suited
for low voltage applications such as DC/DC converters.
S2
This device is available with Pb-free lead finish (second-level interconnect) as SSM9962GM.
Absolute Maximum Ratings
Symbol
Parameter
VDS
Drain-Source Voltage
VGS
Gate-Source Voltage
ID @ TA=25°C
ID @ TA=100°C
Rating
Units
40
V
± 20
V
3
7
A
3
5.5
A
Continuous Drain Current
Continuous Drain Current
1
IDM
Pulsed Drain Current
20
A
PD @ TA=25°C
Total Power Dissipation
2
W
Linear Derating Factor
0.016
W/°C
TSTG
Storage Temperature Range
-55 to 150
°C
TJ
Operating Junction Temperature Range
-55 to 150
°C
Thermal Data
Symbol
Rthj-a
8/21/2004 Rev.2.01
Parameter
Thermal Resistance Junction-ambient
3
Max.
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Value
Unit
62.5
°C/W
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SSM9962M/GM
Electrical Characteristics @ T j=25oC (unless otherwise specified)
Symbol
Parameter
Test Conditions
Min.
Typ.
40
-
-
V
-
0.1
-
V/°C
VGS=10V, ID=7A
-
-
25
mΩ
VGS=4.5V, ID=5A
-
-
40
mΩ
VDS=VGS, ID=250uA
1
-
3
V
VDS=10V, ID=7A
-
11
-
S
Drain-Source Leakage Current (Tj=25 C)
VDS=40V, VGS=0V
-
-
1
uA
Drain-Source Leakage Current (Tj=70oC)
VDS=32V ,VGS=0V
-
-
25
uA
Gate-Source Leakage
VGS= ± 20V
-
-
±100
nA
ID=7A
-
25.8
-
nC
BVDSS
Drain-Source Breakdown Voltage
∆BV DSS/∆Tj
Breakdown Voltage Temperature Coefficient Reference to 25°C, ID=1mA
RDS(ON)
Static Drain-Source On-Resistance
VGS(th)
Gate Threshold Voltage
gfs
Forward Transconductance
o
IDSS
IGSS
2
VGS=0V, ID=250uA
2
Max. Units
Qg
Total Gate Charge
Qgs
Gate-Source Charge
VDS=32V
-
4.4
-
nC
Qgd
Gate-Drain ("Miller") Charge
VGS=4.5V
-
9.1
-
nC
VDS=20V
-
10.6
-
ns
2
td(on)
Turn-on Delay Time
tr
Rise Time
ID=1A
-
6.8
-
ns
td(off)
Turn-off Delay Time
RG=5.7Ω ,VGS=10V
-
26.3
-
ns
tf
Fall Time
RD=20Ω
-
12
-
ns
Ciss
Input Capacitance
VGS=0V
-
1165
-
pF
Coss
Output Capacitance
VDS=25V
-
205
-
pF
Crss
Reverse Transfer Capacitance
f=1.0MHz
-
142
-
pF
Min.
Typ.
Source-Drain Diode
Symbol
Parameter
2
Test Conditions
Max. Units
VSD
Forward On Voltage
IS=1.7A, VGS=0V
-
-
1.2
V
trr
Reverse Recovery Time
Is=1.7A, VGS=0V,
-
21.2
-
ns
Qrr
Reverse Recovery Charge
dI/dt=100A/µs
-
16
-
nC
Notes:
1.Pulse width limited by max. junction temperature.
2.Pulse width <300us , duty cycle <2%.
3.Surface mounted on 1 in2 copper pad of FR4 board ; 135°C/W when mounted on min. copper pad.
8/21/2004 Rev.2.01
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SSM9962M/GM
25
25
o
10V
8.0V
o
T C =25 C
10V
T C =150 C
8.0V
20
20
5.0V
ID , Drain Current (A)
ID , Drain Current (A)
5.0V
4.0V
15
10
4.0V
15
10
V G =3.0V
5
5
V G =3.0V
0
0
0
1
2
3
4
5
0
6
1
2
3
4
5
V DS , Drain-to-Source Voltage (V)
V DS , Drain-to-Source Voltage (V)
Fig 1. Typical Output Characteristics
Fig 2. Typical Output Characteristics
1.8
35
ID=7A
T C =25 o C
I D =7A
VG=10V
1.6
Normalized RDS(ON)
RDS(ON) (mΩ )
30
25
1.4
1.2
1.0
20
0.8
0.6
15
3
4
5
6
7
8
9
10
-50
11
0
50
100
150
o
T j , Junction Temperature ( C)
V GS (V)
Fig 3. On-Resistance vs. Gate Voltage
Fig 4. Normalized On-Resistance
vs. Junction Temperature
3
100
2.8
2.6
10
2.4
T j =25 o C
2.2
VGS (th)
IS(A)
o
T j =150 C
1
2
1.8
1.6
0.1
1.4
1.2
1
0.01
0
0.4
0.8
1.2
1.6
-50
V SD (V)
0
50
100
150
o
Junction Temperature ( C )
Fig 5. Forward Characteristic of
Reverse Diode
8/21/2004 Rev.2.01
Fig 6. Gate Threshold Voltage vs.
Junction Temperature
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SSM9962M/GM
f=1.0MHz
10000
14
I D =7A
V DS =20V
10
Ciss
V DS =25V
1000
V DS =32V
8
C (pF)
VGS , Gate to Source Voltage (V)
12
6
Coss
Crss
100
4
2
0
10
0
5
10
15
20
25
30
35
1
5
9
Q G , Total Gate Charge (nC)
13
17
21
25
29
VDS (V)
Fig 7. Gate Charge Characteristics
Fig 8. Typical Capacitance Characteristics
1
100
10
ID (A)
1ms
10ms
1
100ms
T c =25 o C
Single Pulse
0.1
1s
DC
Normalized Thermal Response (R thja)
DUTY=0.5
0.2
0.1
0.1
0.05
PDM
0.01
T
Single Pulse
Duty factor = t/T
Peak Tj = PDM x Rthja + Ta
0.01
Rthja = 135°C/W
0.001
0.01
0.1
1
10
100
0.0001
0.001
0.01
0.1
1
10
100
1000
t , Pulse Width (s)
V DS (V)
Fig 9. Maximum Safe Operating Area
8/21/2004 Rev.2.01
t
0.02
Fig 10. Effective Transient Thermal Impedance
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SSM9962M/GM
VDS
90%
RD
VDS
D
TO THE
OSCILLOSCOPE
0.5 x RATED V DS
G
RG
+
10%
VGS
S
10 v
VGS
-
td(on)
Fig 11. Switching Time Circuit
td(off) tf
tr
Fig 12. Switching Time Waveform
VG
VDS
4.5V
0.5 x RATED V DS
G
S
QG
TO THE
OSCILLOSCOPE
D
QGS
QGD
VGS
+
1~ 3 mA
IG
I
D
Charge
Fig 13. Gate Charge Circuit
Q
Fig 14. Gate Charge Waveform
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responsibility for its use, or for infringement of any patent or other intellectual property rights of third parties that may result from its
use. Silicon Standard reserves the right to make changes as it deems necessary to any products described herein for any reason, including
without limitation enhancement in reliability, functionality or design. No license is granted, whether expressly or by implication, in relation to
the use of any products described herein or to the use of any information provided herein, under any patent or other intellectual property rights of
Silicon Standard Corporation or any third parties.
8/21/2004 Rev.2.01
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