DYNEX DCR2950W55

DCR2950W65
Phase Control Thyristor
Preliminary Information
DS5871-3 July 2011 (LN28551)
FEATURES
KEY PARAMETERS

Double Side Cooling

High Surge Capability
VDRM
IT(AV)
ITSM
dV/dt*
dI/dt
APPLICATIONS
6500V
2945A
38500A
1500V/µs
300A/µs
* Higher dV/dt selections available

High Power Drives

High Voltage Power Supplies

Static Switches
VOLTAGE RATINGS
Part and
Ordering
Number
Repetitive Peak
Voltages
VDRM and VRRM
V
DCR2950W65*
DCR2950W60
DCR2950W55
DCR2950W50
6500
6000
5500
5000
Conditions
Tvj = -40° C to 125° C,
IDRM = IRRM = 300mA,
VDRM, VRRM tp = 10ms,
VDSM & VRSM =
VDRM & VRRM + 100V
respectively
Lower voltage grades available.
0
0
* 6200V @ -40 C, 6500V @ 0 C
ORDERING INFORMATION
Outline type code: W
(See Package Details for further information)
Fig. 1 Package outline
When ordering, select the required part number
shown in the Voltage Ratings selection table.
For example:
DCR2950W65
Note: Please use the complete part number when ordering
and quote this number in any future correspondence
relating to your order.
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DCR2950W65
SEMICONDUCTOR
CURRENT RATINGS
Tcase = 60° C unless stated otherwise
Symbol
Parameter
Test Conditions
Max.
Units
2945
A
Double Side Cooled
IT(AV)
Mean on-state current
IT(RMS)
RMS value
-
4629
A
Continuous (direct) on-state current
-
4430
A
IT
Half wave resistive load
SURGE RATINGS
Symbol
ITSM
2
It
Parameter
Surge (non-repetitive) on-state current
Test Conditions
Max.
Units
10ms half sine, Tcase = 125° C
38.85
kA
VR = 0
7.55
MA s
Min.
Max.
Units
2
I t for fusing
2
THERMAL AND MECHANICAL RATINGS
Symbol
Rth(j-c)
Rth(c-h)
Parameter
Thermal resistance – junction to case
Thermal resistance – case to heatsink
Test Conditions
Double side cooled
DC
-
0.00631
° C/W
Single side cooled
Anode DC
-
0.01115
° C/W
Cathode DC
-
0.01453
° C/W
Double side
-
0.0014
° C/W
-
0.0028
° C/W
-
125
°C
Clamping force 76.0kN
(with mounting compound)
Blocking VDRM / VRRM
Single side
Tvj
Virtual junction temperature
Tstg
Storage temperature range
-55
125
°C
Fm
Clamping force
68.0
84.0
kN
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DCR2950W65
SEMICONDUCTOR
DYNAMIC CHARACTERISTICS
Symbol
IRRM/IDRM
Parameter
Test Conditions
Min.
Max.
Units
Peak reverse and off-state current
At VRRM/VDRM, Tcase = 125° C
-
300
mA
dV/dt
Max. linear rate of rise of off-state voltage
To 67% VDRM, Tj = 125° C, gate open
-
1500
V/µs
dI/dt
Rate of rise of on-state current
From 67% VDRM to 2x IT(AV)
Repetitive 50Hz
-
150
A/µs
Gate source 30V, 10,
Non-repetitive
-
300
A/µs
tr < 0.5µs, Tj = 125° C
VT(TO)
rT
tgd
Threshold voltage – Low level
500 to 2400A at Tcase = 125° C
-
0.94
V
Threshold voltage – High level
2400 to 7200A at Tcase = 125° C
-
1.13
V
On-state slope resistance – Low level
500A to 2400A at Tcase = 125° C
-
0.343
m
On-state slope resistance – High level
2400A to 7200A at Tcase = 125° C
-
0.264
m
VD = 67% VDRM, gate source 30V, 10
-
3
µs
-
1200
µs
2800
6400
µC
Delay time
tr = 0.5µs, Tj = 25° C
tq
Turn-off time
Tj = 125° C, VR = 200V, dI/dt = 1A/µs,
dVDR/dt = 20V/µs linear
QS
Stored charge
IT = 2000A, Tj = 125° C, dI/dt – 1A/µs,
IL
Latching current
Tj = 25° C, VD = 5V
-
3
A
IH
Holding current
Tj = 25° C, RG-K = , ITM = 500A, IT = 5A
-
300
mA
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DCR2950W65
SEMICONDUCTOR
GATE TRIGGER CHARACTERISTICS AND RATINGS
Symbol
Parameter
Test Conditions
Max.
Units
VGT
Gate trigger voltage
VDRM = 5V, Tcase = 25° C
1.5
V
VGD
Gate non-trigger voltage
At 50% VDRM, Tcase = 125°C
0.4
V
IGT
Gate trigger current
VDRM = 5V, Tcase = 25° C
250
mA
IGD
Gate non-trigger current
At 50% VDRM, Tcase = 125°C
15
mA
CURVES
Instantaneous on-state current IT - (A)
7000
6000
5000
4000
min 125°C
max 125°C
3000
min 25°C
max 25°C
2000
1000
0
0.5
1.5
2.5
3.5
Instantaneous on-state voltage VT - (V)
Fig.2 Maximum & minimum on-state characteristics
VTM EQUATION
VTM = A + Bln (IT) + C.IT+D.IT
Where
A = 0.914146
B = -0.03808
C = 0.00016
D = 0.015311
these values are valid for Tj = 125° C for IT 500A to 7200A
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DCR2950W65
SEMICONDUCTOR
130
20
Maximum case temperature, T case ( oC )
Mean power dissipation - (kW)
180
120
90
60
30
120
18
16
14
12
10
8
180
120
90
60
30
6
4
110
100
90
80
70
60
50
40
30
20
2
10
0
0
0
1000
2000
3000
4000
0
5000
1000
2000
3000
4000
Mean on-state current, IT(AV) - (A)
5000
Mean on-state current, IT(AV) - (A)
Fig.3 On-state power dissipation – sine wave
180
120
90
60
30
120
110
100
90
80
70
60
50
40
30
20
20
18
Mean power dissipation - (kW)
Maximum heatsink temperature, T Heatsink - ( oC )
130
Fig.4 Maximum permissible case temperature,
double side cooled – sine wave
16
14
12
10
8
d.c.
180
120
90
60
30
6
4
10
2
0
0
1000
2000
3000
4000
Mean on-state current, IT(AV) - (A)
0
0
1000
2000
3000
4000
5000
6000
7000
Mean on-state current, IT(AV) - (A)
Fig.5 Maximum permissible heatsink temperature,
double side cooled – sine wave
Fig.6 On-state power dissipation – rectangular wave
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DCR2950W65
SEMICONDUCTOR
130
d.c.
180
120
90
60
30
120
110
100
90
d.c.
180
120
90
60
30
120
Maximum heatsik temperature Theatsink - (oC)
Maximum permissible case temperature , Tcase - (°C)
130
80
70
60
50
40
30
20
10
110
100
90
80
70
60
50
40
30
20
10
0
0
0
1000 2000 3000 4000 5000 6000 7000
0
Mean on-state current, IT(AV) - (A)
Fig.7 Maximum permissible case temperature,
double side cooled – rectangular wave
16
Double side cooled
Anode Side Cooling
4000
5000
6000
Cathode side cooled
2
1.2993
3
2.8048
4
1.3305
0.0106818
0.058404
0.3584979
1.1285
1.5197
3.2398
5.7622
0.6312
0.0170581
0.2424644
6.013
15.364
1.4106
2.4667
6.7451
3.9054
0.0158344
0.1786951
3.6201
6.196
Ri (°C/kW)
Ti (s)
12
1
0.8816
Ri (°C/kW)
Ti (s)
Cathode Sided Cooling
3000
Ri (°C/kW)
Ti (s)
Anode side cooled
Thermal Impedance, Zth(j-c) - ( °C/kW)
2000
Mean on-state current, IT(AV) - (A)
Fig.8 Maximum permissible heatsink temperature,
double side cooled – rectangular wave
Double Side Cooling
14
1000
Zth =  [Ri x ( 1-exp. (t/ti))]
[1]
10
8
Rth(j-c) Conduction
6
Tables show the increments of thermal resistance R th(j-c) when the device
operates at conduction angles other than d.c.
4
Double side cooling
Zth (z)
2
0
0.001
0.01
0.1
1
10
100
°
180
120
90
60
30
15
sine.
1.00
1.16
1.33
1.48
1.61
1.66
rect.
0.67
0.97
1.13
1.31
1.51
1.61
Anode Side Cooling
Zth (z)
°
180
120
90
60
30
15
sine.
0.94
1.08
1.23
1.37
1.47
1.52
rect.
0.64
0.91
1.06
1.22
1.38
1.47
Cathode Sided Cooling
Zth (z)
°
180
120
90
60
30
15
sine.
0.95
1.09
1.25
1.38
1.49
1.54
rect.
0.65
0.92
1.07
1.23
1.40
1.49
Time ( s )
Fig.9 Maximum (limit) transient thermal impedance – junction to case (° C/kW)
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DCR2950W65
SEMICONDUCTOR
Fig.10 Multi-cycle surge current
Fig.11 Single-cycle surge current
40,000
800
35,000
700
I - (A)
Reverse recovery current,RR
QS max = 7066.1*(di/dt)0.4891
Stored Charge, QS - (uC)
30,000
25,000
20,000
QS min = 3539.7*(di/dt)0.5991
15,000
10,000
Conditions:
Tj = 125oC
VRpeak ~ 3900V, VRM ~ 2600V
snubber as apprpriate to control
reverse volts
5,000
5
10
15
20
25
30
Rate of decay of on-state current, di/dt - (A/us)
Fig.10 Reverse recovery charge
600
500
400
IRR min = 41.906*(di/dt)0.8147
300
200
Conditions:
Tj = 125oC
VRpeak ~ 3900V, VRM ~ 2600V
snubber as apprpriate to control
reverse volts
100
0
0
IRR max = 59.812*(di/dt)0.7589
0
0
5
10
15
20
25
30
Rate of decay of on-state current, di/dt - (A/us)
Fig.11 Reverse recovery current
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DCR2950W65
SEMICONDUCTOR
10
Gate trigger voltage, VGT - (V)
9
Pulse
Width us
100
200
500
1000
10000
8
7
Pulse Power PGM (Watts)
Frequency Hz
50
100
150
150
150
150
150
150
150
100
20
-
400
150
125
100
25
-
Upper Limit
6
5
Preferred gate drive area
4
3
2
Tj = -40oC
Tj = 25oC
Lower Limit
Tj = 125oC
1
0
0
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
1
Gate trigger current IGT, - (A)
Fig12 Gate Characteristics
30
Lower Limit
Upper Limit
5W
10W
20W
50W
100W
150W
-40C
Gate trigger voltage, VGT - (V)
25
20
15
10
5
0
0
1
2
3
4
5
6
7
8
9
10
Gate trigger current, IGT - (A)
Fig. 13 Gate characteristics
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DCR2950W65
SEMICONDUCTOR
PACKAGE DETAILS
For further package information, please contact Customer Services. All dimensions in mm, unless stated otherwise.
DO NOT SCALE.
Device
DCR1594SW28
DCR1595SW42
DCR1596SW52
DCR5450W22
DCR4910W28
DCR4100W42
DCR3640W52
DCR2950W65
DCR2450W85
Maximum Minimum
Thickness Thickness
(mm)
(mm)
27.34
26.79
27.57
27.02
27.69
27.14
27.265
26.715
27.34
26.79
27.57
27.02
27.69
27.14
27.95
27.4
28.31
27.76
Clamping force: 76kN ±10%
Lead length: 420mm
Lead terminal connector: M4 ring
Package outline type code: W
Fig.14 Package outline
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DCR2950W65
SEMICONDUCTOR
Stresses above those listed in this data sheet may cause permanent damage to the device. In extreme conditions, as with all
semiconductors, this may include potentially hazardous rupture of the package. Appropriate safety precautions should always be
followed.
HEADQUARTERS OPERATIONS
CUSTOMER SERVICE
DYNEX SEMICONDUCTOR LIMITED
Doddington Road, Lincoln, Lincolnshire, LN6 3LF
United Kingdom.
Phone: +44 (0) 1522 500500
Fax: +44 (0) 1522 500550
Web: http://www.dynexsemi.com
Phone: +(0) 1522 502753 / 502901
Fax: +(0) 1522 500020
e-mail: [email protected]dynexsemi.com
 Dynex Semiconductor 2003 TECHNICAL DOCUMENTATION – NOT FOR RESALE. PRODUCED IN UNITED KINGDOM.
This publication is issued to provide information only which (unless agreed by the Company in writing) may not be used, appli ed or reproduced for any purpose nor form part of any order or
contract nor to be regarded as a representation relating to the products or services concerned. No warranty or guarantee exp ress or implied is made regarding the capability, performance or
suitability of any product or service. The Company reserves the right to alter without prior notice the specification, design or price of any product or service. Information concerning possible
methods of use is provided as a guide only and does not constitute any guarantee that such methods of use will be satisfactory in a specific piece of equipment. It is the user’s responsibility to
fully determine the performance and suitability of any equipment using such information and to ensure that any publication or data used is up to date and has not been superseded. These
products are not suitable for use in any medical products whose failure to perform may result in significant injury or death to the user. All products and materials are sold and services provided
subject to the Company’s conditions of sale, which are available on request.
All brand names and product names used in this publication are trademarks, registered trademarks or trade names of their respective owners.
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