P93U422 P93U422 HIGH SPEED 256 x 4 STATIC CMOS RAM FEATURES CMOS for Low Power – 440 mW (Commercial) – 495 mW (Military) Universal 256 x 4 Static RAM One part, the 93U422, replaces the following bipolar and CMOS parts: – 93422A – 93422 – 93L422A – 93L422 5V Power Supply ±10% for both commercial and military temperature ranges Separate I/O Fully static operation with equal access and cycle times Fast Access Time – 35 ns (Commercial) – 35 ns (Military) Resistant to single event upset and latchup due to advanced process and design improvements Standard 400 mil DIP and Chip carrier packages DESCRIPTION The P93U422 is a 1,024-bit high-speed Static RAM with a 256 x 4 organization. The P93U422 is a universal device designed to replace the entire 93 and 93L 256 x 4 static RAM families. The memory requires no clocks or refreshing and has equal access and cycle times. Inputs and outputs are fully TTL compatible. Operation is from a single 5 Volt supply. Easy memory expansion is provided by an active LOW chip select one (CS 1) and active HIGH chip select two (CS 2) as well as 3-state outputs. In addition to high performance, the device features latch-up protection, single event and upset protection. The P93U422 is offered in several packages: 22-pin 400 mil DIP (plastic and ceramic), 24-pin 300 mil SOIC, 24pin LCC and 24-pin CERPACK. Devices are offered in both commercial and military temperature ranges. FUNCTIONAL BLOCK DIAGRAM PIN CONFIGURATIONS CS 2 CS 1 A5 A6 A7 DATA INPUT CONTROL 32 X 32 ARRAY COLUMN DECODER SENSE AMPS A0 A1 A2 A3 A4 1 24 2 3 23 22 4 21 20 19 O1 O2 A0 A5 A6 A7 GND D0 O0 D1 O3 NC WE OE ROW DECODER D0 D1 D2 D3 A3 A2 A1 O0 5 6 7 8 18 17 9 10 16 15 11 12 14 13 SOIC (S4) TOP VIEW V CC A4 WE CS 1 OE CS 2 O3 D3 O2 D2 O1 A3 A2 A1 A0 A5 A6 A7 GND D0 O0 D1 1 2 3 22 21 20 4 5 6 19 18 17 7 8 16 9 10 11 15 14 13 12 NC DIP (P3-1, D3-1) TOP VIEW V CC A4 WE CS 1 OE CS 2 O3 D3 O2 D2 O1 INDEX A1 A2 A3 VCC A4 WE A0 4 3 2 1 24 22 21 A5 5 20 OE NC 6 19 CS2 A6 7 18 NC A7 8 17 O3 GND 9 16 15 D3 10 11 12 13 D0 O0 D1 O1 23 14 CS1 D 2 O2 LCC (L4) TOP VIEW Means Quality, Service and Speed 1Q97 7 P93U422 MAXIMUM RATINGS(1) Symbol Parameter Value Unit VCC Power Supply Pin with Respect to GND – 0.5 to +7 V VTERM Terminal Voltage with Respect to GND (up to 7.0V) – 0.5 to VCC +0.5 V TA Operating Temperature – 55 to +125 °C Symbol Parameter Value Unit TBIAS Temperature Under Bias – 55 to +125 °C TSTG Storage Temperature – 65 to +150 °C I OUT DC Output Current 20 mA CAPACITANCES(4) RECOMMENDED OPERATING CONDITIONS (VCC = 5.0V, TA = 25°C, f = 1.0MHz) Grade(2) Commercial Military Ambient Temp Gnd Vcc Symbol Parameter Conditions Typ. Unit 0˚C to 70˚C 0V 5.0V ±10% CIN Input Capacitance VIN = 0V 5 pF –55˚C to 125˚C 0V 5.0V ±10% COUT Output Capacitance VOUT = 0V 7 pF DC ELECTRICAL CHARACTERISTICS Over recommended operating temperature and supply voltage(2) Symbol Parameter Min. VOH Output High Voltage VCC = Min., VIN = VIH or VIL, IOH = –5.2 mA VOL Output Low Voltage VCC = Min., VIN = VIH or VIL, IOL = 8.0 mA VIH Input High Level VIL Input Low Level IIL Input Low Current VIN = 0.40 V IIH Input High Current ISC Output Short Circuit Current (3) ICC Power Supply Current VCL Input Clamp Voltage ICEX Output Leakage Current P93U422 Test Conditions Max. Unit V 2.4 0.45 2.1 V V 0.8 V –300 µA VCC = Max, VIN = 4.5V 40 µA VCC = Max., VOUT = 0.0V –70 mA All Inputs = GND VCC = Max. TA = 125˚C TA = 75˚C 70 TA = 0˚C 80 TA = –55˚C 90 70 IIN = –10mA VOUT = 2.4V, VCC = Max. VOUT = 0.5V, VCC = Max. Notes: 1. Stresses greater than those listed under MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to MAXIMUM rating conditions for extended periods may affect reliability –1.5 50 –50 mA V µA 2. Extended temperature operation guaranteed with 400 linear feet per minute of air flow. 3. For test purposes, not more than one output at a time should be shorted. Short circuit test duration should not exceed 30 seconds. 4. This parameter is sampled and not 100% tested. 8 P93U422 FUNCTIONAL DESCRIPTION An active LOW write enable (WE) controls the writing/ reading operation of the memory. When chip select one (CS 1) and write enable (WE) are LOW and chip select two (CS 2) is HIGH, the information on data inputs (D0 through D3) is written into the addressed memory word and preconditions the output circuitry so that true data is present at the outputs when the write cycle is complete. This preconditioning operation insures minimum write recovery times by eliminating the “write recovery glitch.” Reading is performed with chip selct one (CS 1) LOW, chip select two (CS 2) HIGH, write enable (WE) HIGH and output enable (OE) LOW. The information stored in the addressed word is read out on the noninverting outputs (O0 through O3). The outputs of the memory go to an inactive high impedance state whenever chip select one (CS 1) is HIGH, or during the write operation when write enable (WE) is LOW. TRUTH TABLE CS2 CS1 Mode WE OE Output Standby L X X X High Z Standby X H X X High Z DOUT Disabled H L X H High Z Read H L H L DOUT Write H L L X High Z Notes: H = HIGH L = Low X = Don't Care HIGH Z = Implies outputs are disabled or off. This condition is defined as high impedance state for the P93U422. SWITCHING CHARACTERISTICS (5,6) Over Operating Range (Commercial and Military) Parameters Description P93U422 Unit Min. Max. tPLH(A)(7) tPLH(A)(7) Delay from Address to Output (Address Access Time) (See Fig. 2) 35 ns tPZH (CS1, CS2)(8) tPZL (CS1, CS2)(8) Delay from Chip Select to Active Output and Correct Data (See Fig. 2) 25 ns tPZH (WE)(8) tPZL (WE)(8) Delay from Write Enable to Active Output and Correct Data (Write Recovery) (See Fig. 1) 25 ns tPZH (OE)(8) tPZL (OE)(8) Delay from Output Enable to Active Output and Correct Data (See Fig. 2) 25 ns tS(A) th(A) tS(DI) th(DI) Setup Time Address (Prior to Initiation of Write) (See Fig. 1) Hold Time Address (After Termination of Write) (See Fig. 1) 5 5 ns 5 ns ns tS (CS1, CS2) Setup Time Data Input (Prior to Initiation of Write) (See Fig. 1) Hold Time Data Input (After Termination of Write) (See Fig. 1) Setup Time Chip Select (Prior to Initiation of Write) (See Fig. 1) th (CS1, CS2) Hold Time Chip Select (After Termination of Write) (See Fig. 1) 5 ns Minimum Write Enable Pulse Width (to Insure Write) (See Fig. 1) 20 ns tpw(WE) ns 5 5 ns (8) tPHZ (CS1, CS2) tPLZ (CS1, CS2)(8) Delay from Chip Select to Inactive Output (HIGH Z) (See Fig. 2) 30 ns tPHZ (WE)(8) tPLZ (WE)(8) Delay from Write Enable to Inactive Output (HIGH Z) (See Fig. 1) 30 ns tPHZ (OE)(8) tPLZ (OE)(8) Delay from Output Enable to Inactive Output (HIGH Z) (See Fig. 2) 30 ns 9 P93U422 Notes: 5) Test conditions assume signal transition times of 10 ns or less. 6) Extended temperature operation guaranteed with 400 linear feet per minute of air flow. 7) tPLH(A) and tPHL(A) are tested with S1 closed and CL = 15 pF with both input and output timing referenced to 1.5V 8) tPZH(WE), tPZH(CS1, CS2) and tPZH(OE) are measured with S1 open, CL = 15 pF and with both the input and output timing referenced to 1.5V. tPZL(WE), tPZL(CS1, CS2) and tPZL(OE) are measured with S1 closed, CL = 15pF and with both the input and output timing referenced to 1.5V. tPHZ(WE), tPHZ(CS1, CS2) and tPHZ(OE) are measured with S1 open, CL < 5pF and are measured between the 1.5V level on the input to the VOH -500mV level on the output. tPLZ(WE), tPLZ(CS1, CS2) and tPLZ(OE) are measured with S1 closed, CL < 5pF and are measured between the 1.5V level on the input to the VOL +500mV level on the output. 10 P93U422 CHIP SELECT 11 P93U422 ORDERING INFORMATION P93U422 xx x x Device Type Speed Package Processing C 0°C to +70°C M –55°C to +125°C MB MIL-STD-883, Class B F D L P S CERPACK CERDIP (400 mil) Ceramic LCC (400 mil square) Plastic DIP (400 mil) Plastic SOIC (300 mil) 35 ns Commercial 35 ns Military 256 x 4 SRAM SELECTION GUIDE The P93U422 is available in the following temperature range, speed, and package options. Speed (ns) Temperature Range Package Commercial Temperature Plastic DIP Plastic SOIC -35PC -35SC Military Temperature CERDIP LCC -35DM -35LM Military Processed* CERDIP LCC -35DMB -35LMB 35 *Military temperature range with MIL-STD-883, Class B processing. 12