HITACHI 4AM11

4AM11
Silicon N-Channel/P-Channel Power MOS FET Array
Application
High speed power switching
Features
•
Low on-resistance
N-channel: RDS(on) ≤ 0.17 Ω, VGS = 10 V, ID = 2.5 A
P-channel: RDS(on) ≤ 0.2 Ω, VGS = –10 V, ID = –2.5 A
•
•
•
•
•
Capable of 4 V gate drive
Low drive current
High speed switching
High density mounting
Suitable for H-bridged motor driver
4AM11
Outline
Absolute Maximum Ratings (Ta = 25°C) (1 Unit)
Rating
Item
Symbol
Nch
Pch
Unit
Drain to source voltage
VDSS
60
–60
V
Gate to source voltage
VGSS
±20
±20
V
Drain current
ID
5
–5
A
Drain peak current
ID(pulse)*1
20
–20
A
Body to drain diode reverse drain current
IDR
5
–5
A
Channel dissipation
Pch (Tc = 25°C)*2 28
W
Channel dissipation
Pch*2
4
W
Channel temperature
Tch
150
°C
Storage temperature
Tstg
–55 to +150
°C
Notes: 1. PW ≤ 10 µs, duty cycle ≤ 1%
2. 4 Devices operation
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Electrical Characteristics (Ta = 25°C) (1 Unit)
N channel
Min
P channel
Item
Symbol
Typ
Max
Min
Typ
Max
Unit
Test conditions
Drain to source
breakdown voltage
V(BR)DS 60
S
—
—
–60
—
—
V
ID = 10 mA, VGS = 0
Gate to source
breakdown voltage
V(BR)GS ±20
S
—
—
±20
—
—
V
IG = ±100 µA, VDS =
0
Gate to source leak
current
IGSS
—
—
±10
—
—
±10
µA
VGS = ±16 V, VDS =
0
Zero gate voltage drain
current
IDSS
—
—
250
—
—
–250 µA
VDS = 50 V, VGS = 0
Gate to source cutoff
voltage
VGS(off) 1.0
—
2.0
–1.0
—
–2.0
V
ID = 1 mA, VDS = 10
V
Static drain to source on RDS(on) —
state resistance
0.13
0.17
—
0.15
0.2
Ω
ID = 2.5 A,
—
0.18
0.24
—
0.20
0.27
Ω
ID = 2.5 A, VGS = 4
V*1
2.7
4.5
—
2.7
5.0
—
S
ID = 2.5 A,
VGS = 10 V*1
Forward transfer
admittance
|yfs|
Input capacitance
Ciss
—
400
—
—
900
—
pF
VDS = 10 V, VGS = 0,
Output capacitance
Coss
—
220
—
—
460
—
pF
f = 1 MHz
Reverse transfer
capacitance
Crss
—
60
—
—
130
—
pF
Turn-on delay time
td(on)
—
5
—
—
8
—
ns
ID = 2.5 A, VGS = 10
V,
Rise time
tr
—
30
—
—
35
—
ns
RL = 12 Ω
Turn-off delay time
td(off)
—
170
—
—
180
—
ns
Fall time
tf
—
75
—
—
85
—
ns
Body to drain diode
forward voltage
VDF
—
1.0
—
—
–1.0
—
V
IF = 5 A, VGS = 0
Body to drain diode
reverse recovery time
trr
—
100
—
—
170
—
µs
IF = 5 A, VGS = 0,
dIF/dt = 50 A/µs
Note:
VDS = 10 V*1
1. Pulse Test
Polarity of test conditions for P channel device is reversed.
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1. This document may, wholly or partially, be subject to change without notice.
2. All rights are reserved: No one is permitted to reproduce or duplicate, in any form, the whole or
part of this document without Hitachi’s permission.
3. Hitachi will not be held responsible for any damage to the user that may result from accidents or
any other reasons during operation of the user’s unit according to this document.
4. Circuitry and other examples described herein are meant merely to indicate the characteristics and
performance of Hitachi’s semiconductor products. Hitachi assumes no responsibility for any
intellectual property claims or other problems that may result from applications based on the
examples described herein.
5. No license is granted by implication or otherwise under any patents or other rights of any third
party or Hitachi, Ltd.
6. MEDICAL APPLICATIONS: Hitachi’s products are not authorized for use in MEDICAL
APPLICATIONS without the written consent of the appropriate officer of Hitachi’s sales company.
Such use includes, but is not limited to, use in life support systems. Buyers of Hitachi’s products
are requested to notify the relevant Hitachi sales offices when planning to use the products in
MEDICAL APPLICATIONS.
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