INTEGRATED CIRCUITS 74LV03 Quad 2-input NAND gate Product specification Supersedes data of 1997 Mar 28 IC24 Data Handbook 1998 Apr 20 Philips Semiconductors Product specification Quad 2-input NAND gate 74LV03 FEATURES DESCRIPTION • Wide operating voltage: 1.0 to 5.5V • Optimized for Low Voltage applications: 1.0 to 3.6V • Accepts TTL input levels between VCC = 2.7V and VCC = 3.6V • Typical VOLP (output ground bounce) 0.8V @ VCC = 3.3V, The 74LV03 is a low–voltage Si–gate CMOS device and is pin and function compatible with 74HC/HCT03. The 74LV03 provides the 2–input NAND function. The 74LV03 has open–drain N–transistor outputs, which are not clamped by a diode connected to VCC. In the OFF–state, i.e. when one input is LOW, the output may be pulled to any voltage between GND and VOmax. This allows the device to be used as a LOW–to–HIGH or HIGH–to–LOW level shifter. For digital operation and OR–tied output applications, these devices must have a pull–up resistor to establish a logic HIGH level. Tamb = 25°C • Typical VOHV (output VOH undershoot) 2V @ VCC = 3.3V, Tamb = 25°C • Level shifter capability • Output capability: standard • ICC category: SSI (open drain) QUICK REFERENCE DATA GND = 0V; Tamb = 25°C; tr =tf 2.5 ns SYMBOL PARAMETER tPZL/tPLZ Propagation delay nA, nB to nY CI Input capacitance CPD Power dissipation capacitance per gate CONDITIONS TYPICAL UNIT 8 ns 3.5 pF 4 pF CL = 15pF VCC = 3.3V Notes 1, 2 NOTES: 1 CPD is used to determine the dynamic power dissipation (PD in µW) PD = CPD VCC2 x fi (CL VCC2 fo) where: fi = input frequency in MHz; CL = output load capacitance in pF; fo = output frequency in MHz; VCC = supply voltage in V; (CL VCC2 fo) = sum of the outputs. 2 The condition is VI = GND to VCC 3 The given value of CPD is obtained with : CL = 0 pF and RL = ∞ ORDERING INFORMATION PACKAGES TEMPERATURE RANGE OUTSIDE NORTH AMERICA NORTH AMERICA PKG. DWG. # 14-Pin Plastic DIL –40°C to +125°C 74LV03 N 74LV03 N SOT27-1 14-Pin Plastic SO –40°C to +125°C 74LV03 D 74LV03 D SOT108-1 14-Pin Plastic SSOP Type II –40°C to +125°C 74LV03 DB 74LV03 DB SOT337-1 14-Pin Plastic TSSOP Type I –40°C to +125°C 74LV03 PW 74LV03PW DH SOT402-1 PIN DESCRIPTION PIN NUMBER FUNCTION TABLE SYMBOL INPUTS FUNCTION nA OUTPUT nB nY 1, 4, 9, 12 1A to 4A Data inputs L L Z 2, 5, 10, 13 1B to 4B Data inputs L H Z 3, 6, 8, 11 1Y to 4Y Data outputs H L Z GND Ground (0V) H H L 7 14 1998 Apr 20 VCC NOTES: H = HIGH voltage level L = LOW voltage level Z = High impedance OFF-state Positive supply voltage 2 853–1963 19257 Philips Semiconductors Product specification Quad 2-input NAND gate 74LV03 PIN CONFIGURATION LOGIC SYMBOL 1A 1 14 VCC 1B 2 13 4B 1Y 3 12 4A 1 1A 2 1B 4 2A 5 2B 2A 4 11 4Y 2B 5 10 3B 9 3A 2Y 6 9 3A 10 3B GND 7 8 3Y 12 4A 13 4B SV00354 1Y 3 2Y 6 3Y 8 4Y 11 SV00355 LOGIC SYMBOL (IEEE/IEC) LOGIC DIAGRAM Y 1 & 3 A 2 4 & 6 GND 5 B 9 & SV00357 8 10 12 & 11 13 SV00356 1998 Apr 20 3 Philips Semiconductors Product specification Quad 2-input NAND gate 74LV03 RECOMMENDED OPERATING CONDITIONS SYMBOL VCC PARAMETER VI Input voltage VO Output voltage Tamb tr, tf CONDITIONS MIN TYP. MAX UNIT See Note1 1.0 3.3 5.5 V 0 – VCC V 0 – VCC V +85 +125 °C 500 200 100 50 ns/V DC supply voltage Operating ambient temperature range in free air See DC and AC characteristics VCC = 1.0V to 2.0V VCC = 2.0V to 2.7V VCC = 2.7V to 3.6V VCC = 3.6V to 5.5V Input rise and fall times –40 –40 – – – – – – – NOTES: 1 The LV is guaranteed to function down to VCC = 1.0V (input levels GND or VCC); DC characteristics are guaranteed from VCC = 1.2V to VCC = 5.5V. ABSOLUTE MAXIMUM RATINGS1, 2 In accordance with the Absolute Maximum Rating System (IEC 134) Voltages are referenced to GND (ground = 0V) SYMBOL PARAMETER VCC DC supply voltage CONDITIONS RATING UNIT –0.5 to +7.0 V ±IIK DC input diode current VI < –0.5 or VI > VCC + 0.5V 20 mA ±IOK DC output diode current VO < –0.5 or VO > VCC + 0.5V 50 mA ±IO DC output source or sink current – standard outputs –0.5V < VO < VCC + 0.5V 25 ±IGND, ±ICC Tstg PTOT DC VCC or GND current for types with –standard outputs 50 Storage temperature range Power dissipation per package –plastic DIL –plastic mini-pack (SO) –plastic shrink mini-pack (SSOP and TSSOP) –65 to +150 for temperature range: –40 to +125°C above +70°C derate linearly with 12mW/K above +70°C derate linearly with 8 mW/K above +60°C derate linearly with 5.5 mW/K 750 500 400 mA mA °C mW NOTES: 1 Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. 2 The input and output voltage ratings may be exceeded if the input and output current ratings are observed. 1998 Apr 20 4 Philips Semiconductors Product specification Quad 2-input NAND gate 74LV03 DC CHARACTERISTICS Over recommended operating conditions voltages are referenced to GND (ground = 0V) LIMITS SYMBOL PARAMETER -40°C to +85°C TEST CONDITIONS MIN VIH VIL HIGH level Input voltage LOW level Input voltage TYP1 VOH VOL HIGH level output voltage; g STANDARD outputs LOW level output voltage all outputs out uts voltage; MIN 0.9 0.9 VCC = 2.0V 1.4 1.4 VCC = 2.7 to 3.6V 2.0 2.0 VCC = 4.5 to 5.5V 0.7*VCC UNIT MAX V 0.7*VCC VCC = 1.2V 0.3 0.3 VCC = 2.0V 0.6 0.6 VCC = 2.7 to 3.6V 0.8 0.8 0.3*VCC 0.3*VCC VCC = 1.2V; VI = VIH or VIL; –IO = 100µA HIGH level output voltage out uts voltage; all outputs MAX VCC = 1.2V VCC = 4.5 to 5.5 VOH -40°C to +125°C V 1.2 VCC = 2.0V; VI = VIH or VIL; –IO = 100µA 1.8 2.0 1.8 VCC = 2.7V; VI = VIH or VIL; –IO = 100µA 2.5 2.7 2.5 VCC = 3.0V; VI = VIH or VIL; –IO = 100µA 2.8 3.0 2.8 VCC = 4.5V;VI = VIH or VIL; –IO = 100µA 4.3 4.5 4.3 VCC = 3.0V;VI = VIH or VIL; –IO = 6mA 2.40 2.82 2.20 VCC = 4.5V;VI = VIH or VIL; –IO = 12mA 3.60 4.20 3.50 V V VCC = 1.2V; VI = VIH or VIL; IO = 100µA VCC = 2.0V; VI = VIH or VIL; IO = 100µA 0 0 0.2 0.2 VCC = 2.7V; VI = VIH or VIL; IO = 100µA 0 0.2 0.2 VCC = 3.0V;VI = VIH or VIL; IO = 100µA 0 0.2 0.2 VCC = 4.5V;VI = VIH or VIL; IO = 100µA 0 0.2 0.2 V LOW level output voltage; g STANDARD outputs VCC = 3.0V;VI = VIH or VIL; IO = 6mA 0.25 0.40 0.50 VCC = 4.5V;VI = VIH or VIL; IO = 12mA 0.35 0.55 0.65 IOZ HIGH level output leakage current VCC = 2.0 to 3.6V; VI = VIL; VO = VCC or GND 5.0 10 µA IOZ HIGH level output leakage current VCC = 2.0 to 3.6V; VI = VIL; VO = 6.0V2 10 20 µA Input leakage current VCC = 5.5V; VI = VCC or GND 1.0 1.0 µA ICC Quiescent supply current; SSI VCC = 5.5V; VI = VCC or GND; IO = 0 20.0 40 µA ∆ICC Additional quiescent supply current per input VCC = 2.7V to 3.6V; VI = VCC –0.6V 500 850 µA VOL II V NOTES: 1 All typical values are measured at Tamb = 25°C. 2 The maximum operating output voltage (VO(max)) is 6.0V. 1998 Apr 20 5 Philips Semiconductors Product specification Quad 2-input NAND gate 74LV03 AC CHARACTERISTICS FOR 74LV03 GND = 0V; tr = tf ≤ 2.5ns; CL = 50pF; RL = 1KΩ SYMBOL PARAMETER Propagation delay nA, nB, to nY tPZL/tPLZ LIMITS –40 to +85 °C CONDITION WAVEFORM VCC(V) MIN TYP1 1.2 – 2.0 – LIMITS –40 to +125 °C MAX MIN 50 – – – 17 26 – 31 2.7 – 13 19 – 23 3.0 to 3.6 – 102 16 – 19 4.5 to 5.5 – –3 13 – 16 Figures, 1, 2 UNIT MAX ns NOTE: 1 Unless otherwise stated, all typical values are at Tamb = 25°C. 2 Typical value measured at VCC = 3.3V. 3 Typical value measured at VCC = 5.0V. AC WAVEFORMS TEST CIRCUIT VM = 1.5V at VCC 2.7V 3.6V VM = 0.5V * VCC at VCC 2.7V and 4.5V VOL and VOH are the typical output voltage drop that occur with the output load. VX = VOL + 0.3V at VCC 2.7V and 3.6V VX = VOL + 0.1 * VCC at VCC 2.7V and 4.5V VCC 2 * VCC Open GND RL = 1k VO VI PULSE GENERATOR D.U.T. RT CL RL = 1k 50 pF Test Circuit for Outputs DEFINITIONS VI nA, nB INPUT RL = Load resistor CL = Load capacitance includes jig and probe capacitiance. RT = Termination resistance should be equal to ZOUT of pulse generators. VM SWITCH POSITION VCC tPLZ tPZL S1 VCC tPLH/tPHL Open < 2.7V VCC tPLZ/tPZL 2 * VCC 2.7–3.6V 2.7V tPHZ/tPZH GND TEST VI GND nY OUTPUT VOL VM VX 4.5V VCC SV00896 Figure 2. Load circuitry for switching times SV00358 Figure 1. Input (nA, nB) to output (nY) propagation delays. 1998 Apr 20 6 Philips Semiconductors Product specification Quad 2-input NAND gate 74LV03 DIP14: plastic dual in-line package; 14 leads (300 mil) 1998 Apr 20 7 SOT27-1 Philips Semiconductors Product specification Quad 2-input NAND gate 74LV03 SO14: plastic small outline package; 14 leads; body width 3.9 mm 1998 Apr 20 8 SOT108-1 Philips Semiconductors Product specification Quad 2-input NAND gate 74LV03 SSOP14: plastic shrink small outline package; 14 leads; body width 5.3 mm 1998 Apr 20 9 SOT337-1 Philips Semiconductors Product specification Quad 2-input NAND gate 74LV03 TSSOP14: plastic thin shrink small outline package; 14 leads; body width 4.4 mm 1998 Apr 20 10 SOT402-1 Philips Semiconductors Product specification Quad 2-input NAND gate 74LV03 NOTES 1998 Apr 20 11 Philips Semiconductors Product specification Quad 2-input NAND gate 74LV03 Data sheet status Data sheet status Product status Definition [1] Objective specification Development This data sheet contains the design target or goal specifications for product development. Specification may change in any manner without notice. Preliminary specification Qualification This data sheet contains preliminary data, and supplementary data will be published at a later date. Philips Semiconductors reserves the right to make chages at any time without notice in order to improve design and supply the best possible product. Product specification Production This data sheet contains final specifications. Philips Semiconductors reserves the right to make changes at any time without notice in order to improve design and supply the best possible product. [1] Please consult the most recently issued datasheet before initiating or completing a design. Definitions Short-form specification — The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Limiting values definition — Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information — Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Disclaimers Life support — These products are not designed for use in life support appliances, devices or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Right to make changes — Philips Semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified. Copyright Philips Electronics North America Corporation 1998 All rights reserved. Printed in U.S.A. Philips Semiconductors 811 East Arques Avenue P.O. Box 3409 Sunnyvale, California 94088–3409 Telephone 800-234-7381 print code Document order number: yyyy mmm dd 12 Date of release: 08-98 9397-750-04403