ROHM BD6551G

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STRUCTURE
Silicon Monolithic Integrated Circuit
PRODUCT
CONSTANT VOLTAGE AND CONSTANT CURRENT
CONTROLLER FOR BATTERY CHARGERS AND ADAPTORS
BD6551G
TYPE
FEATURE
・
・
・
・
Constant voltage and constant current control
Power supply voltage: 1.8V~12V
High accuracy reference voltage: 1.21V±1%
An accuracy for current-detecting voltage: 200mV±2%
○ ABSOLUTE MAXIMUM RATINGS
PARAMETER
(Ta=25℃)
Symbol
Limit
Unit
Power Supply Voltage
ICT Pin Maximum Voltage
Power Dissipation
VMAX
VICTMAX
Pd
-0.3 ~ 14
-0.3 ~ VCC
675 *1
V
V
mW
Operating Temperature Range
Maximum Junction Temperature
Topr
Tjmax
0 ~ +85
150
℃
℃
Storage Temperature Range
Tstg
-55 ~ +150
℃
*1 Pd derated at 5.4mW/℃ for temperature above Ta=25℃,
mounted on 70mm×70mm×1.6mm glass-epoxy PCB.
○ OPERATING CONDITIONS (Ta=0~+85℃)
PARAMETER
Symbol
Power Supply Voltage
VCC
Limit
1.8~12
Unit
*2
V
*2 Except an amplifier for voltage control loop guaranteed above VCC=2.5V.
REV. A
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○ ELECTRICAL CHARACTERISTICS
PARAMETER
【Total Current Consumption】
Total Supply Current - not taking the output
sinking current into account
【Voltage Control Loop】
Transconduction Gain(VCT).
Sink Current Only
Voltage Control Loop Reference at 1.5mA
sinking current
【Current Control Loop】
Transconduction Gain(ICT).
Sink Current Only
Current Control Loop Reference at 2.5mA
sinking current
(Ta=25℃ and Vcc=+5V (unless otherwise specified))
MIN.
Limit
TYP.
MAX.
ICC
-
0.6
GMV
1.0
4.5
Symbol
VREF
GMI
VSE
UNIT
Conditions
2
mA
Ta=25℃
-
mA/mV
Ta=25℃
1.198
1.21
1.222
1.186
1.21
1.234
1.5
3.5
-
196
200
204
V
mA/mV
mV
Ta=25℃
0 < Ta < 85℃
Ta=25℃
Ta=25℃
0 < Ta < 85℃
192
200
208
Ibi
13
23
33
μA
Ta=25℃
IOS
-
25
50
mA
Ta=25℃,OUT=VCC,
VSE=0V, ICT=-0.3V
UVLO Threshold Voltage
UVLO Hysteresis Width
VVT
DVVT
1.8
40
1.9
100
2.0
160
V
mV
Output Short Circuit Current at Full Drive
IOS2
5.0
-
-
mA
Current out of pin ICT at -200mV
【Output Stage】
Output Short Circuit Current, Output to VCC,
Sink Current Only
【UVLO】
● This product is not designed for protection against radio active rays.
○ PACKEGE, MARKING SPECIFICATION
SSOP6 (UNIT:mm)
REV. A
VCC=L→H
Ta=25℃
VCC=OUT=1.8V
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○ BLOCK DIAGRAM
VCC
6
1.21V
+
3 OUT
-
VOLTAGE
REFERENCE
1 VCT
VCC
+
-
-
+
2 GND
UVLO
4
5
ICT
VSE
○ PIN No. & PIN NAME
PIN No.
PIN Name
1
2
3
4
5
VCT
GND
OUT
ICT
VSE
6
VCC
Function
Input Pin of the Voltage Control Loop
Ground Line. 0V Reference For All Voltages
Output Pin. Sinking Current Only
Input Pin of the Current Control Loop(+)
Input Pin of the Current Control Loop(-)
Positive Power Supply Line. This pin doubles
low voltage input detection pin.
REV. A
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○ Operation Notes
1) Absolute maximum ratings
An excess in the absolute maximum rating, such as supply voltage, temperature range of operating conditions, etc.,
can break down the devices, thus making impossible to identify breaking mode, such as a short circuit or an open
circuit. If any over rated values will expect to exceed the absolute maximum ratings, consider adding circuit protection
devices, such as fuses.
2) GND voltage
The potential of GND pin must be minimum potential in all condition. As an exception, the circuit design allows voltages
up to -0.3 V to be applied to the ICT pin.
3) Thermal design
Use a thermal design that allows for a sufficient margin in light of the power dissipation (Pd) in actual operating
conditions.
4) Inter-pin shorts and mounting errors
Use caution when positioning the IC for mounting on printed circuit boards. The IC may be damaged if there is any
connection error or if pins are shorted together.
5) Actions in strong electromagnetic field
Use caution when using the IC in the presence of a strong electromagnetic field as doing so may cause the IC to
malfunction.
6) Mutual impedance
Power supply and ground wiring should reflect consideration of the need to lower mutual impedance and minimize
ripple as much as possible (by making wiring as short and thick as possible or rejecting ripple by incorporating
inductance and capacitance).
7) Regarding input pin of the IC
This monolithic IC contains P+ isolation and P substrate layers between adjacent elements in order to keep them
isolated. P-N junctions are formed at the intersection of these P layers with the N layers of other elements, creating a
parasitic diode or transistor. For example, as shown in the figures below, the relation between each potential is as
follows:
When GND > Pin A and GND > Pin B, the P-N junction operates as a parasitic diode.
When GND > Pin B, the P-N junction operates as a parasitic transistor.
Parasitic diodes can occur inevitable in the structure of the IC. The operation of parasitic diodes can result in mutual
interference among circuits, operational faults, or physical damage. Accordingly, methods by which parasitic diodes
operate, such as applying a voltage that is lower than the GND (P substrate) voltage to an input pin, should not be
used. Although the circuit design allows voltages up to -0.3 V to be applied to the ICT pin, voltages lower than this may
cause the behavior described above. Use caution when designing the circuit.
Resistor
(Pin B)
~
~
Transistor (NPN)
B
C
~
~
(Pin A)
E
GND
N
P+
P
P+
N
N
N
P substrate
Parasitic elements
P+
P
N
N
P+
N
P substrate
GND
Parasitic elements
GND
(Pin B)
(Pin A)
~
~
C
~
~
B
Parasitic elements
E
GND
Other Adjacent Elements
Simplified structure of a Monolithic IC
REV. A
GND
Parasitic elements
Notice
Notes
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Examples of application circuits, circuit constants and any other information contained herein
illustrate the standard usage and operations of the Products. The peripheral conditions must
be taken into account when designing circuits for mass production.
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However, should you incur any damage arising from any inaccuracy or misprint of such
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R1120A