Revised August 2000 100364 Low Power 16-Input Multiplexer General Description Features The 100364 is a 16-input multiplexer. Data paths are controlled by four Select lines (S0–S3). Their decoding is shown in the Truth Table. Output data polarity is the same as the selected input data. All inputs have 50 kΩ pull-down resistors. ■ 35% power reduction of the 100164 ■ 2000V ESD protection ■ Pin/function compatible with 100164 ■ Voltage compensated operating range = −4.2V to −5.7V ■ Available to industrial grade temperature range Ordering Code: Order Number Package Number 100364PC N24E Package Description 24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-010, 0.400 Wide 100364QC V28A 28-Lead Plastic Lead Chip Carrier (PLCC), JEDEC MO-047, 0.450 Square 100364QI V28A 28-Lead Plastic Lead Chip Carrier (PLCC), JEDEC MO-047, 0.450 Square Industrial Temperature Range (−40°C to +85°C) Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Logic Symbol Connection Diagrams 24-Pin DIP Pin Descriptions Pin Names Description I0–I15 Data Inputs S0–S3 Select Inputs Z Data Output 28-Pin PLCC © 2000 Fairchild Semiconductor Corporation DS010265 www.fairchildsemi.com 100364 Low Power 16-Input Multiplexer February 1990 100364 Truth Table Select Inputs Output S0 S1 S2 S3 Z L L L L I0 H L L L I1 L H L L I2 H H L L I3 L L H L I4 H L H L I5 L H H L I6 H H H L I7 L L L H I8 H L L H I9 I10 L H L H H H L H I11 L L H H I12 H L H H I13 L H H H I14 H H H H I15 H = HIGH Voltage Level L = LOW Voltage Level Logic Diagram www.fairchildsemi.com 2 Storage Temperature (TSTG) Pin Potential to Ground Pin (VEE) Recommended Operating Conditions −65°C to +150°C +150°C Maximum Junction Temperature (TJ) Case Temperature (TC) −7.0V to +0.5V −5.7V to −4.2V Supply Voltage (VEE) −50 mA Note 1: The “Absolute Maximum Ratings” are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated at these limits. The parametric values defined in the Electrical Characteristics tables are not guaranteed at the absolute maximum rating. The “Recommended Operating Conditions” table will define the conditions for actual device operation. ≥ 2000V ESD (Note 2) −40°C to +85°C Industrial Output Current (DC Output HIGH) 0°C to +85°C Commercial VEE to +0.5V Input Voltage (DC) 100364 Absolute Maximum Ratings(Note 1) Note 2: ESD testing conforms to MIL-STD-883, Method 3015. Commercial Version DC Electrical Characteristics (Note 3) VEE = −4.2V to −5.7V, VCC = VCCA = GND, TC = 0°C to +85°C Min Typ Max Units VOH Symbol Output HIGH Voltage Parameter −1025 −955 −870 mV VIN = VIH (Max) Conditions Loading with VOL Output LOW Voltage −1830 −1705 −1620 mV or VIL (Min) 50Ω to −2.0V VOHC Output HIGH Voltage −1035 VOLC Output LOW Voltage VIH Input HIGH Voltage VIL mV VIN = VIH (Min) Loading with −1610 mV or VIL (Max) 50Ω to −2.0V −1165 −870 mV Guaranteed HIGH Signal Input LOW Voltage −1830 −1475 mV Guaranteed LOW Signal IIL Input LOW Current 0.5 IIH Input HIGH Current IEE Power Supply Current for All Inputs for All Inputs µA −89 VIN = VIL (Min) 300 µA VIN = VIH (Max) −45 mA Inputs OPEN Note 3: The specified limits represent the “worst case” value for the parameter. Since these values normally occur at the temperature extremes, additional noise immunity and guardbanding can be achieved by decreasing the allowable system operating ranges. Conditions for testing shown in the tables are chosen to guarantee operate under “worst case” conditions. DIP AC Electrical Characteristics VEE = −4.2V to −5.7V, VCC = VCCA = GND Symbol Parameter tPLH Propagation Delay tPHL I0–I15 to Output tPLH Propagation Delay tPHL S0, S1 to Output tPLH Propagation Delay tPHL S2, S3 to Output tTLH Transition Time tTHL 20% to 80%, 80% to 20% TC = 0°C TC = +25°C TC = +85°C Units Min Max Min Max Min Max 0.90 2.00 0.90 2.00 0.90 2.10 ns 1.40 2.80 1.40 2.80 1.50 2.90 ns 1.00 2.20 1.00 2.20 1.10 2.40 ns 0.35 1.20 0.35 1.20 0.35 1.20 ns 3 Conditions Figures 1, 2 www.fairchildsemi.com 100364 Commercial Version (Continued) PLCC AC Electrical Characteristics VEE = −4.2V to −5.7V, VCC = VCCA = GND Symbol TC = 0°C Parameter tPLH Propagation Delay tPHL I0–I15 to Output tPLH Propagation Delay tPHL S0, S1 to Output tPLH Propagation Delay tPHL S2, S3 to Output tTLH Transition Time tTHL 20% to 80%, 80% to 20% TC = +25°C TC = +85°C Units Min Max Min Max Min Max 0.90 1.80 0.90 1.80 0.90 1.90 ns 1.40 2.60 1.40 2.60 1.50 2.70 ns 1.00 2.00 1.00 2.00 1.10 2.20 ns 0.35 1.10 0.35 1.10 0.35 1.10 ns Conditions Figures 1, 2 Industrial Version PLCC DC Electrical Characteristics (Note 4) VEE = −4.2V to −5.7V, VCC = VCCA = GND, TC = −40°C to +85°C TC = −40°C TC = 0°C to +85°C Symbol Parameter Min Max Min Max Units Conditions VOH Output HIGH Voltage −1085 −870 −1025 −870 mV VIN = VIH (Max) Loading with VOL Output LOW Voltage −1830 −1575 −1830 −1620 mV or VIL (Min) 50Ω to −2.0V VOHC Output HIGH Voltage −1095 mV VIN = VIH (Min) Loading with VOLC Output LOW Voltage −1610 mV or VIL (Max) 50Ω to −2.0V VIH Input HIGH Voltage −1170 −870 −1165 −870 mV Guaranteed HIGH Signal for All Inputs VIL Input LOW Voltage −1830 −1480 −1830 −1475 mV Guaranteed LOW Signal for All Inputs IIL Input LOW Current 0.5 µA VIN = VIL (Min) IIH Input HIGH Current IEE Power Supply Current −1035 −1565 0.5 325 −89 −45 −89 325 µA VIN = VIH (Max) −45 mA Inputs OPEN Note 4: The specified limits represent the “worst case” value for the parameter. Since these values normally occur at the temperature extremes, additional noise immunity and guardbanding can be achieved by decreasing the allowable system operating ranges. Conditions for testing shown in the tables are chosen to guarantee operation under “worst case” conditions. PLCC AC Electrical Characteristics VEE = −4.2V to −5.7V, VCC = VCCA = GND Symbol Parameter tPLH Propagation Delay tPHL I0–I15 to Output tPLH Propagation Delay tPHL S0, S1 to Output tPLH Propagation Delay tPHL S2, S3 to Output tTLH Transition Time tTHL 20% to 80%, 80% to 20% www.fairchildsemi.com TC = −40°C TC = +25°C TC = +85°C Units Min Max Min Max Min Max 0.90 1.80 0.90 1.80 0.90 1.90 ns 1.20 2.60 1.40 2.60 1.50 2.70 ns 0.80 2.10 1.00 2.00 1.10 2.20 ns 0.20 1.20 0.35 1.10 0.35 1.10 ns Conditions Figures 1, 2 4 100364 Test Circuit Note: VCC, VCCA = +2V, VEE = −2.5V L1 and L2 = Equal length 50Ω impedance lines RT = 50Ω terminator internal to scope Decoupling 0.1 µF from GND to VCC and VEE All unused outputs are loaded with 50Ω to GND CL = Fixture and stray capacitance ≤ 3 pF FIGURE 1. AC Test Circuit Switching Waveforms FIGURE 2. Propagation Delay and Transition Times 5 www.fairchildsemi.com 100364 Physical Dimensions inches (millimeters) unless otherwise noted 24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-010, 0.400 Wide Package Number N24E www.fairchildsemi.com 6 100364 Low Power 16-Input Multiplexer Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 28-Lead Plastic Lead Chip Carrier (PLCC), JEDEC MO-047, 0.450 Square Package Number V28A Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications. LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 2. A critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. www.fairchildsemi.com 7 www.fairchildsemi.com