a FEATURES Quad High-Speed Current Feedback Amplifier with Disable –3 dB Bandwidth 350 MHz @ G = 1 Slew Rate 2400 V/s, VS = 12 V Drives High Capacitive Loads Settling Time to 0.1% in 35 ns; 300 pF Load, 6 V Step Settling Time to 0.1% in 18 ns; 5 pF Load, 2 V Step Low Power Operates on +5 V to 12 V (+24 V) 4 mA/Amplifier Supply Current Excellent Video Specs (RL = 150 , G = 2) Gain Flatness 0.1 dB to 70 MHz 0.04% Differential Gain 0.09 Differential Phase Crosstalk –58 dB @ 5 MHz THD –72 dBc @ 5 MHz Outstanding DC Accuracy VOFFSET is 2 mV (Typ) IBIAS is 3 A (Max) 16-Lead SOIC Package APPLICATIONS LCD Column Drivers High-Performance Test Equipment Video Line Driver ATE Quad 350 MHz 24 V Amplifier AD8024 FUNCTIONAL BLOCK DIAGRAM 1 16 2 15 3 14 VCC 4 AD8024AR DIS 5 13 VEE 12 DGND 6 11 7 10 8 9 1V 20ns VIN PRODUCT DESCRIPTION The AD8024 is a low settling time, high-speed, high output voltage quad current feedback operational amplifier. Manufactured on ADI’s proprietary XFHV high-speed bipolar process, the AD8024 is capable of driving to within 1.3 V of its 24 V supply rail. Each amplifier has high-output current capability and can drive high capacitive loads. The AD8024 outputs settle to 0.1% within 35 ns into a 300 pF load (6 V swing). The AD8024 can run on both +5 V as well as ± 12 V rails. Slew rate on ± 12 V supplies is 2400 V/µs. DC Characteristics are outstanding with typical 2 mV offset, and 3 µA maximum input bias current. High-speed disable pin allows the AD8024 to be shut down when not in use. Low-power operation is assured with the 4 mA/Amplifier supply current draw. VOUT 2V Figure 1. Pulse Response Driving a Large Load Capacitance, C L = 300 pF, G = 3, RFB = 2.32 kΩ, RS = 10.5 Ω, RL = 1 kΩ, VS = ± 7.5 V The high voltage drive capability, low settling time, high slew rate, low offset, and high bandwidth make the AD8024 ideally suited as an LCD column driver, a video line driver, and for use in high-performance test equipment. The AD8024 is available in a 16-lead SOIC package. REV. B Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781/329-4700 World Wide Web Site: http://www.analog.com Fax: 781/326-8703 © Analog Devices, Inc., 2000 AD8024–SPECIFICATIONS (@ T = 25C, V = 7.5 V, C A Model DYNAMIC PERFORMANCE Bandwidth (3 dB) Bandwidth (0.1 dB) Slew Rate Settling Time to 0.1% NOISE/HARMONIC PERFORMANCE Total Harmonic Distortion Input Voltage Noise Input Current Noise Differential Gain (RL = 150 Ω) Differential Phase (RL = 150 Ω) DC PERFORMANCE Input Offset Voltage Offset Drift +Input Bias Current –Input Bias Current Open-Loop Transresistance S Conditions LOAD = 10 pF, RL = 150 , unless otherwise noted) Min Typ RFB = 800 Ω, No Peaking, G = 3 160 No Peaking, G = 3 370 6 V Step, G = 3, CLOAD = 300 pF TA = 25°C to 85°C, ± 3 V (6 V Step) CLOAD = 300 pF, RS = 10.5 Ω, RLOAD > 1 kΩ, RFB = 2.32 kΩ ± 1 V (2 V Step), CLOAD = 5 pF, RS = 0 Ω, RLOAD > 1 kΩ, RFB = 750 kΩ 200 25 390 30 MHz MHz V/µs ns 18 ns fC = 5 MHz, RL = 1 kΩ fC = 5 MHz, RL = 150 Ω f = 10 kHz f = 10 kHz (–IIN) f = 3.58 MHz, G = 2 f = 3.58 MHz, G = 2 –72 –67 3 8 0.04 0.09 dBc dBc nV/√Hz pA/√Hz % Degrees TMIN to TMAX 2 1.5 1 1 1.2 0.840 0.850 TMIN to TMAX INPUT CHARACTERISTICS Input Resistance +Input –Input Input Capacitance Input Common-Mode Voltage Common-Mode Rejection Ratio Input Offset Voltage –Input Current +Input Current OUTPUT CHARACTERISTICS Output Voltage Swing RL = 1 kΩ RL = 150 Ω Linear Output Current Max Dynamic Output Current Capacitive Load Drive MATCHING CHARACTERISTICS Dynamic Crosstalk (Worst Between Any 2) DC Input Offset Voltage Match Input Current Match POWER SUPPLY Operating Range TMIN to TMAX TMIN to TMAX 5 7.5 3 1 135 2 –VS + 1.2 62 VOL – VEE VCC – VOH VOL – VEE VCC – VOH Error <3%, R1 = 50 Ω 35 G = 2, f = 5 MHz +VS – 2 66 0.2 1 0.8 1.1 1.0 1.3 50 300 1000 0.4 0.1 Single Supply Dual Supply 5 ± 2.5 16 19.5 0.5 TMIN to TMAX Disable = HIGH VS = ± 6.5 V to ± 8.5 V –2– 64 70 0.03 0.07 Unit mV µV/°C µA µA MΩ MΩ MΩ Ω pF V dB µA/V µA/V 1.0 1.3 1.35 1.55 –58 Total Quiescent Current Power Supply Rejection Ratio Input Offset Voltage –Input Current +Input Current Max V V V V mA mA pF dB 1.5 2.0 mV µA 24 ± 12 17 V V mA mA mA 1 dB µA/V µA/V REV. B AD8024 Model Conditions DISABLE CHARACTERISTICS Off Isolation Off Output Impedance Turn-On Time Turn-Off Time Switching Threshold Min Typ 1.3 49 20 25 20 1.6 f = 6 MHz VTH – DGND OPERATING TEMPERATURE RANGE –40 Max Unit 1.9 dB pF ns ns V +85 °C Specifications subject to change without notice. ABSOLUTE MAXIMUM RATINGS* Output Short Circuit Limit Supply Voltage VCC – VEE . . . . . . . . . . . . . . . . . . . 26 V Total Internal Power Dissipation Small Outline (R) . . . . . 1.0 Watts (Observe Derating Curve) Input Voltage (Common Mode) . . . . . . . . . . . . . . . . . . . ± VS Differential Input Voltage . . . . . . . . . . . . . . . ± 3 V (Clamped) Output Voltage Limit Maximum . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +VS Minimum . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –VS Output Short Circuit Duration . . . . . . . . . . . . . . . . . . . . . . Observe Power Derating Curve Storage Temperature Range R Package . . . . . . . . . . . . . . . . . . . . . . . . –65°C to +125°C Operating Temperature Range AD8024A . . . . . . . . . . . . . . . . . . . . . . . . . . –40°C to +85°C Lead Temperature Range (Soldering 10 sec) . . . . . . . . . 300°C The AD8024’s internal short circuit limitation is not sufficient to protect the device in the event of a direct short circuit between a video output and a power supply voltage rail (VCC or VEE). Temporary short circuits can reduce an output’s ability to source or sink current and therefore impact the device’s ability to drive a load. Short circuits of extended duration can cause metal lines to fuse open, rendering the device nonfunctional. *Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. It must also be noted that in (noninverting) gain configurations (with low values of gain resistor), a high level of input overdrive can result in a large input error current, which may then result in a significant power dissipation in the input stage. This power must be included when computing the junction temperature rise due to total internal power. ORDERING GUIDE AD8024AR-16 Temperature Range Package Description –40°C to +85°C 16-Lead Narrow-Body SOIC Package Option 2.5 MAXIMUM POWER DISSIPATION – Watts Model To prevent these problems, it is recommended that a series resistor be placed as close as possible to the outputs. This will serve to substantially reduce the magnitude of the fault currents and protect the outputs from damage caused by intermittent short circuits. This may not be enough to guarantee that the maximum junction temperature (150°C) is not exceeded under all conditions. To ensure proper operation, it is necessary to observe the maximum power derating curve in Figure 2. R-16A Maximum Power Dissipation The maximum power that can be safely dissipated by the AD8024 is limited by the associated rise in junction temperature. The maximum safe junction temperature for the plastic encapsulated parts is determined by the glass transition temperature of the plastic, about 150°C. Temporarily exceeding this limit may cause a shift in parametric performance due to a change in the stresses exerted on the die by the package. Exceeding a junction temperature of 175°C for an extended period can result in device failure. TJ = 150C 2.0 1.5 16-LEAD SOIC 1.0 0.5 –50 –40 –30 –20 –10 0 10 20 30 40 50 60 70 AMBIENT TEMPERATURE – C 80 90 Figure 2. Maximum Power Dissipation vs. Ambient Temperature CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the AD8024 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high-energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality. REV. B –3– WARNING! ESD SENSITIVE DEVICE AD8024–Typical Performance Characteristics 25 12 TA = 25C 10 TOTAL SUPPLY CURRENT – mA COMMON-MODE VOLTAGE – Volts TA = 25C 8 –VCM 6 +VCM 4 10 5 0 4 2 6 8 SUPPLY VOLTAGE – Volts 10 12 0 2 4 6 8 10 SUPPLY VOLTAGE – Volts 12 14 Figure 6. Total Supply Current vs. Supply Voltage Figure 3. Input Common-Mode Voltage Range vs. Supply Voltage 24 7.0 VS = 7.5V –SWING 6.5 22 TOTAL SUPPLY CURRENT – mA OUTPUT VOLTAGE SWING – V 15 2 0 +SWING 6.0 5.5 5.0 4.5 4.0 20 VS = 12V 18 16 VS = 7.5V 14 12 3.5 3.0 10 100 1k LOAD RESISTANCE – 10 –60 10k –40 –20 0 20 40 TEMPERATURE – C 60 80 100 Figure 7. Total Supply Current vs. Temperature Figure 4. Output Voltage Swing vs. Load Resistance 25 3 TA = 25C VS = 7.5V SWING (NO LOAD) 20 INPUT BIAS CURRENT – A OUTPUT VOLTAGE SWING – V p-p 20 SWING (RL = 150) 15 10 2 –IB 1 +IB 0 5 0 2 3 4 5 7 9 6 8 10 SUPPLY VOLTAGE – Volts 11 12 –1 –60 13 Figure 5. Output Voltage Swing vs. Supply Voltage –40 –20 0 20 40 TEMPERATURE – C 60 80 100 Figure 8. Input Bias Current vs. Temperature –4– REV. B AD8024 10M 2.5 1M INPUT OFFSET VOLTAGE – mV VS = 7.5V TRANSIMPEDANCE – 2.0 1.5 VS = 12V VS = 7.5V 100k 10k 1k 100 1.0 10 0.5 –60 –40 –20 0 20 40 TEMPERATURE – C 60 80 1 0.01 100 100 VNOISE COMMON-MODE REJECTION – dB –INOISE CURRENT NOISE – pA/ Hz VOLTAGE NOISE – nV/ Hz 10 1000 VS = 12V 80 10 100 90 VS = 7.5V +INOISE 1 10 FREQUENCY – MHz Figure 12. Open-Loop Transimpedance vs. Frequency, RL = 150 Ω Figure 9. Input Offset Voltage vs. Temperature 100 0.1 70 VS = 7.5V 60 50 R 40 R 30 VCM R 20 R 10 1 0.01 0.1 1 FREQUENCY – kHz 0 1 100 10 60 10000 VS = 7.5V POWER SUPPLY REJECTION – dB G = +1 VS = 7.5V OUTPUT IMPEDANCE – 100 Figure 13. Common-Mode Rejection vs. Frequency Figure 10. Input Current and Voltage Noise vs. Frequency 1000 100 10 50 40 30 +PSRR 20 –PSRR 10 0 0 1 10 FREQUENCY – MHz 100 1 200 10 100 FREQUENCY – MHz 1000 Figure 14. Power Supply Rejection vs. Frequency Figure 11. Output Impedance vs. Frequency, Disabled State REV. B 10 FREQUENCY – MHz 1 –5– AD8024 3000 –30 G=2 VS = 7.5V VO = 2V p-p –50 RL = 150 2500 G = +2 SLEW RATE – V/s 2ND –60 3RD –70 2000 G = +10 1500 500 –90 0 10 FREQUENCY – MHz 2 100 Figure 15. Harmonic Distortion vs. Frequency, RL = 150 Ω 6 8 10 SUPPLY VOLTAGE – V 3 CLOSED-LOOP GAIN (NORMALIZED) – dB 10 20 30 40 VS = 2.5V 50 VS = 7.5V 60 70 180 2 1 GAIN 90 0 –1 PHASE VS = 12V –2 10 FREQUENCY – MHz –4 –90 –5 VS = 7.5V –6 –180 –7 –8 1 100 Figure 16. Crosstalk vs. Frequency, G = 2, RL = 150 Ω 10 100 FREQUENCY – MHz CLOSED-LOOP GAIN (NORMALIZED) – dB VS = 7.5V RL = 150 1000 800 G = +10 600 G = +2 G = –1 400 G = +1 200 180 1 GAIN 0 90 –1 –2 PHASE –3 VS = 2.5V 0 –4 –5 –6 –90 –7 VS = 7.5V –8 –9 –180 –10 –11 –12 0 1 2 3 4 OUTPUT VOLTAGE STEP – V p-p 5 –270 1000 Figure 19. Closed-Loop Gain and Phase vs. Frequency, G = 1, RL = 150 Ω 2 1200 0 –3 –9 80 1 12 Figure 18. Maximum Slew Rate vs. Supply Voltage 0 CROSSTALK – dB 4 PHASE SHIFT – Degrees 1 SLEW RATE – V/s G = –1 1000 –80 0 G = +1 6 1 Figure 17. Slew Rate vs. Output Step Size PHASE SHIFT – Degrees HARMONIC DISTORTION – dBc –40 10 100 FREQUENCY – MHz –270 1000 Figure 20. Closed-Loop Gain and Phase vs. Frequency, G = 2, RL = 150 Ω –6– REV. B AD8024 180 0 GAIN –1 2V –2 VS = 12V –3 90 PHASE –4 –5 0 –6 VS = 7.5V –7 –90 –8 –9 –10 PHASE SHIFT – Degrees CLOSED LOOP GAIN (NORMALIZED) – dB 1 VIN VOUT –180 –11 2V –12 –270 1000 –13 1 10 100 FREQUENCY – MHz Figure 21. Closed-Loop Gain and Phase vs. Frequency, G = 10, RL = 150 Ω Figure 24. Large Signal Pulse Response, Gain = 1 (RFB = 5 kΩ, RL = 150 Ω, VS = ± 7.5 V) 180 1 GAIN 0 250mV –1 –2 VS = 12V PHASE –3 0 –4 –90 –5 VS = 7.5V –6 VIN VOUT –180 –7 500mV –8 –9 1 –270 1000 10 100 FREQUENCY – MHz Figure 22. Closed-Loop Gain and Phase vs. Frequency, G = –1, RL = 150 Ω 500mV Figure 25. Small Signal Pulse Response, Gain = 2 (RFB = 750 Ω, RL = 150 Ω, VS = ± 7.5 V) 20ns 1V VIN VIN VOUT VOUT 500mV 2V Figure 23. Small Signal Pulse Response, Gain = 1 (RFB = 5 kΩ, RL = 150 Ω, VS = ± 7.5 V) REV. B 20ns 90 PHASE SHIFT – Degrees CLOSED-LOOP GAIN (NORMALIZED) – dB 20ns 20ns Figure 26. Large Signal Pulse Response, Gain = 2 (RFB = 750 Ω, RL = 150 Ω, VS = ± 7.5 V) –7– AD8024 50mV 20ns 500mV VIN VIN VOUT VOUT 500mV 500mV Figure 29. Small Signal Pulse Response, Gain = –1 (RFB = 909 Ω, RL = 150 Ω, VS = ± 7.5 V) Figure 27. Small Signal Pulse Response, Gain = 10 (RFB = 400 Ω, RL = 150 Ω, VS = ± 7.5 V) 200mV 20ns 2V 20ns VIN 20ns VIN VOUT VOUT 2V 2V Figure 30. Large Signal Pulse Response, Gain = –1 (RFB = 909 Ω, RL = 150 Ω, VS = ± 7.5 V) Figure 28. Large Signal Pulse Response, Gain = 10 (RFB = 400 Ω, RL = 150 Ω, VS = ± 7.5 V) –8– REV. B AD8024 General Driving Capacitive Loads The AD8024 is a wide bandwidth, quad video amplifier. It offers a high level of performance on 16 mA total quiescent supply current for closed-loop gains of ± 1 or greater. When used in combination with the appropriate feedback resistor, the AD8024 will drive any load capacitance without oscillation. In accordance with the general rule for current feedback amplifiers, increased load capacitance requires the use of a higher feedback resistor for stable operation. Bandwidth up to 380 MHz, low differential gain and phase errors, and high output current make the AD8024 an efficient video amplifier. The AD8024’s wide phase margin and high output current make it an excellent choice when driving any capacitive load. Choice of Feedback Resistor Because it is a current feedback amplifier, the closed-loop bandwidth of the AD8024 may be customized with the feedback resistor. Due to the high open-loop transresistance and low inverting input current of the AD8024, large feedback resistors do not create large closed-loop gain errors. In addition, the high output current allows rapid voltage slewing on large load capacitors. For wide bandwidth and clean pulse response, an additional small series output resistor of about 10 Ω is recommended. RF A larger feedback resistor reduces peaking and increases the phase margin at the expense of reduced bandwidth. A smaller feedback resistor increases bandwidth at the expense of increased peaking and reduced phase margin. +VS 0.1F RG – AD8024 The closed-loop bandwidth is affected by attenuation due to the finite output resistance. The open-loop output resistance of ≈6 Ω reduces the bandwidth somewhat when driving load resistors less than ≈150 Ω. The bandwidth will be ≈10% greater for load resistance above a few hundred ohms. 1.0F VIN + RS VO 1.0F CL 0.1F RT –VS Figure 31. Circuit for Driving a Capacitive Load The value of the feedback resistor is not critical unless maintaining the widest or flattest frequency response is desired. Table I shows the bandwidth at different supply voltages for some useful closedloop gains when driving a 150 Ω load. The recommended resistors are for the widest bandwidth with less than 2 dB peaking. 1V 20nS VIN Table I. –3 dB Bandwidth vs. Closed-Loop Gain Resistor, RL = 150 VS – Volts ± 7.5 ± 12 ± 2.5 REV. B Gain +1 +2 +10 –1 +1 +10 –1 +2 RF – 5000 750 400 750 8000 215 750 1125 VOUT BW – MHz 350 275 105 165 380 150 95 125 2V Figure 32. Pulse Response Driving a Large Load Capacitance, CL = 300 pF, G = 3, RFB = 2.32 kΩ, RS = 10.5 Ω, RL = 1 kΩ, VS = ± 7.5 V –9– AD8024 Overload Recovery Disable Mode Operation The most important overload conditions are: When the Disable pin is tied to DGND, all amplifiers are operational, in the enabled state. Input Common-Mode Voltage Overdrive Output Voltage Overdrive Input Current Overdrive. When the voltage on the Disable pin is raised to 1.6 V or more above DGND, all amplifiers are in the disabled, powered-down state. In this condition, the DISABLE pin sources approximately 0.1 µA, the total quiescent current is reduced to approximately 500 µA, all outputs are in a high impedance state, and there is a high level of isolation from inputs to outputs. When configured for a low closed-loop gain, the AD8024 recovers quickly from an input common-mode voltage overdrive; typically in <25 ns. When configured for a higher gain and overloaded at the output, recovery from an output voltage overdrive is also short; approximately 55 ns (see Figure 33). For higher overdrive, the response is somewhat slower. For 100% overdrive, the recovery time is substantially longer. When configured for a high noninverting gain, a high input overdrive can result in a large current into the input stage. Although this current is internally limited to approximately 30 mA, its effect on the total power dissipation may be significant. See also the warning under Maximum Power Dissipation. The output impedance in the disabled mode is the equivalent of all external resistors, seen from the output pin, in parallel with the total disabled output impedance of the amplifier, typically 20 pF. The input stages of the AD8024 include protection from large differential input voltages that may be present in the disabled mode. Internal clamps limit this voltage to 1.5 V. The high inputto-output isolation is maintained for voltages below this limit. 50ns 1V VIN VOUT 5V Figure 33. 15% Overload Recovery, Gain = 10 (RFB = 400 Ω, RL = 1 kΩ, VS = ± 7.5 V) –10– REV. B AD8024 OUTLINE DIMENSIONS Dimensions shown in inches and (mm). 0.3937 (10.00) 0.3859 (9.80) 0.1574 (4.00) 0.1497 (3.80) PIN 1 16 9 1 8 0.050 (1.27) BSC 0.0688 (1.75) 0.0532 (1.35) 0.0196 (0.50) 45 0.0099 (0.25) 8 0.0192 (0.49) SEATING 0 0.0500 (1.27) 0.0099 (0.25) PLANE 0.0138 (0.35) 0.0160 (0.41) 0.0075 (0.19) PRINTED IN U.S.A. 0.0098 (0.25) 0.0040 (0.10) 0.2440 (6.20) 0.2284 (5.80) C01054–0–6/00 (rev. B) 16-Lead Plastic SOIC (R-16A) REV. B –11–