AD AD818AR

a
Low Cost, Low Power
Video Op Amp
AD818
FEATURES
Low Cost
Excellent Video Performance
55 MHz 0.1 dB Bandwidth (Gain = +2)
0.01% & 0.05ⴗ Differential Gain & Phase Errors
High Speed
130 MHz Bandwidth (3 dB, G = +2)
100 MHz Bandwidth (3 dB, G+ = –1)
500 V/␮s Slew Rate
80 ns Settling Time to 0.01% (VO = 10 V Step)
High Output Drive Capability
50 mA Minimum Output Current
Ideal for Driving Back Terminated Cables
Flexible Power Supply
Specified for Single (+5 V) and Dual (ⴞ5 V to ⴞ15 V)
Power Supplies
Low Power: 7.5 mA max Supply Current
Available in 8-Lead SOIC and 8-Lead Plastic Mini-DIP
CONNECTION DIAGRAMS
8-Lead Plastic Mini-DIP (N), and
SOIC (R) Packages
8
NULL
2
7
+VS
+IN
3
6
OUTPUT
–V S
4
5
NC
NULL
1
–IN
AD818
TOP VIEW
NC = NO CONNECT
PRODUCT DESCRIPTION
and 500 V/µs slew rate make the AD818 useful in many high
speed applications including: video monitors, CATV, color
copiers, image scanners and fax machines.
The AD818 is a low cost, video op amp optimized for use in
video applications which require gains equal to or greater than
+2 or –1. The AD818 low differential gain and phase errors,
single supply functionality, low power and high output drive
make it ideal for cable driving applications such as video cameras and professional video equipment.
The AD818 is fully specified for operation with a single +5 V
power supply and with dual supplies from ± 5 V to ± 15 V. This
power supply flexibility, coupled with a very low supply current
of 7.5 mA and excellent ac characteristics under all power
supply conditions, make the AD818 the ideal choice for many
demanding yet power sensitive applications.
With video specs like 0.1 dB flatness to 55 MHz and low differential gain and phase errors of 0.01% and 0.05°, along with
50 mA of output current, the AD818 is an excellent choice for
any video application. The 130 MHz 3 dB bandwidth (G = +2)
The AD818 is a voltage feedback op amp and excels as a gain
stage in high speed and video systems (gain = >2 or –1). It
achieves a settling time of 45 ns to 0.1%, with a low input offset
voltage of 2 mV max.
0.02
0.01µF
2.2µF
DIFF GAIN
VIN
Rbt
75Ω
3
6
AD818
2
4
0.1µF
A
0.01
75Ω
Rt
75 Ω
2.2µF
–15V
1kΩ
1k Ω
DIFFERENTIAL PHASE – Degrees
7
0.00
0.06
0.05
DIFFERENTIAL GAIN – Percent
The AD818 is available in low cost, small 8-lead plastic miniDIP and SOIC packages.
+15V
DIFF PHASE
0.04
0.03
5
10
15
SUPPLY VOLTAGE – ±Volts
AD818 Video Line Driver
AD818 Differential Gain and Phase vs. Supply
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
World Wide Web Site: http://www.analog.com
Fax: 781/326-8703
© Analog Devices, Inc., 2000
REV. B
AD818–SPECIFICATIONS
(@ TA = +25ⴗC, unless otherwise noted)
Parameter
Conditions
VS
Min
DYNAMIC PERFORMANCE
–3 dB Bandwidth
Gain = +2
±5 V
± 15 V
0, +5 V
±5 V
± 15 V
0, +5 V
±5 V
± 15 V
0, +5 V
±5 V
± 15 V
0, +5 V
70
100
40
50
70
30
20
40
10
18
40
10
Gain = –1
Bandwidth for 0.1 dB Flatness
Gain = +2
CC = 2 pF
Gain = –1
CC = 2 pF
Full Power Bandwidth 1
Slew Rate
Settling Time to 0.1%
VOUT = 5 V p-p
RLOAD = 500 Ω
VOUT = 20 V p-p
RLOAD = 1 kΩ
RLOAD = 1 kΩ
Gain = –1
±5 V
Total Harmonic Distortion
Differential Gain Error
(RL = 150 Ω)
–2.5 V to +2.5 V
0 V–10 V Step, A V = –1
–2.5 V to +2.5 V
0 V–10 V Step, A V = –1
FC = 1 MHz
NTSC
Gain = +2
Differential Phase Error
(RL = 150 Ω)
NTSC
Gain = +2
to 0.01%
± 15 V
±5 V
± 15 V
0, +5 V
±5 V
± 15 V
±5 V
± 15 V
± 15 V
± 15 V
±5 V
0, +5 V
± 15 V
±5 V
0, +5 V
350
450
250
Cap Load Drive
± 5 V to ± 15 V
INPUT OFFSET VOLTAGE
AD818A
Typ
Max
95
130
55
70
100
50
43
55
18
34
72
19
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
25.5
MHz
8.0
400
500
300
45
45
80
80
63
0.005
0.01
0.08
0.045
0.06
0.1
10
MHz
V/µs
V/µs
V/µs
ns
ns
ns
ns
dB
%
%
%
Degrees
Degrees
Degrees
pF
0.5
TMIN to TMAX
Offset Drift
0.09
0.09
2
3
mV
mV
µV/°C
± 5 V, ± 15 V
3.3
6.6
10
4.4
nA
nA
nA/°C
± 5 V, ± 15 V
25
300
500
nA
nA
nA/°C
TMIN
TMAX
INPUT OFFSET CURRENT
TMIN to TMAX
Offset Current Drift
0.3
VOUT = ± 2.5 V
RLOAD = 500 Ω
TMIN to TMAX
RLOAD = 150 Ω
VOUT = ± 10 V
RLOAD = 1 kΩ
TMIN to TMAX
VOUT = ± 7.5 V
RLOAD = 150 Ω
(50 mA Output)
±5 V
COMMON-MODE REJECTION
VCM = ± 2.5 V
VCM = ± 12 V
TMIN to TMAX
±5 V
± 15 V
± 15 V
POWER SUPPLY REJECTION
VS = ± 5 V to ± 15 V
TMIN to TMAX
INPUT VOLTAGE NOISE
f = 10 kHz
INPUT CURRENT NOISE
f = 10 kHz
OPEN-LOOP GAIN
0.01
0.02
10
INPUT BIAS CURRENT
3
2
2
5
6
3
9
V/mV
V/mV
3
5
V/mV
82
86
84
100
120
100
dB
dB
dB
80
80
90
dB
dB
± 5 V, ± 15 V
10
nV/√Hz
± 5 V, ± 15 V
1.5
pA/√Hz
± 15 V
± 15 V
–2–
Units
4
V/mV
V/mV
V/mV
REV. B
AD818
VS
Min
AD818A
Typ
±5 V
+3.8
–2.7
+13
–12
+3.8
+1.2
+4.3
–3.4
+14.3
–13.4
+4.3
+0.9
V
V
V
V
V
V
3.3
3.2
13.3
12.8
+1.5,
+3.5
50
50
30
3.8
3.6
13.7
13.4
±V
±V
±V
±V
90
V
mA
mA
mA
mA
INPUT RESISTANCE
300
kΩ
INPUT CAPACITANCE
1.5
pF
8
Ω
Parameter
Conditions
INPUT COMMON-MODE VOLTAGE
RANGE
± 15 V
0, +5 V
RLOAD = 500 Ω
RLOAD = 150 Ω
RLOAD = 1 kΩ
RLOAD = 500 Ω
RLOAD = 500 Ω
OUTPUT VOLTAGE SWING
±5 V
±5 V
± 15 V
± 15 V
0, +5 V
± 15 V
±5 V
0, +5 V
± 15 V
Output Current
Short-Circuit Current
OUTPUT RESISTANCE
Open Loop
POWER SUPPLY
Operating Range
Dual Supply
Single Supply
±5 V
±5 V
± 15 V
± 15 V
Quiescent Current
TMIN to TMAX
TMIN to TMAX
NOTE
1
Full power bandwidth = slew rate/2 π VPEAK.
Specifications subject to change without notice.
MAXIMUM POWER DISSIPATION – Watts
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 18 V
Internal Power Dissipation2
Plastic (N) . . . . . . . . . . . . . . . . . . . . . . See Derating Curves
Small Outline (R) . . . . . . . . . . . . . . . . . See Derating Curves
Input Voltage (Common Mode) . . . . . . . . . . . . . . . . . . . . ± VS
Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . ± 6 V
Output Short Circuit Duration . . . . . . . . See Derating Curves
Storage Temperature Range (N, R) . . . . . . . –65°C to +125°C
Operating Temperature Range . . . . . . . . . . . –40°C to +85°C
Lead Temperature Range (Soldering 10 seconds) . . . . +300°C
7.0
± 18
+36
7.5
7.5
7.5
7.5
V
V
mA
mA
mA
mA
Temperature
Range
Package
Description
AD818AN
–40°C to +85°C
AD818AR
–40°C to +85°C
8-Lead
Plastic DIP
8-Lead
Plastic SOIC
13" Tape & Reel
7" Tape & Reel
1.5
1.0
0.5
8-LEAD SOIC PACKAGE
0 +10 +20 +30 +40 +50 +60 +70 +80 +90
AMBIENT TEMPERATURE – °C
Maximum Power Dissipation vs. Temperature for Different Package Types
ESD SUSCEPTIBILITY
ORDERING GUIDE
Model
TJ = 150°C
8-LEAD MINI-DIP PACKAGE
0
–50 –40 –30 –20 –10
NOTES
1
Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the
device at these or any other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability.
2
Specification is for device in free air: 8-lead plastic package, θJA = 90°C/W; 8-lead
SOIC package, θJA = 155°C/W.
REV. B
7.0
Units
2.0
ABSOLUTE MAXIMUM RATINGS 1
AD818AR-REEL –40°C to +85°C
AD818AR-REEL7 –40°C to +85°C
± 2.5
+5
Max
ESD (electrostatic discharge) sensitive device. Electrostatic
charges as high as 4000 volts, which readily accumulate on the
human body and on test equipment, can discharge without detection. Although the AD818 features proprietary ESD protection circuitry, permanent damage may still occur on these
devices if they are subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended
to avoid any performance degradation or loss of functionality.
Package
Option
N-8
SO-8
SO-8
SO-8
–3–
AD818 –Typical Characteristics
METALIZATION PHOTOGRAPH
20
600
15
500
SLEW RATE – V/µs
INPUT COMMON-MODE RANGE – ± Volts
Dimensions shown in inches and (mm).
+VCM
10
–VCM
400
300
5
200
0
0
5
10
15
20
0
5
SUPPLY VOLTAGE – ±Volts
20
Figure 3. Slew Rate vs. Supply Voltage
Figure 1. Common-Mode Voltage Range vs. Supply
20
OUTPUT VOLTAGE SWING – ±Volts
30
OUTPUT VOLTAGE SWING – Volts p-p
15
10
SUPPLY VOLTAGE – ±Volts
25
VS = ±15V
20
15
10
VS = ±5V
5
0
15
RL = 500 Ω
10
RL = 150 Ω
5
0
10
100
1k
10k
0
LOAD RESISTANCE – Ω
5
10
15
20
SUPPLY VOLTAGE – ±Volts
Figure 2. Output Voltage Swing vs. Load Resistance
Figure 4. Output Voltage Swing vs. Supply
–4–
REV. B
AD818
70
QUIESCENT SUPPLY CURRENT – mA
8.0
95
+85°C
+25°C
7.0
-40°C
6.5
5
15
10
85
50
75
GAIN/BANDWIDTH
40
30
–60
6.0
0
60
20
65
–40
–20
0
20
40
60
80
TEMPERATURE – °C
SUPPLY VOLTAGE – ±Volts
120
55
140
Figure 8. –3 dB Bandwidth and Phase Margin vs.
Temperature. Gain = +2
Figure 5. Quiescent Supply Current vs. Supply Voltage
9
100
CLOSED-LOOP OUTPUT IMPEDANCE – Ohms
100
±15V
OPEN-LOOP GAIN – V/mV
8
10
1
0.1
7
±5V
6
5
4
3
100
0.01
1k
10k
100k
1M
10M
100M
1k
FREQUENCY – Hz
Figure 9. Open-Loop Gain vs. Load Resistance
Figure 6. Closed-Loop Output Impedance vs. Frequency
130
7
SHORT CIRCUIT CURRENT – mA
INPUT BIAS CURRENT – µA
6
5
4
3
2
1
–60
–40
–20
0
20
40
60
80
100
120
110
SOURCE CURRENT
90
SINK CURRENT
70
50
30
–60
140
TEMPERATURE – °C
–40
–20
0
20
40
60
80
100
120
140
TEMPERATURE – °C
Figure 7. Input Bias Current vs. Temperature
REV. B
10k
LOAD RESISTANCE – Ohms
Figure 10. Short Circuit Current vs. Temperature
–5–
–3dB BANDWIDTH – MHz
PHASE MARGIN – Degrees
PHASE MARGIN
7.5
AD818–Typical Characteristics
100
10
+100
PHASE ±5V OR
±15V SUPPLIES
60
+60
+40
40
±5V SUPPLIES
RL = 1k Ω
+20
20
0
OUTPUT SWING FROM 0 TO ±V
±15V SUPPLIES
RL = 1k Ω
PHASE MARGIN – Degrees
OPEN-LOOP GAIN – dB
8
+80
80
6
4
1%
0.1%
0.01%
1%
0.1%
0.01%
2
0
–2
–4
–6
0
–8
–10
–20
1k
10k
100k
1M
10M
FREQUENCY – Hz
100M
0
1G
Figure 11. Open-Loop Gain and Phase Margin vs.
Frequency
40
60
80
100
SETTLING TIME – ns
120
140
160
Figure 14. Output Swing and Error vs. Settling Time
50
100
INPUT VOLTAGE NOISE – nV/ Hz
90
80
+SUPPLY
70
PSR – dB
20
60
50
–SUPPLY
40
30
40
30
20
10
20
10
100
0
1k
10k
100k
1M
10M
1
100M
FREQUENCY – Hz
Figure 12. Power Supply Rejection vs. Frequency
100
1k
10k
FREQUENCY – Hz
100k
1M
10M
Figure 15. Input Voltage Noise Spectral Density vs.
Frequency
120
OUTPUT VOLTAGE – Volts p-p
30
100
CMR – dB
10
80
60
40
1k
10k
100k
FREQUENCY – Hz
1M
RL = 1k Ω
20
RL = 150 Ω
10
0
100k
10M
1M
10M
FREQUENCY – Hz
100M
Figure 16. Output Voltage vs. Frequency
Figure 13. Common-Mode Rejection vs. Frequency
–6–
REV. B
AD818
–40
CC
–50
HARMONIC DISTORTION – dB
10
RL = 150Ω
2V p-p
VS
9
GAIN – dB
–60
2nd HARMONIC
0.1dB
Flatness
1k
1k
ⴞ15V 2pF 55 MHz
ⴞ5V 1pF 43 MHz
+5V 1pF 18 MHz
8
–70
CC
VOUT
AD818
VIN
150
7
6
5
–80
3rd HARMONIC
ⴞ15V
ⴞ5V
4
3
–90
+5V
2
–100
100
1k
10k
100k
1M
1
1M
10M
10M
100M
FREQUENCY – Hz
FREQUENCY – Hz
Figure 20. Closed-Loop Gain vs. Frequency (G = +2)
Figure 17. Harmonic Distortion vs. Frequency
650
10
8
6
550
GAIN – dB
4
SLEW RATE – V/µs
1G
450
2pF
VS
0.1dB
FLATNESS
±15V 72 MHz
±5V 34 MHz
+5V 19 MHz
1k
VIN
1k
VOUT
AD818
150
2
0
±15V
–2
–4
350
+5V
–6
±5V
–8
250
–60
–40
–20
0
20
40
60
80
TEMPERATURE – °C
100
120
–10
140
1M
Figure 18. Slew Rate vs. Temperature
0.00
0.05
DIFFERENTIAL GAIN – Percent
DIFFERENTIAL PHASE – Degrees
0.01
0.06
DIFF PHASE
0.04
0.03
5
10
SUPPLY VOLTAGE – ±Volts
15
Figure 19. Differential Gain and Phase vs. Supply Voltage
REV. B
1G
Figure 21. Closed-Loop Gain vs. Frequency (G = –1)
0.02
DIFF GAIN
10M
100M
FREQUENCY – Hz
–7–
AD818–Typical Characteristics
CF
AAA
AA
AAA
A A
A
A
AAAA
A
AAA
A
AA
A
AAA
A
AA
AAA
A
A
AA
AAA
A
AAA
A
AA
1k Ω
5V
+VS
3.3µF
50ns
100
90
0.01µF
HP
VIN
PULSE (LS)
OR FUNCTION
(SS)
GENERATOR
1k Ω
7
2
50 Ω
AD818
6
VOUT
3
TEKTRONIX
P6201 FET
PROBE
TEKTRONIX
7A24
PREAMP
10
4
0.01µF
0%
RL
5V
3.3µF
–VS
Figure 22. Inverting Amplifier Connection
AA
A
AA
AA
A
A
AA
A
AAAAAA
AAAAA
AAA
A
A A
A
A
AAAA AAA
AA
2V
Figure 25. Inverter Large Signal Pulse Response ± 15 VS,
CF = 1 pF, RL = 1 kΩ
AAA
A
AA
AA
A
A
A
A
AA
A
AAA
A
A
A
A
AA
AAA
A
AA
A
AA
A
AAA
A AA
AAA
AAA
50ns
200mV
100
100
90
90
10
10
0%
0%
200mV
2V
Figure 23. Inverter Large Signal Pulse Response ± 5 VS,
CF = 1 pF, RL = 1 kΩ
AAAAA
AA
A
AA
AAAA
A
AA
A
AA
A
AAAA
AA
A
AAA
AA
A
A
AAAA AAA
AAAA AAAA
AA
200mV
Figure 26. Inverter Small Signal Pulse Response ± 15 VS,
CF = 1 pF, RL = 150 Ω
AAA
A
AA
A
AA
A
A
A
A
A
AA
A
AAA
AAA
AA
A
AA
A
AA
AA
A
AAA
A
AA
A
AAA
A
AAA
A
AA
AA
200mV
10ns
10ns
100
100
90
90
10
10
0%
0%
200mV
200mV
Figure 24. Inverter Small Signal Pulse Response ± 5 VS,
CF = 1 pF, RL = 150 Ω
10ns
Figure 27. Inverter Small Signal Pulse Response ± 5 VS,
CF = 0 pF, RL = 150 Ω
–8–
REV. B
AD818
CF
1k Ω
1k Ω
AAAA
A
A
AAA
A
AA
A
AAA
AA
AA
A
AAA
A
AA
AA
A
AA
AAA
A
AAA
A
AAA
AA
A A
AAA
AA
5V
+VS
3.3µF
50ns
100
90
0.01µF
2
HP
VIN
PULSE (LS)
OR FUNCTION
(SS)
GENERATOR
7
AD818
100 Ω
3
6
VOUT
TEKTRONIX
P6201 FET
PROBE
TEKTRONIX
7A24
PREAMP
4
10
0.01µF
0%
50Ω
RL
5V
3.3µF
–VS
Figure 28. Noninverting Amplifier Connection
Figure 31. Noninverting Large Signal Pulse Response
± 15 V, CF = 1 pF, RL = 1 kΩ
AAAA
A
AAAA
A
AAAA
AA
A
A
AA
AAAA
AAA
A
AA
AAA
A
AA
AAAA AAAAAA
AA
2V
AAAA
A
A
AAA
A
A
AAAA
AA
A
AA
A
A
AA
AAA
A
AA
AA
A
AA
A
AAA
A
AA
A
AA
A
AAA
A AA
AAA
A
A
AA
50ns
100mV
100
100
90
90
10
10
0%
0%
200mV
2V
Figure 29. Noninverting Large Signal Pulse Response
± 5 V, CF = 1 pF, RL = 1 kΩ
Figure 32. Noninverting Small Signal Pulse Response
± 15 V, CF = 1 pF, RL = 150 Ω
A AA
AA
AAA
AA
A
AAA
AA
AA
A
AAA
AA
AA
A
A
AAA
AAA
A
AAA
A
AAA
A
AA
AA
A
AA
AAAAA
AA
A
AAA
AA
AAA
AAA
AAAA
AAA
A AAAAA
AAA
100mV
10ns
100mV
100
10ns
100
90
90
10
10
0%
0%
200mV
200mV
Figure 33. Noninverting Small Signal Pulse Response
± 5 V, CF = 0 pF, RL = 150 Ω
Figure 30. Noninverting Small Signal Pulse Response
± 5 V, CF = 1 pF, RL = 150 Ω
REV. B
10ns
–9–
AD818
may result in peaking. A small capacitance (1–5 pF) may be
used in parallel with the feedback resistor to neutralize this
effect.
+VS
Power supply leads should be bypassed to ground as close as
possible to the amplifier pins. Ceramic disc capacitors of
0.1 µF are recommended.
OUTPUT
–IN
+VS
7
2
+IN
AD818
1
4
10k⍀
–VS
NULL 1
Figure 35. Offset Null Configuration
Figure 34. AD818 Simplified Schematic
OFFSET NULLING
THEORY OF OPERATION
The AD818 is a low cost, video operational amplifier designed
to excel in high performance, high output current video
applications.
The AD818 (Figure 34) consists of a degenerated NPN differential pair driving matched PNPs in a folded-cascode gain stage.
The output buffer stage employs emitter followers in a class AB
amplifier which delivers the necessary current to the load, while
maintaining low levels of distortion.
INPUT CONSIDERATIONS
An input protection resistor (RIN in Figure 28) is required in
circuits where the input to the AD818 will be subjected to transient of continuous overload voltages exceeding the ± 6 V maximum differential limit. This resistor provides protection for the
input transistors by limiting their maximum base current.
For high performance circuits, it is recommended that a “balancing” resistor be used to reduce the offset errors caused by
bias current flowing through the input and feedback resistors.
The balancing resistor equals the parallel combination of RIN
and RF and thus provides a matched impedance at each input
terminal. The offset voltage error will then be reduced by more
than an order of magnitude.
VOS ADJUST
–VS
NULL 8
The AD818 will drive terminated cables and capacitive loads of
10 pF or less. As the closed-loop gain is increased, the AD818
will drive heavier cap loads without oscillating.
6
8
3
The input offset voltage of the AD818 is inherently very low.
However, if additional nulling is required, the circuit shown in
Figure 35 can be used. The null range of the AD818 in this
configuration is ± 10 mV.
SINGLE SUPPLY OPERATION
Another exciting feature of the AD818 is its ability to perform
well in a single supply configuration. The AD818 is ideally
suited for applications that require low power dissipation and
high output current.
Referring to Figure 36, careful consideration should be given to
the proper selection of component values. The choices for
this particular circuit are: R1 + R3储R2 combine with C1 to
form a low frequency corner of approximately 10 kHz. C4 was
inserted in series with R4 to maintain amplifier stability at high
frequency.
Combining R3 with C2 forms a low pass filter with a corner
frequency of approximately 500 Hz. This is needed to maintain
amplifier PSRR, since the supply is connected to VIN through
the input divider. The values for R2 and C2 were chosen to
demonstrate the AD818’s exceptional output drive capability. In
this configuration, the output is centered around 2.5 V. In order
to eliminate the static dc current associated with this level, C3
was inserted in series with RL.
+VS
GROUNDING AND BYPASSING
R3
100⍀
When designing high frequency circuits, some special precautions are in order. Circuits must be built with short interconnect
leads. When wiring components, care should be taken to provide a low resistance, low inductance path to ground. Sockets
should be avoided, since their increased interlead capacitance
can degrade circuit bandwidth.
C2
3.3␮F
R4
1k⍀
1k⍀
3.3␮F
SELECT C1, R1, R2
FOR DESIRED LOW
FREQUENCY CORNER.
C4
0.001␮F
0.01␮F
R1
3.3k⍀
2
C1
0.01␮F
AD818
VIN
Feedback resistors should be of low enough value (≤1 kΩ) to
assure that the time constant formed with the inherent stray
capacitance at the amplifier’s summing junction will not limit
performance. This parasitic capacitance, along with the parallel
resistance of RF/RIN, form a pole in the loop transmission which
7
3
R2
3.3k⍀
4
6
VOUT
RL
150⍀
C3
0.1␮F
Figure 36. Single Supply Amplifier Configuration
–10–
REV. B
AD818
5
3
2×
HP2835
ERROR
SIGNAL
OUTPUT
1M Ω
2×
HP2835
ERROR AMPLIFIER
VERROR OUTPUT × 10
6
4
2
SHORT, DIRECT
CONNECTION TO
TEKTRONIX TYPE 11402
OSCILLOSCOPE PREAMP
INPUT SECTION
100Ω
AD829
0.47µF
7
15pF
0.01µF
0 TO ±10V
POWER
SUPPLY
7, 8
1k Ω
50Ω
COAX
CABLE
13
1, 14
FALSE
SUMMING
NODE
NULL
ADJUST
2
TTL LEVEL
SIGNAL
GENERATOR
50Hz
OUTPUT
100Ω
1.9k Ω
1kΩ
500Ω
AD818
DEVICE
UNDER
TEST
6
10pF
SCOPE PROBE
CAPACITANCE
4
3
7
0.01µF
SETTLING
OUTPUT
TEKTRONIX P6201
FET PROBE TO
TEKTRONIX TYPE 11402
OSCILLOSCOPE
PREAMP INPUT SECTION
0.01µF
2.2µF
2.2µF
+VS
NOTE:
USE CIRCUIT BOARD
WITH GROUND PLANE
2
50 Ω
–VS
100 Ω
5–18pF
500Ω
DIGITAL
GROUND
ANALOG
GROUND
0.01µF
0.47µF
EI&S
DL1A05GM
MERCURY
RELAY
–VS
+VS
Figure 37. Settling Time Test Circuit
AD818 SETTLING TIME
DIFFERENTIAL LINE RECEIVER
Settling time is comprised primarily of two regions. The first is
the slew time in which the amplifier is overdriven, where the
output voltage rate of change is at its maximum. The second is
the linear time period required for the amplifier to settle to
within a specified percent of the final value.
The differential receiver circuit of Figure 39 is useful for many
applications from audio to video. It allows extraction of a low
level signal in the presence of common-mode noise. As shown
in Figure 40, the AD818 provides this function with only
10 nV/√Hz noise at the output.
Measuring the rapid settling time of AD818 (45 ns to 0.1% and
80 ns to 0.01%—10 V step) requires applying an input pulse
with a very fast edge and an extremely flat top. With the AD818
configured in a gain of –1, a clamped false summing junction
responds when the output error is within the sum of two diode
voltages (approximately 1 volt). The signal is then amplified 20
times by a clamped amplifier whose output is connected directly
to a sampling oscilloscope.
2pF
1k⍀
1k⍀
+5V
7
2
AD818
DIFFERENTIAL
INPUT
3
0.01␮F
The buffer circuit shown in Figure 38 will drive a back-terminated 75 Ω video line to standard video levels (1 V p-p) with
0.1 dB gain flatness to 55 MHz with only 0.05° and 0.01%
differential phase and gain at the 3.58 MHz NTSC subcarrier
frequency. This level of performance, which meets the requirements for high-definition video displays and test equipment, is
achieved using only 7 mA quiescent current.
1k⍀
AD818
3
AA
A
AAA
AA
AA
AA
AA
A
A
AA
AAA
A
A
A
AA
AAA
AA
A
A
AA
AAA
A
AA
A
AAA
A AA
AAA
A
AA
A
75Ω
6
Rt
75Ω
4
2.2µF
–15V
1k Ω
10n
s
100
2.2µF
Rbt
75 Ω
0.01µF
1k⍀
Figure 39. Differential Line Receiver
90
Rt
75Ω
2.2␮F
2pF
200
V
7
2
OUTPUT
VOUT
–5V
+15V
VIN
6
4
A High Performance Video Line Driver
0.01µF
2.2␮F
0.01␮F
10
1k Ω
20ns
1V
2V
0%
200m
V
Figure 38. Video Line Driver
Figure 40. Performance of Line Receiver, RL = 150 Ω,
G = +2
REV. B
–11–
AD818
A HIGH SPEED, THREE OP AMP IN AMP
OUTLINE DIMENSIONS
The circuit of Figure 41 uses three high speed op amps: two
AD818s and an AD817. This high speed circuit lends itself well
to CCD imaging and other video speed applications. It has the
optional flexibility of both dc and ac trims for common-mode
rejection, plus the ability to adjust for minimum settling time.
+VS
10µF
0.1µF
8-Lead Plastic Mini-DIP (N) Package
8
0.1µF
EACH
AMPLIFIER PIN 7
EACH
AMPLIFIER
1µF
0.1µF
–15V
–VIN
1µF
1
A1
AD818
0.18±0.03
(4.57±0.76)
0.125
(3.18)
MIN
0.018±0.003
(0.46±0.08)
SETTLING
TIME A.C.
CMR ADJUST
1k⍀
1k⍀
RG
2pF
A3
AD817
1k⍀
5pF
0.033
(0.84)
NOM
15°
0°
SEATING
PLANE
0.1968 (5.00)
0.1890 (4.80)
VOUT
RL
2k⍀
3pF
1k⍀
0.10
(2.54)
BSC
0.011±0.003
(0.28±0.08)
8-Lead SOIC (R) Package
1k⍀
5pF
0.30 (7.62)
REF
0.035±0.01
(0.89±0.25)
0.165±0.01
(4.19±0.25)
PIN 4
EACH
AMPLIFIER
2-8 pF
4
0.39 (9.91) MAX
0.1µF
–VS
0.25
(6.35) 0.31
(7.87)
PIN 1
COMMON
10µF
5
C1738–0–5/00 (rev. B) 00872
+15V
Dimensions shown in inches and (mm).
0.1574 (4.00)
0.1497 (3.80)
8
5
1
4
0.2440 (6.20)
0.2284 (5.80)
970⍀
PIN 1
A2
AD818
+VIN
0.0098 (0.25)
0.0040 (0.10)
SEATING
PLANE
BANDWIDTH, SETTLING TIME, & TOTAL HARMONIC DISTORTION VS. GAIN
CADJ
(pF)
GAIN
RG
3
10
100
1k⍀ 2-8
222⍀ 2-8
20⍀ 2-8
0.0196 (0.50)
ⴛ 45ⴗ
0.0099 (0.25)
0.0500 (1.27)
BSC
50⍀
D.C. CMR
ADJUST
SMALL
SIGNAL
BANDWIDTH
SETTLING
TIME
TO 0.1%
THD + NOISE
BELOW INPUT LEVEL
@ 10kHz
14.7 MHz
4.5 MHz
960 kHz
200ns
370ns
2.5µs
82 dB
81 dB
71 dB
0.0688 (1.75)
0.0532 (1.35)
0.0192 (0.49)
0.0138 (0.35)
8ⴗ
0.0500 (1.27)
0.0098 (0.25) 0ⴗ
0.0160 (0.41)
0.0075 (0.19)
PRINTED IN U.S.A.
Figure 41. High Speed 3 Op Amp In Amp
–12–
REV. B