Order this document by MC3423/D OVERVOLTAGE SENSING CIRCUIT This overvoltage protection circuit (OVP) protects sensitive electronic circuitry from overvoltage transients or regulator failures when used in conjunction with an external “crowbar” SCR. The device senses the overvoltage condition and quickly “crowbars” or short circuits the supply, forcing the supply into current limiting or opening the fuse or circuit breaker. The protection voltage threshold is adjustable and the MC3423 can be programmed for minimum duration of overvoltage condition before tripping, thus supplying noise immunity. The MC3423 is essentially a “two terminal” system, therefore it can be used with either positive or negative supplies. SEMICONDUCTOR TECHNICAL DATA P1 SUFFIX PLASTIC PACKAGE CASE 626 8 MAXIMUM RATINGS 1 Rating Symbol Value Unit VCC–VEE 40 Vdc Sense Voltage (1) VSense1 6.5 Vdc Sense Voltage (2) VSense2 6.5 Vdc Vact 7.0 Vdc Output Current IO 300 mA Operating Ambient Temperature Range TA 0 to +70 °C Operating Junction Temperature TJ 125 °C Tstg –65 to +150 °C Differential Power Supply Voltage Remote Activation Input Voltage Storage Temperature Range D SUFFIX PLASTIC PACKAGE CASE 751 (SOP–8) 8 1 PIN CONNECTIONS Simplified Application Vout Vin Current Limited DC Power Supply VCC 1 8 Drive Output Sense 1 2 7 VEE Sense 2 3 6 Indicator Output Current 4 Source 5 Remote Activation (Top View) + Cout O. V. P. MC3423 ORDERING INFORMATION Device MC3423D MC3423P1 Operating Temperature Range TA = 0° to +70°C Motorola, Inc. 1996 MOTOROLA ANALOG IC DEVICE DATA Package SO–8 Plastic DIP Rev 1 1 MC3423 ELECTRICAL CHARACTERISTICS (5.0 V ≤ VCC – VEE ≤ 36 V, Tlow < TA , Thigh, unless otherwise noted.) Characteristics Symbol Min Typ Max Unit VCC–VEE 4.5 – 40 Vdc VO VCC–2.2 VCC–1.8 – Vdc Indicator Output Voltage (IO(Ind) = 1.6 mA) VOL(Ind) – 0.1 0.4 Vdc Sense Trip Voltage (TA = 25°C) VSense1, VSense2 2.45 2.6 2.75 Vdc TCVS1 – 0.06 – %/°C IIH IIL – – 5.0 –120 40 –180 ISource 0.1 0.2 0.3 mA Output Current Risetime (TA = 25°C) tr – 400 – mA/µs Propagation Delay Time (TA = 25°C) tpd – 0.5 – µs Supply Current ID – 6.0 10 mA Supply Voltage Range Output Voltage (IO = 100 mA) Temperature Coefficient of VSense1 (Figure 2) µA Remote Activation Input Current (VIH = 2.0 V, VCC – VEE = 5.0 V) (VIL = 0.8 V, VCC – VEE = 5.0 V) Source Current NOTES: Tlow to Thigh = 0° to +70°C Figure 1. Representative Block Diagram VCC 1 ISource 2 Sense 1 Vref 2.6V 4 Current Source – + + – 8 + Output – 7 VEE 3 Sense 2 5 6 Remote Activation Indicator Output Figure 2. Sense Voltage Test Circuit VCC 1 Switch 1 (A) 2 3 (B) Switch 2 VI 2 8 MC3423 4 7 5 Switch 1 Switch 2 VSense 1 Position A Closed VSense 2 Position B Open V Ramp VI until output goes high; this is the VSense threshold. MOTOROLA ANALOG IC DEVICE DATA MC3423 Figure 3. Basic Circuit Configuration * ǒ Ǔ ǒ Ǔ + F1 (+ Sense Lead) Vtrip R1 1 Power Supply R2 R2 ≤ 10 kΩ for minimum drift 8 2 3 MC3423 4 7 5 + Vref 1 ) R1 [ 2.6 V 1 ) R1 R2 R2 To Load RG For minimum value of RG, see Figure 9. *See text for explanation. S1* (– Sense Lead) – Figure 4. Circuit Configuration for Supply Voltage Above 36 V + RS C1 > (R1 + R2) 10µF R1R2 (+ Sense Lead) RS Q1 1 8 Power Supply 1N4740 10V MC3423 + To Load 2 VS 3 4 10µF 15V 7 5 ǒ Ǔ ǒ Ǔ ǒ Ǔ + VS 25– 10 kW Vtrip + Vref 1 ) R1 [ 2.6 V 1 ) R1 R2 R2 RS R1 C1 *R2 (– Sense Lead) *R2 ≤ 10 kΩ Q1: Q1: Q1: Q1: Q1: Q1: VS ≤ 50 V; 2N6504 or equivalent VS ≤ 100 V; 2N6505 or equivalent VS ≤ 200 V; 2N6506 or equivalent VS ≤ 400 V; 2N6507 or equivalent VS ≤ 600 V; 2N6508 or equivalent VS ≤ 800 V; 2N6509 or equivalent – Figure 5. Basic Configuration for Programmable Duration of Overvoltage Condition Before Trip VCC Vtrip +VCC 0 R3 R1 1 6 2 Power Supply MC3423 4 R2 VC 3 V10 Indication 8 Out RG Vref VC 0 5 7 C VO VO 0 td VIO R3 ≥ Vtrip 10 mA MOTOROLA ANALOG IC DEVICE DATA Vref td = × C ≈ [12 × 103] C Isource (See Figure 10) 3 MC3423 APPLICATION INFORMATION Basic Circuit Configuration The basic circuit configuration of the MC3423 OVP is shown in Figure 3 for supply voltages from 4.5 V to 36 V, and in Figure 4 for trip voltages above 36 V. The threshold or trip voltage at which the MC3423 will trigger and supply gate drive to the crowbar SCR, Q1, is determined by the selection of R1 and R2. Their values can be determined by the equation given in Figures 3 and 4, or by the graph shown in Figure 8. The minimum value of the gate current limiting resistor, RG, is given in Figure 9. Using this value of RG, the SCR, Q1, will receive the greatest gate current possible without damaging the MC3423. If lower output currents are required, RG can be increased in value. The switch, S1, shown in Figure 3 may be used to reset the crowbar. Otherwise, the power supply, across which the SCR is connected, must be shut down to reset the crowbar. If a non current–limited supply is used, a fuse or circuit breaker, F1, should be used to protect the SCR and/or the load. The circuit configurations shown in Figures 3 and 4 will have a typical propogation delay of 1.0 µs. If faster operation is desired, Pin 3 may be connected to Pin 2 with Pin 4 left floating. This will result in decreasing the propogation delay to approximately 0.5 µs at the expense of a slightly increased TC for the trip voltage value. Configuration for Programmable Minimum Duration of Overvoltage Condition Before Tripping In many instances, the MC3423 OVP will be used in a noise environment. To prevent false tripping of the OVP circuit by noise which would not normally harm the load, MC3423 has a programmable delay feature. To implement this feature, the circuit configuration of Figure 5 is used. In this configuration, a capacitor is connected from Pin 3 to VEE. The value of this capacitor determines the minimum duration of the overvoltage condition which is necessary to trip the OVP. The value of C can be found from Figure 10. The circuit operates in the following manner: When VCC rises above the trip point set by R1 and R2, an internal current source (Pin 4) begins charging the capacitor, C, connected to Pin 3. If the overvoltage condition disappears before this occurs, the capacitor is discharged at a rate ≅ 10 times faster than the charging rate, resetting the timing feature until the next overvoltage condition occurs. Occasionally, it is desired that immediate crowbarring of the supply occur when a high overvoltage condition occurs, while retaining the false tripping immunity of Figure 5. In this case, the circuit of Figure 6 can be used. The circuit will operate as previously described for small overvoltages, but will immediately trip if the power supply voltage exceeds VZ1 + 1.4 V. 4 Figure 6. Configuration for Programmable Duration of Overvoltage Condition Before Trip/With Immediate Trip at High Overvoltages (+ Sense Lead) + 1 R1 Z1 Power Supply R2 2 MC3423 3 RG 5 4 3 1k 7 C (– Sense Lead) – Additional Features 1. Activation Indication Output An additional output for use as an indicator of OVP activation is provided by the MC3423. This output is an open collector transistor which saturates when the OVP is activated. In addition, it can be used to clock an edge triggered flip–flop whose output inhibits or shuts down the power supply when the OVP trips. This reduces or eliminates the heatsinking requirements for the crowbar SCR. 2. Remote Activation Input Another feature of the MC3423 is its remote activation input, Pin 5. If the voltage on this CMOS/TTL compatible input is held below 0.8 V, the MC3423 operates normally. However, if it is raised to a voltage above 2.0 V, the OVP output is activated independent of whether or not an overvoltage condition is present. It should be noted that Pin 5 has an internal pull–up current source. This feature can be used to accomplish an orderly and sequenced shutdown of system power supplies during a system fault condition. In addition, the activation indication output of one MC3423 can be used to activate another MC3423 if a single transistor inverter is used to interface the former’s indication output to the latter’s remote activation input, as shown in Figure 7. In this circuit, the indication output (Pin 6) of the MC3423 on power supply 1 is used to activate the MC3423 associated with power supply 2. Q1 is any small PNP with adequate voltage rating. MOTOROLA ANALOG IC DEVICE DATA MC3423 Figure 8. R1 versus Trip Voltage Figure 7. Circuit Configuration for Activating One MC3423 from Another 30 + Typ Power Supply #1 6 7 – R1 10k R1, RESISTANCE (k Ω ) 1 20 Min 10 + 1 0 Q1 Power Supply #2 Max R2 = 2.7 k 0 5 5.0 10 15 20 VT, TRIP VOLTAGE (V) 25 30 1.0k 7 – Figure 9. Minimum RG versus Supply Voltage di/dt As the gate region of the SCR is driven on, its area of conduction takes a finite amount of time to grow, starting as a very small region and gradually spreading. Since the anode current flows through this turned–on gate region, very high current densities can occur in the gate region if high anode currents appear quickly (di/dt). This can result in immediate destruction of the SCR or gradual degradation of its forward blocking voltage capabilities – depending on the severity of the occasion. VCC , SUPPLY VOLTAGE (V) Crowbar SCR Considerations Referring to Figure 11, it can be seen that the crowbar SCR, when activated, is subject to a large current surge from the output capacitance, Cout. This capacitance consists of the power supply output caps, the load’s decoupling caps, and in the case of Figure 11A, the supply’s input filter caps. This surge current is illustrated in Figure 12, and can cause SCR failure or degradation by any one of three mechanisms: di/dt, absolute peak surge, or I2t. The interrelationship of these failure methods and the breadth of the applications make specification of the SCR by the semiconductor manufacturer difficult and expensive. Therefore, the designer must empirically determine the SCR and circuit elements which result in reliable and effective OVP operation. However, an understanding of the factors which influence the SCR’s di/dt and surge capabilities simplifies this task. RG(min) = 0 if VCC < 11 V 30 25 20 15 10 0 10 20 30 40 50 60 70 80 RG, GATE CURRENT LIMITING RESISTOR (Ω) Figure 10. Capacitance versus Minimum Overvoltage Duration 1.0 C, CAPACITANCE ( µ F) Note that both supplies have their negative output leads tied together (i.e., both are positive supplies). If their positive leads are common (two negative supplies) the emitter of Q1 would be moved to the positive lead of supply 1 and R1 would therefore have to be resized to deliver the appropriate drive to Q1. 35 1 2 3 57 1 0.1 0.01 0.001 0.0001 0.001 1 5 2 1 0.01 0.1 1.0 10 td, DELAY TIME (ms) MOTOROLA ANALOG IC DEVICE DATA 5 MC3423 will be the case, though this is difficult to guarantee. Of course, a sufficiently high surge will cause an open. These comments also apply to the fuse in Figure 11B. The value of di/dt that an SCR can safely handle is influenced by its construction and the characteristics of the gate drive signal. A center–gate–fire SCR has more di/dt capability than a corner–gate–fire type, and heavily overdriving (3 to 5 times IGT) the SCR gate with a fast < 1.0 µs rise time signal will maximize its di/dt capability. A typical maximum number in phase control SCRs of less than 50 A(RMS) rating might be 200 A/µs, assuming a gate current of five times IGT and < 1.0 µs rise time. If having done this, a di/dt problem is seen to still exist, the designer can also decrease the di/dt of the current waveform by adding inductance in series with the SCR, as shown in Figure 13. Of course, this reduces the circuit’s ability to rapidly reduce the DC bus voltage and a tradeoff must be made between speedy voltage reduction and di/dt. Figure 11. Typical Crowbar OVP Circuit Configurations (11A) Vin Vout DC Power Supply + Cout OV Sense (11B) Vin Vout * DC Power Supply + Cout OV Sense *Needed if supply not current limited Surge Current If the peak current and/or the duration of the surge is excessive, immediate destruction due to device overheating will result. The surge capability of the SCR is directly proportional to its die area. If the surge current cannot be reduced (by adding series resistance – see Figure 13) to a safe level which is consistent with the systems requirements for speedy bus voltage reduction, the designer must use a higher current SCR. This may result in the average current capability of the SCR exceeding the steady state current requirements imposed by the DC power supply. Figure 12. Crowbar SCR Surge Current Waveform l lpk di dt Surge Due to Output Capacitor Current Limited Supply Output t Figure 13. Circuit Elements Affecting SCR Surge and di/dt RLead LLead ESR ESL Output Cap R L To MC3423 R & L EMPIRICALLY DETERMINED! The usual design compromise then is to use a garden variety fuse (3AG or 3AB style) which cannot be relied on to blow before the thyristor does, and trust that if the SCR does fail, it will fail short circuit. In the majority of the designs, this 6 A WORD ABOUT FUSING Before leaving the subject of the crowbar SCR, a few words about fuse protection are in order. Referring back to Figure 11A, it will be seen that a fuse is necessary if the power supply to be protected is not output current limited. This fuse is not meant to prevent SCR failure but rather to prevent a fire! In order to protect the SCR, the fuse would have to possess an I2t rating less than that of the SCR and yet have a high enough continuous current rating to survive normal supply output currents. In addition, it must be capable of successfully clearing the high short circuit currents from the supply. Such a fuse as this is quite expensive, and may not even be available. CROWBAR SCR SELECTION GUIDE As an aid in selecting an SCR for crowbar use, the following selection guide is presented. Device 2N6400 Series 2N6504 Series 2N1842 Series 2N2573 Series 2N681 Series MCR3935–1 Series MCR81–5 Series IRMS IFSM Package 16 A 25 A 16 A 25 A 25 A 35 A 80 A 160 A 160 A 125 A 260 A 200 A 350 A 1000 A TO–220 Plastic TO–220 Plastic Metal Stud Metal TO–3 Type Metal Stud Metal Stud Metal Stud MOTOROLA ANALOG IC DEVICE DATA MC3423 OUTLINE DIMENSIONS P1 SUFFIX PLASTIC PACKAGE CASE 626–05 ISSUE K 8 5 NOTES: 1. DIMENSION L TO CENTER OF LEAD WHEN FORMED PARALLEL. 2. PACKAGE CONTOUR OPTIONAL (ROUND OR SQUARE CORNERS). 3. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. –B– 1 4 F –A– NOTE 2 DIM A B C D F G H J K L M N L C J –T– N SEATING PLANE D M K MILLIMETERS MIN MAX 9.40 10.16 6.10 6.60 3.94 4.45 0.38 0.51 1.02 1.78 2.54 BSC 0.76 1.27 0.20 0.30 2.92 3.43 7.62 BSC ––– 10_ 0.76 1.01 INCHES MIN MAX 0.370 0.400 0.240 0.260 0.155 0.175 0.015 0.020 0.040 0.070 0.100 BSC 0.030 0.050 0.008 0.012 0.115 0.135 0.300 BSC ––– 10_ 0.030 0.040 G H 0.13 (0.005) T A M B M M D SUFFIX PLASTIC PACKAGE CASE 751–05 (SOP–8) ISSUE R D A NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. DIMENSIONS ARE IN MILLIMETERS. 3. DIMENSION D AND E DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 PER SIDE. 5. DIMENSION B DOES NOT INCLUDE MOLD PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 TOTAL IN EXCESS OF THE B DIMENSION AT MAXIMUM MATERIAL CONDITION. C 8 5 0.25 H E M B M 1 4 h B e X 45 _ q A C SEATING PLANE L 0.10 A1 B 0.25 M C B S A S MOTOROLA ANALOG IC DEVICE DATA DIM A A1 B C D E e H h L q MILLIMETERS MIN MAX 1.35 1.75 0.10 0.25 0.35 0.49 0.18 0.25 4.80 5.00 3.80 4.00 1.27 BSC 5.80 6.20 0.25 0.50 0.40 1.25 0_ 7_ 7 MC3423 Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation consequential or incidental damages. “Typical” parameters which may be provided in Motorola data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. 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