19-2672; Rev 1; 10/03 +1.2V to +5.5V, ±15kV ESD-Protected, 0.1µA, 35Mbps, 8-Channel Level Translators Features ♦ Guaranteed Data Rate Options 230kbps (MAX3000E) 4Mbps (MAX3001E) 20Mbps (MAX3002–MAX3012) ♦ Bidirectional Level Translation (MAX3000E/MAX3001E/MAX3002/MAX3003) ♦ Unidirectional Level Translation (MAX3004–MAX3012) ♦ Operation Down to +1.2V on VL ♦ ±15kV ESD Protection on I/O VCC Lines (MAX3000E/MAX3001E) ♦ Ultra-Low 0.1µA Supply Current in Shutdown ♦ Low Quiescent Current (<10µA) ♦ UCSP and TSSOP Packages Ordering Information PART TEMP RANGE PIN-PACKAGE MAX3000EEUP -40°C to +85°C 20 TSSOP MAX3000EEBP-T* -40°C to +85°C 4 x 5 UCSP *Future product—contact factory for availability. Ordering Information continued at end of data sheet. Applications Typical Operating Circuit Cellphones SPI™ and MICROWIRE™ Level Translation +1.8V +3.3V Low-Voltage ASIC Level Translation Smart Card Readers Cellphone Cradles Portable POS Systems Portable Communication Devices VCC VL Low-Cost Serial Interfaces EN GPS Telecommunications Equipment +1.8V SYSTEM CONTROLLER DATA MAX3000E MAX3001E MAX3002– MAX3012 I/O VL_ I/O VCC_ +3.3V SYSTEM DATA GND UCSP is a trademark of Maxim Integrated Products, Inc. SPI is a trademark of Motorola, Inc. MICROWIRE is a trademark of National Semiconductor. Pin Configurations and Functional Diagrams appear at end of data sheet. ________________________________________________________________ Maxim Integrated Products For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at 1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com. 1 MAX3000E/MAX3001E/MAX3002–MAX3012 General Description The MAX3000E/MAX3001E/MAX3002–MAX3012 8channel level translators provide the level shifting necessary to allow data transfer in a multivoltage system. Externally applied voltages, VCC and VL, set the logic levels on either side of the device. Logic signals present on the VL side of the device appear as a higher voltage logic signal on the VCC side of the device, and vice-versa. The MAX3000E/MAX3001E/MAX3002/MAX3004–MAX3012 feature an EN input that, when low, reduces the VCC and VL supply currents to <2µA. The MAX3000E/MAX3001E also have ±15kV ESD protection on the I/O VCC side for greater protection in applications that route signals externally. The MAX3000E operates at a guaranteed data rate of 230kbps. The MAX3001E operates at a guaranteed data rate of 4Mbps. The MAX3002–MAX3012 operate at a guaranteed data rate of 20Mbps over the entire specified operating voltage range. The MAX3000E/MAX3001E/MAX3002–MAX3012 accept VL voltages from +1.2V to +5.5V and VCC voltages from +1.65V to +5.5V, making them ideal for data transfer between low-voltage ASICs/PLDs and higher voltage systems. The MAX3000E/MAX3001E/MAX3002– MAX3012 are available in 20-pin UCSP™ and 20-pin TSSOP packages. MAX3000E/MAX3001E/MAX3002–MAX3012 +1.2V to +5.5V, ±15kV ESD-Protected, 0.1µA, 35Mbps, 8-Channel Level Translators ABSOLUTE MAXIMUM RATINGS All Voltages Referenced to GND VCC ...........................................................................-0.3V to +6V VL...........................................................................................-0.3V to +6V I/O VCC_......................................................-0.3V to (VCC + 0.3V) I/O VL_ ...........................................................-0.3V to (VL + 0.3V) EN, EN A/B ...............................................................-0.3V to +6V Short-Circuit Duration I/O VL_, I/O VCC_ to GND .......Continuous Continuous Power Dissipation (TA = +70°C) 20-Pin TSSOP (derate 7.0mW/°C above +70°C) .........559mW 20-Pin UCSP (derate 10mW/°C above +70°C) ............800mW Operating Temperature Ranges MAX3001EAUP .............................................-40°C to +125°C MAX300_EE_P .................................................-40°C to +85°C MAX30_ _E_P ..................................................-40°C to +85°C Junction Temperature ......................................................+150°C Storage Temperature Range ............................-65°C to +150°C Lead Temperature (soldering, 10s) .................................+300°C Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. ELECTRICAL CHARACTERISTICS (VCC = +1.65V to +5.5V, VL = +1.2V to VCC, EN = VL (MAX3000E/MAX3001E/MAX3002/MAX3004–MAX3012), EN A/B = VL or 0 (MAX3003), TA = TMIN to TMAX. Typical values are at VCC = +1.65V, VL = +1.2V, and TA = +25°C.) (Notes 1, 2) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS POWER SUPPLIES VL Supply Range VCC Supply Range VL 1.2 5.5 V VCC 1.65 5.50 V I/O VCC_ = 0, I/O VL _ = 0 or I/O VCC_ = VCC, I/O VL _ = VL, MAX3000E/MAX3002–MAX3012 Supply Current from VCC Supply Current from VL VL Shutdown Supply Current 2 10 µA IQVCC I/O VCC_ = 0, I/O VL _ = 0 or I/O VCC_ = VCC, I/O VL _ = VL, MAX3001E 0.1 50 I/O VCC_ = 0, I/O VL _ = 0 or I/O VCC_ = VCC, I/O VL _ = VL, MAX3000E/MAX3002–MAX3012 0.1 10 µA IQVL I/O VCC_ = 0, I/O VL _ = 0 or I/O VCC_ = VCC, I/O VL _ = VL, MAX3001E VCC Shutdown Supply Current 0.1 TA = +25°C, EN = 0, MAX3000E/MAX3001E/MAX3002/ ISHDN-VCC MAX3004–MAX3012 ISHDN-VL 0.1 50 0.1 2 µA TA = +25°C, EN A/B = 0, MAX3003 0.1 2 TA = +25°C, EN = 0, MAX3000E/MAX3001E/MAX3002/ MAX3004–MAX3012 0.1 2 TA = +25°C, EN A/B = 0, MAX3003 0.1 µA _______________________________________________________________________________________ 2 +1.2V to +5.5V, ±15kV ESD-Protected, 0.1µA, 35Mbps, 8-Channel Level Translators (VCC = +1.65V to +5.5V, VL = +1.2V to VCC, EN = VL (MAX3000E/MAX3001E/MAX3002/MAX3004–MAX3012), EN A/B = VL or 0 (MAX3003), TA = TMIN to TMAX. Typical values are at VCC = +1.65V, VL = +1.2V, and TA = +25°C.) (Notes 1, 2) PARAMETER SYMBOL TYP MAX TA = +25°C, EN = 0, MAX3000E/MAX3001E/MAX3002/ MAX3004–MAX3012 0.1 2 TA = +25°C, EN A/B = 0, MAX3003 0.1 2 I/O VL _ Three-State Output Leakage Current EN A/B = 0, MAX3003 0.1 2 µA I/O VL _ Pulldown Resistance During Shutdown EN = 0, MAX3000E/MAX3001E/MAX3002/ MAX3004–MAX3012 8.30 kΩ EN or EN A/B Input Leakage Current TA = +25°C 1 µA VL - 0.4 V I/O VCC _ Three-State Output Leakage Current CONDITIONS MIN UNITS µA 4.59 LOGIC-LEVEL THRESHOLDS I/O VL _ Input Voltage High Threshold VIHL I/O VL _ Input Voltage Low Threshold VILL I/O VCC _ Input Voltage High Threshold VIHC I/O VCC _ Input Voltage Low Threshold VILC EN, EN A/B Input Voltage High Threshold VIH EN, EN A/B Input Voltage Low Threshold VIL 0.4 V VCC - 0.4 0.4 V VL - 0.4 I/O VL _ Output Voltage High VOHL I/O VL _ source current = 20µA, I/O VCC _ ≥ VCC - 0.4V I/O VL _ Output Voltage Low VOLL I/O VL _ sink current = 20µA, I/O VCC _ ≤ 0.4V I/O VCC _ Output Voltage High VOHC I/O VCC_ source current = 20µA, I/O VL _ ≥ VL - 0.4V I/O VCC _ Output Voltage Low VOLC I/O VCC sink current = 20µA, I/O VL _ ≤ 0.4V V V 0.4 V VL - 0.4 V 0.4 VCC - 0.4 V V 0.4 V ESD PROTECTION I/O VCC _ Human Body Model, MAX3000E/MAX3001E ±15 kV _______________________________________________________________________________________ 3 MAX3000E/MAX3001E/MAX3002–MAX3012 ELECTRICAL CHARACTERISTICS (continued) MAX3000E/MAX3001E/MAX3002–MAX3012 +1.2V to +5.5V, ±15kV ESD-Protected, 0.1µA, 35Mbps, 8-Channel Level Translators TIMING CHARACTERISTICS (VCC = +1.65V to +5.5V, VL = +1.2V to VCC, EN = VL (MAX3000E/MAX3001E/MAX3002/MAX3004–MAX3012), EN A/B = VL or 0 (MAX3003), TA = TMIN to TMAX. Typical values are at VCC = +1.65V, VL = +1.2V, and TA = +25°C.) (Notes 1, 2) PARAMETER SYMBOL CONDITIONS RS = 50Ω, CVCC = 50pF, MAX3000E, Figures 1a, 1b I/O VCC_ Rise Time tRVCC MIN TYP MAX 400 800 1200 25 50 RS = 50Ω, CVCC = 50pF, MAX3001E, Figures 1a, 1b RS = 50Ω, CVCC = 50pF, MAX3002–MAX3012, Figures 1a, 1b RS = 50Ω, CVCC = 50pF, MAX3000E, Figures 1a, 1b I/O VCC_ Fall Time tFVCC 400 800 1200 25 50 RS = 50Ω, CVCC = 50pF, MAX3002–MAX3012, Figures 1a, 1b I/O VL _ Rise Time tRVL 400 800 1200 25 50 RS = 50Ω, CVL = 15pF, MAX3002–MAX3012, Figures 2a, 2b I/O VL _ Fall Time Propagation Delay (Driving I/O VL _) Propagation Delay (Driving I/O VCC_) tFVL I/OVL-VCC I/OVCC-VL RS = 50Ω, CVL = 50pF, MAX3001E, Figures 2a, 2b ns 15 RS = 50Ω, CVL = 50pF, MAX3001E, Figures 2a, 2b RS = 50Ω, CVL = 50pF, MAX3000E, Figures 2a, 2b ns 15 RS = 50Ω, CVCC = 50pF, MAX3001E, Figures 1a, 1b RS = 50Ω, CVL = 50pF, MAX3000E, Figures 2a, 2b UNITS ns 15 400 800 1200 25 65 RS = 50Ω, CVL = 15pF, MAX3002–MAX3012, Figures 2a, 2b 15 RS = 50Ω, CVCC = 50pF, MAX3000E, Figures 1a, 1b 1000 RS = 50Ω, CVCC = 50pF, MAX3001E, Figures 1a, 1b 50 RS = 50Ω, CVCC = 50pF, MAX3002–MAX3012, Figures 1a, 1b 20 RS = 50Ω, CVL = 50pF, MAX3000E, Figures 2a, 2b 1000 RS = 50Ω, CVL = 50pF, MAX3001E, Figures 2a, 2b 50 RS = 50Ω, CVL = 15pF, MAX3002–MAX3012, Figures 2a, 2b 20 ns ns ns Note 1: All units are 100% production tested at TA = +25°C. Limits over the operating temperature range are guaranteed by design and not production tested. Note 2: For normal operation, ensure that VL < (VCC + 0.3V). During power-up, VL > (VCC + 0.3V) does not damage the device. 4 _______________________________________________________________________________________ +1.2V to +5.5V, ±15kV ESD-Protected, 0.1µA, 35Mbps, 8-Channel Level Translators (VCC = +1.65V to +5.5V, VL = +1.2V to VCC, EN = VL (MAX3000E/MAX3001E/MAX3002/MAX3004–MAX3012), EN A/B = VL or 0 (MAX3003), TA = TMIN to TMAX. Typical values are at VCC = +1.65V, VL = +1.2V, and TA = +25°C.) (Notes 1, 2) PARAMETER Channel-to-Channel Skew Part-to-Part Skew SYMBOL tSKEW tPPSKEW Propagation Delay from I/O VL _ to I/O VCC_ after EN tEN-VCC Propagation Delay from I/O VCC_ to I/O VL _ after EN tEN-VL Maximum Data Rate CONDITIONS MIN TYP MAX RS = 50Ω, CVCC = 50pF, CVL = 50pF, MAX3000E 500 RS = 50Ω, CVCC = 50pF, CVL = 50pF, MAX3001E 10 RS = 50Ω, CVCC = 50pF, CVL = 15pF, MAX3002–MAX3012 5 RS = 50Ω, CVCC = 50pF, CVL = 50pF, ∆TA = +20°C, MAX3000E (Note 3) 800 RS = 50Ω, CVCC = 50pF, CVL = 50pF, ∆TA = +20°C, MAX3001E (Note 3) 30 RS = 50Ω, CVCC = 50pF, CVL = 15pF, ∆TA = +20°C, MAX3002–MAX3012 (Note 3) 10 CVCC = 50pF, MAX3000E/MAX3001E, MAX3002–MAX3012, Figure 3 UNITS ns ns µs CVL = 50pF, MAX3000E/MAX3001E/ MAX3002/MAX3004–MAX3012, Figure 4 2 CVL = 15pF, MAX3003, Figure 4 2 RS = 50Ω, CVCC = 50pF, CVL = 50pF, MAX3000E 230 RS = 50Ω, CVCC = 50pF, CVL = 50pF, MAX3001E 4 µs kbps Mbps RS = 50Ω, CVCC = 50pF, CVL = 15pF, MAX3002–MAX3012 20 Note 3: VCC from device 1 must equal VCC of device 2; VL from device 1 must equal VL of device 2. _______________________________________________________________________________________ 5 MAX3000E/MAX3001E/MAX3002–MAX3012 TIMING CHARACTERISTICS (continued) MAX3000E/MAX3001E/MAX3002–MAX3012 +1.2V to +5.5V, ±15kV ESD-Protected, 0.1µA, 35Mbps, 8-Channel Level Translators TIMING CHARACTERISTICS—MAX3002–MAX3012 (VCC = +1.65V to +5.5V, VL = +1.2V to VCC, EN = VL (MAX3002/MAX3004–MAX3012), EN A/B = VL or 0 (MAX3003), TA = TMIN to TMAX.) (Notes 1, 2) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS +1.2V ≤ VL ≤ VCC ≤ +3.3V I/O VCC_ Rise Time tRVCC 15 ns I/O VCC_ Fall Time tFVCC 15 ns I/O VL _ Rise Time tRVL 15 ns I/O VL _ Fall Time tFVL 15 ns Propagation Delay Channel-to-Channel Skew I/OVL-VCC Driving I/O VL _ 15 I/OVCC-VL Driving I/O VCC_ Each translator equally loaded 15 tSKEW Maximum Data Rate 5 20 ns ns Mbps +2.5V ≤ VL ≤ VCC ≤ +3.3V I/O VCC_ Rise Time tRVCC 8.5 ns I/O VCC_ Fall Time tFVCC 8.5 ns I/O VL _ Rise Time tRVL 8.5 ns 8.5 ns I/O VL _ Fall Time Propagation Delay Channel-to-Channel Skew tFVL I/OVL-VCC Driving I/O VL _ 8.5 I/OVCC-VL Driving I/O VCC_ 8.5 tSKEW Each translator equally loaded Maximum Data Rate 10 35 ns ns Mbps +1.8V ≤ VL ≤ VCC ≤ +2.5V I/O VCC_ Rise Time tRVCC 10 ns I/O VCC_ Fall Time tFVCC 10 ns I/O VL _ Rise Time tRVL 10 ns I/O VL _ Fall Time tFVL 10 ns Propagation Delay Channel-to-Channel Skew Maximum Data Rate 6 I/OVL-VCC Driving I/O VL _ 15 I/OVCC-VL Driving I/O VCC_ 10 Each translator equally loaded 5 tSKEW 30 _______________________________________________________________________________________ ns ns Mbps +1.2V to +5.5V, ±15kV ESD-Protected, 0.1µA, 35Mbps, 8-Channel Level Translators DATA RATE = 4Mbps DATA RATE = 230kbps 6000 DATA RATE = 4Mbps 4000 DATA RATE = 230kbps 2000 0 3.5 4.0 4.5 5.0 0 5.5 DATA RATE = 20Mbps 1000 DATA RATE = 4Mbps DATA RATE = 230kbps 500 0 1.5 2.0 2.5 SUPPLY VOLTAGE (V) 3.0 3.5 4.0 4.5 5.0 -40 5.5 -15 SUPPLY VOLTAGE (V) 2000 MAX3000E/01E/02-12 toc04 2500 DATA RATE = 20Mbps 1500 DATA RATE = 4Mbps DATA RATE = 230kbps 10 35 60 85 TEMPERATURE (°C) VL SUPPLY CURRENT vs. CAPACITIVE LOAD ON I/O VCC (DRIVING I/O VL, VCC = 3.3V, VL = 1.8V) VCC SUPPLY CURRENT vs. TEMPERATURE (DRIVING I/O VCC, VCC = 3.3V, VL = 1.8V) 1000 1500 100 MAX3000E/01E/02-12 toc05 3.0 VL SUPPLY CURRENT (µA) 80 DATA RATE = 20Mbps 60 DATA RATE = 4Mbps 40 500 20 0 0 DATA RATE = 230kbps -40 -15 10 35 60 10 85 20 30 7000 6000 DATA RATE = 20Mbps 4000 3000 DATA RATE = 4Mbps 2000 50 60 70 80 90 100 MAX3000E RISE/FALL TIME vs. CAPACITIVE LOAD ON I/O VCC (DRIVING I/O VL, VCC = 3.3V, VL = 1.8V) VCC SUPPLY CURRENT vs. CAPACITIVE LOAD ON I/O VCC (DRIVING I/O VL, VCC = 3.3V, VL = 1.8V) 5000 40 CAPACITIVE LOAD (pF) TEMPERATURE (°C) DATA RATE = 230kbps 2000 1500 MAX3000E/01E/02-12 toc07 2.5 MAX3000E/01E/02-12 toc06 2.0 VCC SUPPLY CURRENT (µA) 1.5 RISE/FALL TIME (ns) 100 8000 2000 VL SUPPLY CURRENT (µA) 300 200 MAX3000E/01E/02-12 toc02 400 DATA RATE = 20Mbps VCC SUPPLY CURRENT (µA) DATA RATE = 20Mbps VCC SUPPLY CURRENT (µA) VL SUPPLY CURRENT (µA) 500 10,000 MAX3000E/01E/02-12 toc01 600 VL SUPPLY CURRENT vs. TEMPERATURE (DRIVING I/O VCC, VCC = 3.3V, VL = 1.8V) VCC SUPPLY CURRENT vs. SUPPLY VOLTAGE (DRIVING I/O VL, VL = 1.8V) MAX3000E/01E/02-12 toc03 VL SUPPLY CURRENT vs. SUPPLY VOLTAGE (DRIVING I/O VL, VL = 1.8V) tLH 1000 tHL 500 1000 DATA RATE = 230kbps 0 0 10 20 30 40 50 60 70 CAPACITIVE LOAD (pF) 80 90 100 10 20 30 40 50 60 70 80 90 100 CAPACITIVE LOAD (pF) _______________________________________________________________________________________ 7 MAX3000E/MAX3001E/MAX3002–MAX3012 Typical Operating Characteristics (TA = +25°C, unless otherwise noted.) Typical Operating Characteristics (continued) (TA = +25°C, unless otherwise noted.) MAX3002–MAX3012 RISE/FALL TIME vs. CAPACITIVE LOAD ON I/O VCC (DRIVING I/O VL, VCC = 3.3V, VL = 1.8V) MAX3001E RISE/FALL TIME vs. CAPACITIVE LOAD ON I/O VCC (DRIVING I/O VL, VCC = 3.3V, VL = 1.8V) tLH 40 30 tHL 20 MAX3000E/01E/02-12 toc09 RISE/FALL TIME (ns) 50 8 6 RISE/FALL TIME (ns) MAX3000E/01E/02-12 toc08 60 tLH 4 tHL 2 10 DATA RATE = 20Mbps DATA RATE = 4Mbps 0 0 20 30 40 50 60 70 80 10 90 100 20 MAX3000E/01E/02-12 toc10 2000 tLH RISE/FALL TIME (ns) 40 50 1500 tHL MAX3001E RISE/FALL TIME vs. CAPACITIVE LOAD ON I/O VL (DRIVING I/O VCC, VCC = 3.3V, VL = 1.8V) 60 50 tHL RISE/FALL TIME (ns) MAX3000E RISE/FALL TIME vs. CAPACITIVE LOAD ON I/O VL (DRIVING I/O VCC, VCC = 3.3V, VL = 1.8V) 1000 30 CAPACITIVE LOAD (pF) CAPACITIVE LOAD (pF) MAX3000E/01E/02-12 toc11 10 40 30 tLH 20 500 10 DATA RATE = 4Mbps DATA RATE = 230kbps 0 0 20 30 40 60 50 80 70 10 90 100 20 30 MAX3000E/01E/02-12 toc12 4 tHL 2 1 50 tLH 70 80 90 100 500 400 tPLH 300 tPHL 200 100 DATA RATE = 230kbps DATA RATE = 20Mbps 0 0 10 15 20 25 CAPACITIVE LOAD (pF) 8 60 MAX3000E PROPAGATION DELAY vs. CAPACITIVE LOAD ON I/O VCC (DRIVING I/O VL, VCC = 3.3V, VL = 1.8V) PROPAGATION DELAY (ns) MAX3002–MAX3012 RISE/FALL TIME vs. CAPACITIVE LOAD ON I/O VL (DRIVING I/O VCC, VCC = 3.3V, VL = 1.8V) 3 40 CAPACITIVE LOAD (pF) CAPACITIVE LOAD (pF) MAX3000E/01E/02-12 toc13 10 RISE/FALL TIME (ns) MAX3000E/MAX3001E/MAX3002–MAX3012 +1.2V to +5.5V, ±15kV ESD-Protected, 0.1µA, 35Mbps, 8-Channel Level Translators 30 10 20 30 40 50 60 70 80 CAPACITIVE LOAD (pF) _______________________________________________________________________________________ 90 100 +1.2V to +5.5V, ±15kV ESD-Protected, 0.1µA, 35Mbps, 8-Channel Level Translators 15 tPHL 6 4 tPHL 400 200 DATA RATE = 20Mbps DATA RATE = 4Mbps DATA RATE = 230kbps 0 0 0 10 20 30 40 tPLH 300 100 2 5 10 50 MAX3000E/01E/02-12 toc16 8 15 20 25 10 30 20 30 40 MAX3001E PROPAGATION DELAY vs. CAPACITIVE LOAD ON I/O VL (DRIVING I/O VCC, VCC = 3.3V, VL = 1.8V) 5 tPHL PROPAGATION DELAY (ns) 12 60 70 80 90 100 MAX3002–MAX3012 PROPAGATION DELAY vs. CAPACITIVE LOAD ON I/O VL (DRIVING I/O VCC, VCC = 3.3V, VL = 1.8V) MAX3000E/01E/02-12 toc17 15 50 CAPACITIVE LOAD (pF) CAPACITIVE LOAD (pF) CAPACITIVE LOAD (pF) 9 6 tPLH 3 MAX3000E/01E/02-12 toc18 10 tPLH tPHL 500 PROPAGATION DELAY (ns) 20 10 600 MAX3000E/01E/02-12 toc15 tPLH PROPAGATION DELAY (ns) PROPAGATION DELAY (ns) 25 12 PROPAGATION DELAY (ns) MAX3000E/01E/02-12 toc14 30 MAX3000E PROPAGATION DELAY vs. CAPACITIVE LOAD ON I/O VL (DRIVING I/O VCC, VCC = 3.3V, VL = 1.8V) MAX3002–MAX3012 PROPAGATION DELAY vs. CAPACITIVE LOAD ON I/O VCC (DRIVING I/O VL, VCC = 3.3V, VL = 1.8V) MAX3001E PROPAGATION DELAY vs. CAPACITIVE LOAD ON I/O VCC (DRIVING I/O VL, VCC = 3.3V, VL = 1.8V) 4 tPHL 3 2 tPLH 1 DATA RATE = 4Mbps DATA RATE = 20Mbps 0 0 10 20 30 40 50 10 15 CAPACITIVE LOAD (pF) MAX3001E RAIL-TO-RAIL DRIVING (DRIVING I/O VL, VCC = 3.3V, VL = 1.8V, CVCC = 50pF, DATA RATE = 4Mbps) MAX3000E RAIL-TO-RAIL DRIVING (DRIVING I/O VL, VCC = 3.3V, VL = 1.8V, CVCC = 50pF, DATA RATE = 230kbps) 25 30 MAX3002–MAX3012 RAIL-TO-RAIL DRIVING (DRIVING I/O VL, VCC = 3.3V, VL = 1.8V, CVCC = 50pF, DATA RATE = 20Mbps) MAX3000E/01E/02-12 toc20 MAX3000E/01E/02-12 toc19 1µs 20 CAPACITIVE LOAD (pF) MAX3000E/01E/02-12 toc21 MAX3000E/MAX3001E/MAX3002–MAX3012 Typical Operating Characteristics (continued) (TA = +25°C, unless otherwise noted.) I/O VL_ 1V/div I/O VL_ 1V/div I/O VL_ 1V/div GND GND GND I/O VCC_ 2V/div I/O VCC_ 2V/div I/O VCC_ 2V/div GND GND GND 40ns 10ns _______________________________________________________________________________________ 9 MAX3000E/MAX3001E/MAX3002–MAX3012 +1.2V to +5.5V, ±15kV ESD-Protected, 0.1µA, 35Mbps, 8-Channel Level Translators Pin Description MAX3000E/MAX3001E/MAX3002 PIN 10 NAME FUNCTION TSSOP UCSP 1 B1 I/O VL1 2 A1 VL 3 A2 I/O VL2 Input/Output 2, Referenced to VL 4 B2 I/O VL3 Input/Output 3, Referenced to VL 5 A3 I/O VL4 Input/Output 4, Referenced to VL 6 B3 I/O VL5 Input/Output 5, Referenced to VL 7 A4 I/O VL6 Input/Output 6, Referenced to VL 8 B4 I/O VL7 Input/Output 7, Referenced to VL 9 A5 I/O VL8 Input/Output 8, Referenced to VL 10 B5 EN 11 C5 GND 12 D5 I/O VCC8 Input/Output 8, Referenced to VCC 13 C4 I/O VCC7 Input/Output 7, Referenced to VCC 14 D4 I/O VCC6 Input/Output 6, Referenced to VCC 15 C3 I/O VCC5 Input/Output 5, Referenced to VCC 16 D3 I/O VCC4 Input/Output 4, Referenced to VCC 17 C2 I/O VCC3 Input/Output 3, Referenced to VCC 18 D2 I/O VCC2 Input/Output 2, Referenced to VCC 19 D1 VCC 20 C1 I/O VCC1 Input/Output 1, Referenced to VL Logic Input Voltage, +1.2V ≤ VL ≤ VCC. Bypass VL to GND with a 0.1µF capacitor. Enable Input. If EN is pulled low, I/O VCC1 to I/O VCC8 are in three-state, while I/O VL1 to I/O VL8 have internal 6kΩ pulldown resistors. Drive EN high (VL) for normal operation. Ground VCC Input Voltage, +1.65V ≤ VCC ≤ +5.5V. Bypass VCC to GND with a 0.1µF capacitor. Input/Output 1, Referenced to VCC ______________________________________________________________________________________ +1.2V to +5.5V, ±15kV ESD-Protected, 0.1µA, 35Mbps, 8-Channel Level Translators MAX3003 PIN NAME FUNCTION TSSOP UCSP 1 B1 2 A1 VL 3 A2 I/O VL2A Input/Output 2A, Referenced to VL 4 B2 I/O VL3A Input/Output 3A, Referenced to VL 5 A3 I/O VL4A Input/Output 4A, Referenced to VL 6 B3 I/O VL1B Input/Output 1B, Referenced to VL 7 A4 I/O VL2B Input/Output 2B, Referenced to VL 8 B4 I/O VL3B Input/Output 3B, Referenced to VL 9 A5 I/O VL4B Input/Output 4B, Referenced to VL 10 B5 EN A/B 11 C5 GND 12 D5 I/O VCC4B Input/Output 4B, Referenced to VCC 13 C4 I/O VCC3B Input/Output 3B, Referenced to VCC 14 D4 I/O VCC2B Input/Output 2B, Referenced to VCC 15 C3 I/O VCC1B Input/Output 1B, Referenced to VCC 16 D3 I/O VCC4A Input/Output 4A, Referenced to VCC 17 C2 I/O VCC3A Input/Output 3A, Referenced to VCC 18 D2 I/O VCC2A Input/Output 2A, Referenced to VCC 19 D1 VCC 20 C1 I/O VCC1A I/O VL1A Input/Output 1A, Referenced to VL Logic Input Voltage, +1.2V ≤ VL ≤ VCC. Bypass VL to GND with a 0.1µF capacitor. Enable Input. If EN A/B is pulled low, channels 1B through 4B are active, and channels 1A through 4A are in three-state. If EN A/B is driven high to VL, channels 1A through 4A are active, and channels 1B through 4B are in three-state. Ground VCC Input Voltage, +1.65V ≤ VCC ≤ +5.5V. Bypass VCC to GND with a 0.1µF capacitor. Input/Output 1A, Referenced to VCC ______________________________________________________________________________________ 11 MAX3000E/MAX3001E/MAX3002–MAX3012 Pin Description (continued) MAX3000E/MAX3001E/MAX3002–MAX3012 +1.2V to +5.5V, ±15kV ESD-Protected, 0.1µA, 35Mbps, 8-Channel Level Translators Pin Description (continued) MAX3004–MAX3012 NAME VCC VL GND FUNCTION (Note 1) VCC Input Voltage, +1.65V < VCC < +5.5V. Bypass VCC to GND with a 0.1µF capacitor. Logic Input Voltage, +1.2V ≤ VL ≤ VCC. Bypass VL to GND with a 0.1µF capacitor. Ground EN (MAX3004) Enable Input. If EN is pulled low, OVCC1–OVCC8 are in three-state, while IVL1–IVL8 have 6kΩ pulldown resistors. Drive EN high (VL) for normal operation. EN (MAX3005) Enable Input. If EN is pulled low, IVCC1 and OVCC2–OVCC8 are in three-state, while OVL1 and IVL2–IVL8 have 6kΩ pulldown resistors. Drive EN high (VL) for normal operation. EN (MAX3006) Enable Input. If EN is pulled low, IVCC1, IVCC2, and OVCC3–OVCC8 are in three-state, while OVL1, OVL2, and IVL3–IVL8 have 6kΩ pulldown resistors. Drive EN high (VL) for normal operation. EN (MAX3007) Enable Input. If EN is pulled low, IVCC1, IVCC2, IVCC3, and OVCC4–OVCC8 are in three-state, while OVL1, OVL2, OVL3, and IVL4–IVL8 have 6kΩ pulldown resistors. Drive EN high (VL) for normal operation. EN (MAX3008) Enable Input. If EN is pulled low, IVCC1–IVCC4 and OVCC5–OVCC8 are in three-state, while OVL1–OVL4 and IVL5–IVL8 have 6kΩ pulldown resistors. Drive EN high (VL) for normal operation. EN (MAX3009) Enable Input. If EN is pulled low, IVCC1–IVCC5, OVCC6, OVCC7, and OVCC8 are in three-state, while OVL1–OVL5, IVL6, IVL7, and IVL8 have 6kΩ pulldown resistors. Drive EN high (VL) for normal operation. EN (MAX3010) Enable Input. If EN is pulled low, IVCC1–IVCC6, OVCC7, and OVCC8 are in three-state, while OVL1–OVL6, IVL7, and IVL8 have 6kΩ pulldown resistors. Drive EN high (VL) for normal operation. EN (MAX3011) Enable Input. If EN is pulled low, IVCC1–IVCC7 and OVCC8 are in three-state, while OVL1–OVL7 and IVL8 have 6kΩ pulldown resistors. Drive EN high (VL) for normal operation. EN (MAX3012) Enable Input. If EN is pulled low, IVCC1–IVCC8 are in three-state, while OVL1–OVL8 have 6kΩ pulldown resistors. Drive EN high (VL) for normal operation. IVL1–IVL8 Inputs Referenced to VL, Numbers 1 to 8 OVL1–OVL8 Outputs Referenced to VL, Numbers 1 to 8 IVCC1–IVCC8 Inputs Referenced to VCC, Numbers 1 to 8 OVCC1–OVCC8 Outputs Referenced to VCC, Numbers 1 to 8 Note 1: For specific pin numbers, see the Pin Configurations. 12 ______________________________________________________________________________________ +1.2V to +5.5V, ±15kV ESD-Protected, 0.1µA, 35Mbps, 8-Channel Level Translators tRISE/FALL ≤ 3ns I/O VL VL VCC MAX3000E/MAX3001E/ EN MAX3002/MAX3003 90% 50% 10% I/OVL-VCC I/O VL SOURCE I/OVL-VCC I/O VCC RS CVCC I/O VCC 90% 50% 10% tFVCC tRVCC Figure 1b. Timing for Driving I/O VL Figure 1a. Driving I/O VL tRISE/FALL ≤ 3ns I/O VCC VL 90% VCC MAX3000E/MAX3001E/ EN MAX3002/MAX3003 50% 10% I/OVCC-VL I/OVCC-VL RS I/O VL CVL I/O VCC SOURCE I/O VL 90% 50% 10% tFVL Figure 2a. Driving I/O VCC tRVL Figure 2b. Timing for Driving I/O VCC ______________________________________________________________________________________ 13 MAX3000E/MAX3001E/MAX3002–MAX3012 ______________________________________________Test Circuits/Timing Diagrams MAX3000E/MAX3001E/MAX3002–MAX3012 +1.2V to +5.5V, ±15kV ESD-Protected, 0.1µA, 35Mbps, 8-Channel Level Translators _________________________________Test Circuits/Timing Diagrams (continued) VL EN MAX3000E/MAX3001E/ MAX3002/MAX3003 SOURCE EN t'EN-VCC VL I/O VCC I/O VL 0 I/O VL 0 VL CVCC VCC I/O VCC VL EN EN MAX3000E/MAX3001E/ MAX3002/MAX3003 SOURCE VCC 2 t"EN-VCC 0 VL I/O VL I/O VCC I/O VL 0 VL CVCC VCC I/O VCC 2 VCC 0 tEN-VCC IS WHICHEVER IS LARGER BETWEEN t'EN-VCC AND t"EN-VCC Figure 3. Propagation Delay from I/O VL to I/O VCC After EN VL EN MAX3000E/MAX3001E/ MAX3002/MAX3003 SOURCE EN t'EN-VL VCC I/O VCC I/O VL 0 I/O VCC 0 VCC CVL I/O VL VL VL 2 0 VL EN SOURCE MAX3000E/MAX3001E/ MAX3002/MAX3003 EN t"EN-VL 0 VCC I/O VL CVL I/O VCC I/O VCC 0 VCC I/O VL VL 2 tEN-VL IS WHICHEVER IS LARGER BETWEEN t'EN-VL AND t"EN-VL Figure 4. Propagation Delay from I/O VCC to I/O VL After EN 14 ______________________________________________________________________________________ VL 0 +1.2V to +5.5V, ±15kV ESD-Protected, 0.1µA, 35Mbps, 8-Channel Level Translators The MAX3000E/MAX3001E/MAX3002–MAX3012 logiclevel translators provide the level shifting necessary to allow data transfer in a multivoltage system. Externally applied voltages, VCC and VL, set the logic levels on either side of the device. Logic signals present on the VL side of the device appear as a higher voltage logic signal on the VCC side of the device, and vice-versa. The MAX3000E/MAX3001E/MAX3002/MAX3003 are bidirectional level translators allowing data translation in either direction (VL ↔ VCC) on any single data line. The MAX3004–MAX3012 unidirectional level translators level shift data in one direction (VL → VCC or VCC → VL) on any single data line. The MAX3000E/MAX3001E/ MAX3002–MAX3012 accept VL from +1.2V to +5.5V. All devices have VCC ranging from +1.65V to +5.5V, making them ideal for data transfer between low-voltage ASICs/PLDs and higher voltage systems. The MAX3000E/MAX3001E/MAX3002/MAX3004– MAX3012 feature an output enable mode that reduces VCC supply current to less than 2µA, and VL supply current to less than 2µA when in shutdown. The MAX3000E/MAX3001E have ±15kV ESD protection on the VCC side for greater protection in applications that route signals externally. The MAX3000E operates at a guaranteed data rate of 230kbps; the MAX3001E operates at a guaranteed data rate of 4Mbps and the MAX3002–MAX3012 are guaranteed with a data rate of 20Mbps of operation over the entire specified operating voltage range. Level Translation For proper operation, ensure that +1.65V ≤ VCC ≤ +5.5V, +1.2V ≤ VL ≤ +5.5V, and VL ≤ VCC. During power-up sequencing, VL ≥ VCC does not damage the device. During power-supply sequencing, when VCC is floating and VL is powering up, up to 10mA current can be sourced to each load on the VL side, yet the device does not latch up. The maximum data rate also depends heavily on the load capacitance (see the Typical Operating Characteristics), output impedance of the driver, and the operational voltage range (see the Timing Characteristics). Input Driver Requirements The MAX3001E/MAX3002–MAX3012 architecture is based on a one-shot accelerator output stage. See Figure 5. Accelerator output stages are always in threestate except when there is a transition on any of the translators on the input side, either I/O VL or I/O VCC. Then, a short pulse is generated during which the accelerator output stages become active and charge/discharge the capacitances at the I/Os. Due to its bidirectional nature, both input stages become active during the one-shot pulse. This can lead to some current feeding into the external source that is driving the translator. However, this behavior helps to speed up the transition on the driven side. For proper operation, the driver has to meet the following conditions: 50Ω maximum output impedance and 20mA minimum output current (for 20Mbps versions), 400Ω maximum output impedance and 4mA minimum output current (for 4Mbps versions), 1kΩ maximum output impedance and 1mA minimum output current (for 230kbps versions). Figure 6 shows a typical input current vs. input voltage. Enable Output Mode (EN, EN A/B) The MAX3000E/MAX3001E/MAX3002 and the MAX3004– MAX3012 feature an EN input, and the MAX3003 has an EN A/B input. Pull EN low to set the MAX3000E/ MAX3001E/MAX3002/MAX3004–MAX3012s’ I/O VCC1 through I/O VCC8 in three-state output mode, while I/O VL1 through I/O VL8 have internal 6kΩ pulldown resistors. Drive EN to logic high (VL) for normal operation. For the MAX3003, pull EN A/B low to place channels 1B through 4B in active mode, while channels 1A through 4A are in three-state mode. Drive EN A/B to logic high (VL) to enable channels 1A through 4A, while channels 1B through 4B remain in three-state mode. ±15kV ESD Protection As with all Maxim devices, ESD-protection structures are incorporated on all pins to protect against electrostatic discharges encountered during handling and assembly. The I/O V CC lines have extra protection against static discharge. Maxim’s engineers have developed state-of-the-art structures to protect these pins against ESD of ±15kV without damage. The ESD structures withstand high ESD in all states: normal operation, three-state output mode, and powered down. After an ESD event, Maxim’s E versions keep working without latchup, whereas competing products can latch and must be powered down to remove latchup. ESD protection can be tested in various ways. The I/O VCC lines of the MAX3000E/MAX3001E are characterized for protection to ±15kV using the Human Body Model. ______________________________________________________________________________________ 15 MAX3000E/MAX3001E/MAX3002–MAX3012 Detailed Description MAX3000E/MAX3001E/MAX3002–MAX3012 +1.2V to +5.5V, ±15kV ESD-Protected, 0.1µA, 35Mbps, 8-Channel Level Translators IIN VCC VL P ONE-SHOT IVL OVCC 6kΩ VTH_IN/6kΩ N ONE-SHOT 0 VIN 6kΩ VTH_IN VS -(VS - VTH_IN)/6kΩ TYPICAL DRIVING ONE CHANNEL ON VL SIDE WHERE VS = VCC OR VL Figure 6. Typical IIN vs. VIN VL MAX3001E/MAX3002–MAX3012 VCC Machine Model P ONE-SHOT OVL 6kΩ IVCC N ONE-SHOT The Machine Model for ESD tests all pins using a 200pF storage capacitor and zero discharge resistance. Its objective is to emulate the stress caused by contact that occurs with handling and assembly during manufacturing. Of course, all pins require this protection during manufacturing, not just inputs and outputs. Therefore, after PC board assembly, the Machine Model is less relevant to I/O ports. Applications Information 6kΩ TYPICAL DRIVING ONE CHANNEL ON VCC SIDE Figure 5. MAX3001E/MAX3002–MAX3012 Simplified Functional Diagram (1 I/O Line) ESD Test Conditions ESD performance depends on a variety of conditions. Contact Maxim for a reliability report that documents test setup, test methodology, and test results. Human Body Model Figure 7a shows the Human Body Model and Figure 7b shows the current waveform it generates when discharged into a low impedance. This model consists of a 100pF capacitor charged to the ESD voltage of interest, which is then discharged into the test device through a 1.5kΩ resistor. 16 Power-Supply Decoupling To reduce ripple and the chance of transmitting incorrect data, bypass VL and VCC to ground with a 0.1µF capacitor. To ensure full ±15kV ESD protection, bypass VCC to ground with a 1µF capacitor. Place all capacitors as close to the power-supply inputs as possible. I2C Level Translation For I2C level translation for I2C applications, please refer to the MAX3372E–MAX3379E/MAX3390E–MAX3393E datasheet. Unidirectional vs. Bidirectional Level Translator The MAX3000E/MAX3001E/MAX3002/MAX3003 can also be used to translate signals without inversion. These devices provide the smallest solution (UCSP package) for unidirectional level translation without inversion. ______________________________________________________________________________________ +1.2V to +5.5V, ±15kV ESD-Protected, 0.1µA, 35Mbps, 8-Channel Level Translators CHARGE-CURRENTLIMIT RESISTOR HIGHVOLTAGE DC SOURCE CS 100pF RD 1500Ω IP 100% 90% DISCHARGE RESISTANCE Ir PEAK-TO-PEAK RINGING (NOT DRAWN TO SCALE) AMPERES 36.8% DEVICE UNDER TEST STORAGE CAPACITOR 10% 0 0 TIME tRL tDL CURRENT WAVEFORM Figure 7b. Human Body Current Waveform Figure 7a. Human Body ESD Test Model Selector Guide PART EN EN A/B Tx/Rx* DATA RATE ESD PROTECTION (kV) MAX3000E √ — 8/8 230kbps ±15 MAX3001E √ — 8/8 4Mbps ±15 MAX3002 √ — 8/8 ** ±2 MAX3003 — √ 8/8 ** ±2 MAX3004 √ — 8/0 ** ±2 MAX3005 √ — 7/1 ** ±2 MAX3006 √ — 6/2 ** ±2 MAX3007 √ — 5/3 ** ±2 MAX3008 √ — 4/4 ** ±2 MAX3009 √ — 3/5 ** ±2 MAX3010 √ — 2/6 ** ±2 MAX3011 √ — 1/7 ** ±2 MAX3012 √ — 0/8 ** ±2 *Tx = VL → VCC; Rx = VCC → VL **See Table 1. Table 1. Data Rate VL ↔ VCC (V) MAX3002–MAX3012 GUARANTEED DATA RATE (Mbps) 1.2 ↔ 5.5 40 1.2 ↔ 3.3 20 2.5 ↔ 3.3 35 1.8 ↔ 2.5 30 1.2 ↔ 2.5 20 1.2 ↔ 1.8 20 ______________________________________________________________________________________ 17 MAX3000E/MAX3001E/MAX3002–MAX3012 RC 1MΩ +1.2V to +5.5V, ±15kV ESD-Protected, 0.1µA, 35Mbps, 8-Channel Level Translators MAX3000E/MAX3001E/MAX3002–MAX3012 MAX3000E/MAX3001E/MAX3002 Functional Diagram VL VCC EN MAX3000E/ MAX3001E/MAX3002 I/O VL1 I/O VCC1 I/O VL2 I/O VCC2 I/O VL3 I/O VCC3 I/O VL4 I/O VCC4 I/O VL5 I/O VCC5 I/O VL6 I/O VCC6 I/O VL7 I/O VCC7 I/O VL8 I/O VCC8 GND 18 ______________________________________________________________________________________ +1.2V to +5.5V, ±15kV ESD-Protected, 0.1µA, 35Mbps, 8-Channel Level Translators VL VCC EN A/B MAX3003 I/O VL1A I/O VCC1A I/O VL2A I/O VCC2A I/O VL3A I/O VCC3A I/O VL4A I/O VCC4A I/O VL1B I/O VCC1B I/O VL2B I/O VCC2B I/O VL3B I/O VCC3B I/O VL4B I/O VCC4B GND ______________________________________________________________________________________ 19 MAX3000E/MAX3001E/MAX3002–MAX3012 MAX3003 Functional Diagram +1.2V to +5.5V, ±15kV ESD-Protected, 0.1µA, 35Mbps, 8-Channel Level Translators MAX3000E/MAX3001E/MAX3002–MAX3012 Pin Configurations MAX3000E/MAX3001E/MAX3002 MAX3004–MAX3012 MAX3003 1 2 3 4 5 VCC I/O VCC2 I/O VCC4 I/O VCC6 I/O VCC8 I/O VCC1 I/O VCC3 I/O VCC5 I/O VCC7 GND I/O VL1 I/O VL3 I/O VL5 I/O VL7 EN VL I/O VL2 I/O VL4 I/O VL6 I/O VL8 D 1 2 VCC I/O VCC2A I/O VCC4A I/O VCC2B I/O VCC4B I/O VCC1A I/O VCC3A I/O VCC1B I/O VCC3B GND I/O VL1A I/O VL3A I/O VL1B I/O VL3B EN A/B VL I/O VL2A I/O VL4A I/O VL2B I/O VL4B 3 4 5 D C C B B A A 20 UCSP (Bottom View) 20 UCSP (Bottom View) MAX3000E/MAX3001E/ MAX3002 MAX3003 TOP VIEW 20 I/O VCC1 I/O VL1 1 19 VCC VL 2 I/O VL2 3 I/O VL3 4 19 VCC VL 2 18 I/O VCC2 I/O VL2A 3 18 I/O VCC2A 17 I/O VCC3 I/O VL3A 4 17 I/O VCC3A I/O VL4 5 16 I/O VCC4 I/O VL4A 5 16 I/O VCC4A I/O VL5 6 15 I/O VCC5 I/O VL1B 6 15 I/O VCC1B I/O VL6 7 14 I/O VCC6 I/O VL2B 7 14 I/O VCC2B I/O VL7 8 13 I/O VCC7 I/O VL3B 8 13 I/O VCC3B I/O VL8 9 12 I/O VCC8 I/O VL4B 9 12 I/O VCC4B EN 10 11 GND TSSOP 20 20 I/O VCC1A I/O VL1A 1 EN A/B 10 11 GND TSSOP ______________________________________________________________________________________ +1.2V to +5.5V, ±15kV ESD-Protected, 0.1µA, 35Mbps, 8-Channel Level Translators TOP VIEW MAX3004 20 O VCC1 I VL1 1 VL 2 I VL2 3 I VL3 4 MAX3005 19 VCC 20 I VCC1 O V L1 1 VL 2 18 O VCC2 I VL2 3 17 O VCC3 I VL3 4 I VL4 5 16 O VCC4 I VL5 6 15 O VCC5 I VL6 7 MAX3006 19 VCC 20 I VCC1 O V L1 1 VL 2 19 VCC 18 O VCC2 O VL2 3 18 I VCC2 17 O VCC3 I VL3 4 17 O VCC3 I VL4 5 16 O VCC4 I VL4 5 16 O VCC4 I VL5 6 15 O VCC5 I VL5 6 15 O VCC5 14 O VCC6 I VL6 7 14 O VCC6 I VL6 7 14 O VCC6 I VL7 8 13 O VCC7 I VL7 8 13 O VCC7 I VL7 8 13 O VCC7 I VL8 9 12 O VCC8 I VL8 9 12 O VCC8 I VL8 9 12 O VCC8 EN 10 11 GND EN 10 11 GND EN 10 11 GND TSSOP TSSOP TSSOP MAX3007 MAX3008 MAX3009 20 I VCC1 O VL1 1 19 VCC VL 2 20 I VCC1 O V L1 1 19 VCC VL 2 20 I VCC1 O V L1 1 19 VCC VL 2 O VL2 3 18 I VCC2 O VL2 3 18 I VCC2 O VL2 3 18 I VCC2 O VL3 4 17 I VCC3 O VL3 4 17 I VCC3 O VL3 4 17 I VCC3 I VL4 5 16 O VCC4 O VL4 5 16 I VCC4 O VL4 5 16 I VCC4 I VL5 6 15 O VCC5 I VL5 6 15 O VCC5 O VL5 6 15 I VCC5 I VL6 7 14 O VCC6 I VL6 7 14 O VCC6 I VL6 7 14 O VCC6 I VL7 8 13 O VCC7 I VL7 8 13 O VCC7 I VL7 8 13 O VCC7 I VL8 9 12 O VCC8 I VL8 9 12 O VCC8 I VL8 9 12 O VCC8 EN 10 11 GND TSSOP EN 10 11 GND TSSOP EN 10 11 GND TSSOP ______________________________________________________________________________________ 21 MAX3000E/MAX3001E/MAX3002–MAX3012 Pin Configurations (continued) MAX3000E/MAX3001E/MAX3002–MAX3012 +1.2V to +5.5V, ±15kV ESD-Protected, 0.1µA, 35Mbps, 8-Channel Level Translators Pin Configurations (continued) TOP VIEW MAX3010 MAX3011 20 I VCC1 O VL1 1 VL 2 MAX3012 20 I VCC1 O VL1 1 VL 2 19 VCC 19 VCC 20 I VCC1 O VL1 1 VL 2 19 VCC O VL2 3 18 I VCC2 O VL2 3 18 I VCC2 O VL2 3 18 I VCC2 O VL3 4 17 I VCC3 O VL3 4 17 I VCC3 O VL3 4 17 I VCC3 O VL4 5 16 I VCC4 O VL4 5 16 I VCC4 O VL4 5 16 I VCC4 O VL5 6 15 I VCC5 O VL5 6 15 I VCC5 O VL5 6 15 I VCC5 O VL6 7 14 I VCC6 O VL6 7 14 I VCC6 O VL6 7 14 I VCC6 I VL7 8 13 O VCC7 O VL7 8 13 I VCC7 O VL7 8 13 I VCC7 I VL8 9 12 O VCC8 I VL8 9 12 O VCC8 O VL8 9 12 I VCC8 EN 10 EN 10 11 GND TSSOP 11 GND EN 10 11 GND TSSOP TSSOP Ordering Information (continued) TEMP RANGE PIN-PACKAGE TEMP RANGE PIN-PACKAGE MAX3001EEUP -40°C to +85°C 20 TSSOP MAX3007EUP* -40°C to +85°C 20 TSSOP MAX3001EEBP-T* -40°C to +85°C 4 x 5 UCSP MAX3007EBP-T* -40°C to +85°C 4 x 5 UCSP MAX3001EAUP -40°C to +125°C 20 TSSOP MAX3008EUP* -40°C to +85°C 20 TSSOP MAX3002EUP -40°C to +85°C 20 TSSOP MAX3008EBP-T* -40°C to +85°C 4 x 5 UCSP MAX3002EBP-T* -40°C to +85°C 4 x 5 UCSP MAX3009EUP* -40°C to +85°C 20 TSSOP -40°C to +85°C 4 x 5 UCSP PART PART MAX3003EUP -40°C to +85°C 20 TSSOP MAX3009EBP-T* MAX3003EBP-T* -40°C to +85°C 4 x 5 UCSP MAX3010EUP* -40°C to +85°C 20 TSSOP MAX3004EUP* -40°C to +85°C 20 TSSOP MAX3010EBP-T* -40°C to +85°C 4 x 5 UCSP MAX3004EBP-T* -40°C to +85°C 4 x 5 UCSP MAX3011EUP* -40°C to +85°C 20 TSSOP 4 x 5 UCSP MAX3005EUP* -40°C to +85°C 20 TSSOP MAX3011EBP-T* -40°C to +85°C MAX3005EBP-T* -40°C to +85°C 4 x 5 UCSP MAX3012EUP* -40°C to +85°C 20 TSSOP MAX3012EBP-T* -40°C to +85°C 4 x 5 UCSP MAX3006EUP* -40°C to +85°C 20 TSSOP MAX3006EBP-T* -40°C to +85°C 4 x 5 UCSP *Future product—contact factory for availability. Chip Information TRANSISTOR COUNT: 1184 PROCESS: BiCMOS 22 ______________________________________________________________________________________ +1.2V to +5.5V, ±15kV ESD-Protected, 0.1µA, 35Mbps, 8-Channel Level Translators 5x4 UCSP.EPS PACKAGE OUTLINE, 5x4 UCSP 21-0095 I 1 1 ______________________________________________________________________________________ 23 MAX3000E/MAX3001E/MAX3002–MAX3012 Package Information (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information, go to www.maxim-ic.com/packages.) Package Information (continued) (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information, go to www.maxim-ic.com/packages.) TSSOP4.40mm.EPS MAX3000E/MAX3001E/MAX3002–MAX3012 +1.2V to +5.5V, ±15kV ESD-Protected, 0.1µA, 35Mbps, 8-Channel Level Translators Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. 24 ____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 © 2003 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products.