PHILIPS BUT18

DISCRETE SEMICONDUCTORS
DATA SHEET
BUT18; BUT18A
Silicon diffused power transistors
Product specification
Supersedes data of 1997 Aug 13
1999 Jun 11
Philips Semiconductors
Product specification
Silicon diffused power transistors
BUT18; BUT18A
DESCRIPTION
High-voltage, high-speed,
glass-passivated NPN power
transistor in a TO-220AB package.
dbook, halfpage
APPLICATIONS
• Converters
2
• Inverters
1
• Switching regulators
• Motor control systems.
3
MBB008
MBK106
PINNING
PIN
1 2 3
DESCRIPTION
1
base
2
collector; connected to
mounting base
3
emitter
Fig.1 Simplified outline (TO-220AB) and symbol.
QUICK REFERENCE DATA
SYMBOL
VCESM
VCEO
PARAMETER
CONDITIONS
collector-emitter peak voltage
MAX.
UNIT
VBE = 0
BUT18
850
V
BUT18A
1000
V
BUT18
400
V
BUT18A
450
V
see Fig.7
1.5
V
collector-emitter voltage
open base
VCEsat
collector-emitter saturation voltage
ICsat
collector saturation current
4
A
IC
collector current (DC)
see Fig.2
6
A
ICM
collector current (peak value)
see Fig.2
12
A
Ptot
total power dissipation
Tmb ≤ 25 °C; see Fig.4
110
W
tf
fall time
resistive load; see Figs 10 and 11
0.8
µs
THERMAL CHARACTERISTICS
SYMBOL
Rth j-mb
1999 Jun 11
PARAMETER
thermal resistance from junction to mounting base
2
VALUE
UNIT
1.15
K/W
Philips Semiconductors
Product specification
Silicon diffused power transistors
BUT18; BUT18A
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 134).
SYMBOL
VCESM
VCEO
PARAMETER
collector-emitter peak voltage
CONDITIONS
MIN.
MAX.
UNIT
VBE = 0
BUT18
−
850
V
BUT18A
−
1000
V
BUT18
−
400
V
BUT18A
−
450
V
−
4
A
collector-emitter voltage
open base
ICsat
collector saturation current
IC
collector current (DC)
see Fig.2
−
6
A
ICM
collector current (peak value)
see Fig.2
−
12
A
IB
base current (DC)
−
3
A
IBM
base current (peak value)
Ptot
total power dissipation
Tstg
Tj
−
6
A
−
110
W
storage temperature
−65
+150
°C
junction temperature
−
150
°C
Tmb ≤ 25 °C; see Fig.4
CHARACTERISTICS
Tj = 25 °C unless otherwise specified.
SYMBOL
VCEOsust
PARAMETER
MIN.
TYP.
MAX. UNIT
BUT18
400
−
−
V
BUT18A
450
−
−
V
collector-emitter sustaining
voltage
CONDITIONS
IC = 0.1 A; IBoff = 0; L = 25 mH; see
Figs 5 and 6
VCEsat
collector-emitter saturation voltage IC = 4 A; IB = 0.8 A; see Fig.7
−
−
1.5
V
VBEsat
base-emitter saturation voltage
IC = 4 A; IB = 0.8 A; see Fig.8
−
−
1.3
V
ICES
collector-emitter cut-off current
VCE = VCESMmax; VBE = 0; note 1
−
−
1
mA
VCE = VCESMmax; VBE = 0;
Tj = 125 °C; note 1
−
−
2
mA
mA
IEBO
emitter-base cut-off current
VEB = 9 V; IC = 0
−
−
10
hFE
DC current gain
VCE = 5 V; IC = 10 mA; see Fig.9
10
18
35
VCE = 5 V; IC = 1 A; see Fig.9
10
20
35
Switching times resistive load (see Figs 10 and 11)
ton
turn-on time
ICon = 4 A; IBon = −IBoff = 800 mA
−
−
1
µs
ts
storage time
ICon = 4 A; IBon = −IBoff = 800 mA
−
−
4
µs
tf
fall time
ICon = 4 A; IBon = −IBoff = 800 mA
−
−
0.8
µs
Switching times inductive load (see Figs 10 and 13)
ts
storage time
ICon = 4 A; IBon = 800 mA; VCL = 250 V −
1.6
2.5
µs
tf
fall time
ICon = 4 A; IBon = 800 mA; VCL = 250 V −
150
400
ns
Note
1. Measured with a half-sinewave voltage (curve tracer).
1999 Jun 11
3
Philips Semiconductors
Product specification
Silicon diffused power transistors
handbook, full pagewidth
BUT18; BUT18A
MGB921
102
IC
(A)
ICM max
10
IC max
II
1
I
10−1
DC
10−2
BUT18
BUT18A
10−3
10−4
1
10
102
Tmb = 25 °C.
I - Region of permissible DC operation.
II - Permissible extension for repetitive pulse operation.
Fig.2 Forward bias SOAR.
1999 Jun 11
4
103
VCE (V)
104
Philips Semiconductors
Product specification
Silicon diffused power transistors
BUT18; BUT18A
MGB862
10
handbook, full pagewidth
Zth j−mb
(K/W)
δ=1
1
0.75
0.50
0.33
0.20
0.10
10−1
0.05
0.02
0.01
0
10−2
10−3
10−2
10−1
1
102
10
103
tp (ms)
Fig.3 Transient thermal impedance.
MGD283
120
handbook,
halfpage
Ptot max
handbook, halfpage
(%)
+ 50 V
100 to 200 Ω
80
L
horizontal
oscilloscope
40
vertical
6V
30 to 60 Hz
300 Ω
1Ω
MGE252
0
0
50
100
Tmb (oC)
150
Fig.5
Fig.4 Power derating curve.
1999 Jun 11
5
Test circuit for collector-emitter
sustaining voltage.
Philips Semiconductors
Product specification
Silicon diffused power transistors
BUT18; BUT18A
MGB884
2
handbook, halfpage
(1)
(2)
(3)
VCEsat
(V)
MGE239
handbook,IC
halfpage
(mA)
250
1
200
100
0
0
10−2
VCE (V)
min
VCEOsust
10−1
1
IB (A)
10
Tj = 25 °C.
(1) IC = 1 A.
(2) IC = 2 A.
(3) IC = 4 A.
Fig.6
Oscilloscope display for collector-emitter
sustaining voltage.
Fig.7
MGB880
1.5
MBC097
102
handbook, halfpage
handbook, halfpage
VBEsat
(V)
hFE
(1)
(2)
1
0.5
10−2
Collector-emitter saturation voltage as a
function of base current.
1
IB (A)
1V
10
(3)
10−1
VCE = 5 V
1
10−2
10
10−1
1
10
2
IC (A) 10
Tj = 25 °C.
(1) IC = 4 A.
(2) IC = 2 A.
(3) IC = 1 A.
VCE = 5 V; Tj = 25 °C.
Fig.8
1999 Jun 11
Base-emitter saturation voltage as a
function of base current.
Fig.9 DC current gain; typical values.
6
Philips Semiconductors
Product specification
Silicon diffused power transistors
BUT18; BUT18A
handbook, halfpage
MBB731
tr ≤30 ns
IB on
90%
IB
10%
VCC
handbook, halfpage
t
IB off
RL
VIM
RB
0
D.U.T.
IC on
90%
tp
IC
MGE244
T
10%
ton
VCC = 250 V; tp = 20 µs; VIM = −6 to +8 V; tp/T = 0.01.
The values of RB and RL are selected in accordance with ICon and
IBon requirements.
tf
t
ts
tr ≤ 30 ns.
Fig.11 Switching time waveforms with
resistive load.
Fig.10 Test circuit resistive load.
handbook, halfpage
tr
IB on
90%
IB
10%
VCC
handbook, halfpage
t
LC
+IB
−IB off
VCL
LB
D.U.T.
IC on
90%
−VBE
MGE246
IC
10%
ts
toff
VCL = up to 1000 V; VCC = 30 V; VBE = −5 V; LB = 1 µH (0 for reverse
bias SOAR); LC = 200 µH.
Fig.12 Test circuit inductive load and reverse
bias SOAR.
1999 Jun 11
t
tf
MGE238
Fig.13 Switching times waveforms with
inductive load.
7
Philips Semiconductors
Product specification
Silicon diffused power transistors
BUT18; BUT18A
PACKAGE OUTLINE
Plastic single-ended package; heatsink mounted; 1 mounting hole; 3-lead TO-220AB
E
SOT78
A
A1
P
q
D1
D
L1
L2(1)
Q
b1
L
1
2
3
c
b
e
e
0
5
10 mm
scale
DIMENSIONS (mm are the original dimensions)
(1)
UNIT
A
A1
b
b1
c
D
D1
E
e
L
L1
L2
max.
P
q
Q
mm
4.5
4.1
1.39
1.27
0.9
0.7
1.3
1.0
0.7
0.4
15.8
15.2
6.4
5.9
10.3
9.7
2.54
15.0
13.5
3.30
2.79
3.0
3.8
3.6
3.0
2.7
2.6
2.2
Note
1. Terminals in this zone are not tinned.
OUTLINE
VERSION
SOT78
1999 Jun 11
REFERENCES
IEC
JEDEC
EIAJ
EUROPEAN
PROJECTION
ISSUE DATE
97-06-11
TO-220AB
8
Philips Semiconductors
Product specification
Silicon diffused power transistors
BUT18; BUT18A
DEFINITIONS
Data sheet status
Objective specification
This data sheet contains target or goal specifications for product development.
Preliminary specification
This data sheet contains preliminary data; supplementary data may be published later.
Product specification
This data sheet contains final product specifications.
Limiting values
Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or
more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation
of the device at these or at any other conditions above those given in the Characteristics sections of the specification
is not implied. Exposure to limiting values for extended periods may affect device reliability.
Application information
Where application information is given, it is advisory and does not form part of the specification.
LIFE SUPPORT APPLICATIONS
These products are not designed for use in life support appliances, devices, or systems where malfunction of these
products can reasonably be expected to result in personal injury. Philips customers using or selling these products for
use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such
improper use or sale.
1999 Jun 11
9
Philips Semiconductors
Product specification
Silicon diffused power transistors
BUT18; BUT18A
NOTES
1999 Jun 11
10
Philips Semiconductors
Product specification
Silicon diffused power transistors
BUT18; BUT18A
NOTES
1999 Jun 11
11
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© Philips Electronics N.V. 1999
SCA 66
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Printed in The Netherlands
135002/02/pp12
Date of release: 1999 Jun 11
Document order number:
9397 750 06092