CXG1111EN 800MHz Band Receive Mixer Description The CXG1111EN is a mixer MMIC for the Japan CDMA cellular. This IC is designed using the Sony’s GaAs J-FET process. Features • High conversion gain: Gc = 13.0dB (Typ.) • Low noise figure: NF = 4.5dB (Typ.) • Low distortion: IIP3 = +2.5dBm (Typ.) • Small package: 10-pin VSON 10 pin VSON (Plastic) Pin Configuration Applications J-CDMA, PDC 800MHz and others Structure GaAs J-FET MMIC Absolute Maximum Ratings (Ta = 25°C) • Supply voltage VDD 4.5 • Input power PIN +5 • Operating temperature Topr –35 to +85 • Storage temperature Tstg –65 to +150 Recommended Operating Condition Supply voltage VDD 2.7 to 3.3 V dBm °C °C RFIN 6 5 NC GND 7 4 GND OPT 8 3 GND GND 9 2 VDD1 (LO AMP) LOIN 10 1 IFOUT/VDD2 (MIX) V Block Diagram RFIN 6 LOIN 10 1 IFOUT Note on handling GaAs MMICs are ESD sensitive devices. Special handling precautions are required. Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits. –1– E00925A1Y-PS CXG1111EN Electrical Characteristics Conditions: VDD = 2.7V, fRF = 850MHz, fLO = 740MHz, PLO = –10dBm (Ta = 25°C) Item Symbol Min. Typ. Max. Unit Condition When no signal Current consumption IDD — 7.5 10 mA Conversion gain GC 11.5 13 14.5 dB Noise figure NF — 4.5 6 dB Input IP3 IIP3 0.5 2.5 — dBm ∗1 LO – RF leak level PLK — –20 –17 dBm — When a small signal ∗1 Conversion from the IM3 suppression ratio for two-wave input: fRF = 850MHz/850.9MHz and PRF = –25dBm. Recommended Evaluation Circuit RFIN L1 L3 L2 6 5 7 4 8 3 9 2 10 1 R1 LOIN VDD (LO AMP) L5 C1 C2 L4 L6 C4 IFOUT C3 L7 C5 L1 18nH L6 220nH C4 1000pF L2 22nH L7 220nH C5 1000pF L3 27nH C1 100pF R1 27Ω L4 33nH C2 1000pF L5 33nH C3 8pF –2– VDD (MIX) CXG1111EN Example of Representative Characteristics (Ta = 25°C) Mixer Block Gc, NF vs. PLO Gc, NF vs. fRF 9 14 13 8 13 12 7 12 14 9 10 8 Gc 7 VDD = 2.7V fRF = 850MHz fLO = 740MHz 11 5 10 4 9 6 NF [dB] 6 Gc [dB] VDD = 2.7V fLO = fRF – 110MHz PLO = –10dBm 11 NF [dB] Gc [dB] Gc 5 NF NF 9 3 8 800 810 820 830 840 850 860 870 880 890 900 8 –25 4 3 –15 –20 fRF [MHz] –10 –5 0 PLO [dBm] POUT, IM3 vs. PIN IIP3, PLK vs. PLO 30 6 –15 5 –17.5 20 10 IIP3 [dBm] –10 –20 –30 3 –22.5 –25 2 IIP3 1 IM3 VDD = 2.7V fRF = 850MHz fRF2 = 850.9MHz fLO = 740MHz PLO = –10dBm –50 –60 –70 –80 –40 –30 –20 –10 0 0 –1 –2 –25 –3– –30 –32.5 –35 –20 –15 –10 PLO [dBm] 10 PIN [dBm] –27.5 VDD = 2.7V fRF = 850MHz fRF2 = 850.9MHz fLO = 740MHz PLO = –10dBm –40 –5 0 PLK [dBm] PLK POUT POUT [dBm] –20 4 0 CXG1111EN Example of Representative Characteristics for Option Resistance R1 Changed (Ta = 25°C) GC, NF vs. R1 IMIX vs. R1 14 10 13 8 8 GC 7 12 6 GC [dB] IMIX [mA] 9 5 7 VDD = 2.7V fRF = 850MHz fLO = 740MHz PLO = –10dBm 11 4 6 10 3 5 NF 2 9 4 1 0 OPEN 200 100 47 39 33 27 22 8 OPEN 200 100 18 R1 [Ω] IIP3, PLK vs. PLO –15 5 –17.5 4 –20 –22.5 3 –25 IIP3 –27.5 1 VDD = 2.7V fRF1 = 850MHz fRF2 = 850.9MHz fLO = 740MHz PLO = –10dBm –1 –2 OPEN 200 100 PLK [dBm] IIP3 [dBm] PLK 0 –30 –32.5 –35 47 39 39 R1 [Ω] 6 2 3 47 33 27 22 18 R1 [Ω] –4– 33 27 22 18 NF [dB] 9 VDD = 2.7V (no signal) CXG1111EN Recommended Evaluation Board 25mm Front 50mm RFIN LOIN IFOUT VDD1 GND VDD2 Glass fabric-base 4-layer epoxy board (thickness: 0.2mm × 2) GND for the whole 2nd and 3rd layers Enlarged Diagram of Center Part L1 L2 L3 R1 L5 C1 C3 L4 L6 L7 C4 –5– C5 C2 CXG1111EN Package Outline Unit: mm 10PIN VSON(PLASTIC) + 0.1 0.8 – 0.05 0.6 2.5 0.05 S A 6 1 5 B x2 0.4 0.35 ± 0.1 0.15 S B x4 0.8 0.15 S A B 0.03 ± 0.03 (Stand Off) 0.2 ± 0.01 0.05 M S AB 0.225 ± 0.03 PIN 1 INDEX 2.7 2.5 10 0.5 ± 0.2 0.35 ± 0.1 S Solder Plating 0.13 ± 0.025 + 0.09 0.14 – 0.03 TERMINAL SECTION PACKAGE STRUCTURE PACKAGE MATERIAL EPOXY RESIN LEAD TREATMENT SOLDER PLATING EIAJ CODE LEAD MATERIAL COPPER ALLOY JEDEC CODE PACKAGE MASS 0.013g SONY CODE VSON-10P-01 10PIN VSON(PLASTIC) Kokubu Ass’y + 0.1 0.8 – 0.05 0.6 2.5 0.05 S A 2.5 1 5 B x2 0.4 0.15 S B 0.35 ± 0.1 x4 0.8 0.03 ± 0.03 (Stand Off) 0.225 ± 0.03 0.15 S A B 0.05 M S AB 0.2 ± 0.01 PIN 1 INDEX 2.7 6 10 0.5 ± 0.2 0.35 ± 0.1 S Solder Plating 0.13 ± 0.025 + 0.09 0.14 – 0.03 TERMINAL SECTION PACKAGE STRUCTURE PACKAGE MATERIAL EPOXY RESIN LEAD TREATMENT SOLDER PLATING EIAJ CODE LEAD MATERIAL COPPER ALLOY JEDEC CODE PACKAGE MASS 0.013g SONY CODE VSON-10P-01 LEAD PLATING SPECIFICATIONS ITEM SPEC. LEAD MATERIAL COPPER ALLOY SOLDER COMPOSITION Sn-Bi Bi:1-4wt% PLATING THICKNESS 5-18µm –6– Sony Corporation