LT1680 High Power DC/DC Step-Up Controller U DESCRIPTION FEATURES ■ ■ ■ ■ ■ ■ ■ ■ ■ The LT ®1680 is a high power, current mode switching power supply controller optimized for boost topologies. The IC drives N-channel MOSFET switches for DC/DC converters in applications up to 60V input. A high current gate drive output handles up to 10,000pF gate capacitance, enabling the construction of high power DC/DC converters. Current sense common mode range up to 60V allows current sensing to be referenced to the input supply, eliminating the need for sense blanking circuits. High Voltage: Operation Up to 60V Max High Current: N-Channel Drive Handles Up to 10,000pF Gate Capacitance Programmable Average Current Limiting 5V Reference Output with 10mA External Loading Capability Fixed Frequency Current Mode Operation Oscillator Synchronizable Up to 200kHz Undervoltage Lockout with Hysteresis Programmable Start Inhibit for Power Supply Sequencing and Protection User Adjustable Slope Compensation The LT1680 incorporates programmable average current limiting allowing accurate limiting of DC current in the magnetics, independent of ripple current . User adjustable slope compensation provides stable operation at duty cycles up to 90%. U APPLICATIONS ■ ■ ■ ■ The LT1680 operating frequency is programmable and can be synchronized up to 200kHz. Minimum off-time operation provides switch protection. The IC also incorporates a soft start feature that is gated by both shutdown and undervoltage lockout conditions. High Power Single Board Systems Distributed Power Converters Industrial Control Systems Lead-Acid Battery Back-Up Systems Automotive and Heavy Equipment , LTC and LT are registered trademarks of Linear Technology Corporation. U ■ TYPICAL APPLICATION 12V to 48V, 250W Boost 12VIN 10V TO 15V 24A (DC) RSENSE 0.005Ω C2 1µF Efficiency vs Output Power 100 CCT 1nF LT1680 1 2 C3 2.2nF C4 0.22µF CVC 4.7nF 3 4 1N914 RVC 4.7k 5 6 7 8 C6 0.1µF R7 2k SL/ADJ 5VREF CT SYNC IAVG 12VIN SS GATE VC PGND SGND RUN/SHDN VFB VREF SENSE – 16 15 + 14 CIN 680µF 25V ×4 C12 1µF 13 12 11 M1 IRFZ44 ×3 MBR0520 C11 1nF R6 75k VOUT = 48V 95 R9 100k 10 9 SENSE + L1 25µH EFFICIENCY (%) RCT 15k + 90 85 80 D1 MBR20100CT ×2 + L1: Kool Mµ®, 18T #14 ON 77314-A7 Kool Mµ IS A REGISTERED TRADEMARK OF MAGNETICS, INC. VOUT 48V 5.2A COUT 680µF 63V 1680 TA01 ×3 75 0 50 150 200 100 OUTPUT POWER (W) 250 1680 TA02 1 LT1680 U W U U W W W ABSOLUTE MAXIMUM RATINGS PACKAGE/ORDER INFORMATION (Note 1) Power Supply Voltage (12VIN) .................. – 0.3V to 20V Sense Amplifier Input Common Mode ...... – 0.3V to 60V GATE Pin Voltage....................... – 0.3V to 12VIN + 0.3V RUN/SHDN Pin Voltage ......................... – 0.3V to 12VIN All Other Pin Voltages ................................. – 0.3V to 7V 5V Reference Output Current ............................... 65mA Operating Ambient Temperature Range LT1680C .................................................. 0°C to 70°C LT1680I .............................................. – 40°C to 85°C Storage Temperature Range ................ – 65°C to 150°C Lead Temperature (Soldering, 10 sec)................. 300°C ORDER PART NUMBER TOP VIEW SL/ADJ 1 16 5VREF CT 2 15 SYNC IAVG 3 14 12VIN SS 4 13 GATE VC 5 12 PGND SGND 6 11 RUN/SHDN VFB 7 10 SENSE – VREF 8 9 N PACKAGE 16-LEAD PDIP LT1680CN LT1680CSW LT1680IN LT1680ISW SENSE + SW PACKAGE 16-LEAD PLASTIC SO WIDE TJMAX = 125°C, θJA = 75°C/ W (N) TJMAX = 125°C, θJA = 90°C/ W (SW) Consult factory for Military grade parts. ELECTRICAL CHARACTERISTICS 12VIN = 12V, VVC = 2V, VFB = VREF = 1.25V, CGATE = 3000pF, TA = 25°C unless otherwise noted. SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS 15 12 22 mA mA 65 110 µA 1.25 1.35 V Supply and Protection I12VIN DC Active Supply Current (Note 2) Gate Output On Gate Output Off ● DC Standby Supply Current VRUN < 0.5V ● VRUN/SHDN Shutdown Rising Threshold ● 1.15 VSSHYST Shutdown Threshold Hysteresis 15 mV ISS Soft Start Charge Current ● 5 8 14 µA VUVLO Undervoltage Lockout Threshold - Falling Undervoltage Lockout Threshold - Rising Undervoltage Lockout Hysteresis ● ● ● 8.20 9.75 9.95 200 9.00 9.35 350 V V mV 4.75 5 5.25 V 5V Reference VREF5 IREF5 5V Reference Voltage Line, Load and Temperature ● 5V Reference Line Regulation 10V ≤ 12VIN ≤ 15V ● 5V Reference Load Range - DC Pulse 5V Reference Load Regulation ISC 3 ● ● 0 ≤ IREF5 ≤ 20mA –1.25 ● 5V Reference Short-Circuit Current 5 mV/V 10 20 mA mA –2 V/A 45 mA Error Amplifier VFB Error Amplifier Reference Voltage Measured at Feedback Pin 1.258 1.265 V V ● 0.1 0.5 1.0 µA 3200 IFB Feedback Input Current gm Error Amplifier Transconductance ● 1200 2000 AV Error Amplifier Voltage Gain ● 1500 3000 V/V IVC Error Amplifier Source Current Error Amplifier Sink Current VFB – VREF = 500mV ● ● 200 280 275 400 µA µA Absolute VC Clamp Voltage Measured at VC Pin 3.5 V VVC 2 VFB = VREF 1.242 1.235 1.250 ● µmho LT1680 ELECTRICAL CHARACTERISTICS 12VIN = 12V, VVC = 2V, VFB = VREF = 1.25V, CGATE = 3000pF, TA = 25°C unless otherwise noted. SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS 170 110 190 120 130 mV mV Error Amplifier VSENSE VIAVG Peak Current Limit Threshold Average Current Limit Threshold Measured at Sense Inputs Measured at Sense Inputs, VCMSENSE = 10V Average Current Limit Threshold Measured at IAVG Pin 2.5 V 15 V/V ● ● Current Sense Amplifier AV Amplifier DC Gain Measured at IAVG Pin VOS Amplifier Input Offset Voltage 2V < VCMSENSE < 60V, SENSE + – SENSE – = 5mV ● IBIAS Input Bias Current Sink (VCMSENSE > 5V) Source (VCMSENSE = 0V) ● ● fO ≤ 200kHz, RCT = 16.9k, CCT = 1000pF ● ● –5 LT1680C LT1680I ● ● 2.20 2.10 0.1 mV 45 700 75 1200 µA µA 200 5 kHz % 2.75 2.75 mA mA V Oscillator fO Operating Frequency, Free Run Frequency Programming Error ICT Timing Capacitor Discharge Current 2.5 2.5 VSYNC SYNC Input Threshold Rising Edge ● 0.8 2.0 fSYNC SYNC Frequency Range fSYNC ≤ 200kHz ● fO 1.4fO 12VIN ≤ 8.2V VRUN < 0.5V ● ● ● ● Output Drivers VGATE Undervoltage Output Clamp Standby Mode Output Clamp Gate Output On Voltage Gate Output Off Voltage 0.4 11 11.9 0.4 0.7 0.1 12 0.7 V V V V tGATER Gate Output Rise Time ● 60 200 ns tGATEF Gate Output Fall Time ● 60 140 ns The ● denotes specifications which apply over the full operating temperature range. Note 1: Absolute Maximum Ratings are those values beyond which the life of a device may be impaired. Note 2: Supply current specification does not include external FET gate charge currents. Actual supply currents will be higher and vary with operating frequency, operating voltages and the type of external FETs used. See Applications Information. 3 LT1680 U W TYPICAL PERFORMANCE CHARACTERISTICS I12VIN Supply Current vs Temperature I12VIN Supply Current vs 12VIN Supply Voltage 19 fO = 150kHz TA = 25°C 17 16 15 14 13 35 CG = 10nF 30 25 CG = 4.7nF 20 CG = 3.3nF CG = 1nF 12 11 –50 –25 0 25 50 75 100 GATE TRANSITION TIME (ns) I12VIN SUPPLY CURRENT (mA ) 18 I12VIN SUPPLY CURRENT (mA) Gate Transition Time vs CGATE 150 40 12 13 14 11 12VIN SUPPLY VOLTAGE (V) 1680 G01 • • tf tr 90 • • 70 • • 0 15 2500 5000 CGATE (pF) 7500 I12VIN Shutdown Current vs Temperature 60 10000 1680 G03 1680 G02 5VREF Short-Circuit Current vs Temperature VREF Voltage vs Temperature 80 1.252 75 1.251 55 50 45 40 35 30 – 50 –25 50 25 75 0 TEMPERATURE (°C) 100 VREF VOLTAGE (V) 5VREF = 0V I12VIN SHUTDOWN CURRENT (µA) 5VREF SHORT-CIRCUIT CURRENT (mA) 110 30 10 TEMPERATURE (°C) 70 65 60 50 –50 –25 125 50 25 75 0 TEMPERATURE (°C) 100 125 1.246 –50 –25 125 1680 G07 ERROR AMPLIFIER TRANSCONDUCTANCE (m ) ERROR AMPLIFIER VOLTAGE GAIN (kV/V) 100 4.0 3.5 3.0 2.5 2.0 1.5 1.0 –50 –25 50 25 75 0 TEMPERATURE (°C) 100 125 1680 G06 Ω 4.99 50 25 75 0 TEMPERATURE (°C) Error Amplifier Transconductance vs Temperature 4.5 5.00 4 1.248 Error Amplifier Voltage Gain vs Temperature 5.01 50 25 75 0 TEMPERATURE (°C) 1.249 1680 G05 5VREF Voltage vs Temperature 4.98 –50 –25 1.250 1.247 55 1680 G04 5VREF VOLTAGE (V) • 50 15 125 TA = 25°C 130 100 125 1680 G08 2.6 2.4 2.2 2.0 1.8 1.6 1.4 –50 –25 50 25 75 0 TEMPERATURE (°C) 100 125 1680 G09 LT1680 U W TYPICAL PERFORMANCE CHARACTERISTICS Error Amplifier Source Current vs Temperature SS Output Current vs Temperature 1.26 9 RUN/SHDN RISING THRESHOLD (V) SS OUTPUT CURRENT (µA) 325 300 275 250 8 7 225 200 –50 –25 50 25 75 0 TEMPERATURE (°C) 100 6 –50 –25 125 50 25 75 0 TEMPERATURE (°C) 1680 G10 1.23 1.22 1.21 1.20 –50 –25 125 50 25 75 0 TEMPERATURE (°C) 125 UVLO Thresholds vs Temperature 10.00 160 FULL OPERATING TEMPERATURE RANGE 150 13 100 1680 G12 Average Current Limit Threshold Sense Voltage vs Common Mode Voltage 14 9.75 9.50 140 RISING UPPER LIMIT 11 10 9 8 –50 –25 50 25 75 0 TEMPERATURE (°C) 100 130 V12VIN (V) VSENSE (mV) 12 TYPICAL 120 LOWER LIMIT 110 8.25 0 1 2 3 4 5 8.00 –50 –25 60 800 RUN/SHDN INPUT CURRENT (nA ) 1100 55 1000 IB(SINK) (µA) 50 45 40 600 35 500 25 50 75 100 125 TEMPERATURE (°C) 1680 G16 75 30 –50 –25 50 25 75 0 TEMPERATURE (°C) 100 125 RUN/SHDN Input Current vs Pin Voltage VCMSENSE = 10V 700 50 1680 G15 60 VCMSENSE = 0V 800 25 1680 G14 Sense Amplifier Input Bias Current (Sink) vs Temperature 900 0 TEMPERATURE (°C) VSENSE(CM) (V) 1200 0 FALLING 8.75 90 Sense Amplifier Input Bias Current (Source) vs Temperature 400 –50 –25 9.00 8.50 80 125 9.25 100 1680 G13 IB(SOURCE) (µA) 1.24 1680 G11 RUN/SHDN Threshold Hysteresis vs Temperature RUN/SHDN THRESHOLD HYSTERESIS (mV) 100 1.25 100 125 1680 G17 FULL OPERATING TEMPERATURE RANGE 700 600 500 400 UPPER LIMIT 300 200 100 0 0 .................................................................. ERROR AMPLIFIER SOURCE CURRENT (µA) 350 RUN/SHDN Rising Threshold vs Temperature TYPICAL LOWER LIMIT 1.0 (1.25) 1.5 0.5 RUN/SHDN PIN VOLTAGE (V) 2.0 1680 G18 5 LT1680 U W TYPICAL PERFORMANCE CHARACTERISTICS RUN/SHDN Input Current vs Pin Voltage 100 1.01 90 UPPER LIMIT 450 TYPICAL 300 LOWER LIMIT 150 IDISCHG = 2.75mA 80 70 60 50 IDISCHG = 2.1mA 40 30 20 FULL OPERATING TEMPERATURE RANGE 10 0 2 4 6 8 10 RUN/SHDN PIN VOLTAGE (V) 12 0 1 2 4 1680 G19 6 10 20 RCT (kΩ) 40 60 100 1680 G20 OPERATING FREQUENCY (NORMALIZED) FULL OPERATING TEMPERATURE RANGE MAXIMUM DUTY CYCLE (%) RUN/SHDN INPUT CURRENT (µA) 600 0 Operating Frequency (Normalized) vs Temperature Maximum Duty Cycle vs RCT 1.00 0.99 0.98 –50 –25 50 25 75 0 TEMPERATURE (°C) 100 125 1680 G21 U U U PIN FUNCTIONS SL/ADJ (Pin 1): Slope Compensation Adjustment. Allows increased slope compensation for certain high duty cycle applications. Resistive loading of this pin increases effective slope compensation. A resistor divider from the 5VREF pin can tailor the onset of additional slope compensation to specific regions in each switch cycle. Pin can be floated or connected to 5VREF if no additional slope compensation is required. (See Applications Information section for slope compensation details.) CT (Pin 2): Oscillator Timing Pin. Connect a capacitor (CCT) to ground and a pull-up resistor (RCT) to the 5VREF supply. Typical values are CCT = 1000pF and 10k ≤ RCT ≤ 30k. IAVG (Pin 3): Average Current Limit Integration. Frequency response characteristic is set using the 50kΩ output impedance and external capacitor to ground. Averaging roll-off is typically set 1 to 2 orders of magnitude below switching frequency. (Typical capacitor value = 1000pF for fO = 100kHz.) Shorting this pin to SGND will disable the average current limit function. In systems where open-loop inductor current occurs, such as boost supplies during output short-circuit condition and inrush periods, an external small-signal protection diode should be connected between IAVG and the VC pin (anode to IAVG pin, cathode to VC pin). See Applications Information. 6 SS (Pin 4): Soft Start. Generates ramping threshold for regulator current limit during start-up and after UVLO events by sourcing about 10µA into an external capacitor. VC (Pin 5): Error Amplifier Output. RC load creates dominant compensation in power supply regulation feedback loop to provide optimum transient response. (See Applications Information section for compensation details.) SGND (Pin 6): Small-Signal Ground. Connect to negative terminal of COUT. VFB (Pin 7): Error Amplifier Inverting Input. Used as voltage feedback input node for regulator loop. Pin sources about 0.5µA DC bias current to protect from an open feedback path condition. VREF (Pin 8): Bandgap Generated Voltage Reference Decoupling. Connect a capacitor to signal ground. (Typical capacitor value ≈ 0.1µF.) SENSE + (Pin 9): Current Sense Amplifier Inverting Input. Connect to most positive (DC) terminal of current sense resistor. SENSE – (Pin 10): Current Sense Amplifier Noninverting Input. Connect to most negative (DC) terminal of current sense resistor. LT1680 U U U PIN FUNCTIONS RUN/SHDN (Pin 11): Precision Referenced Shutdown. Can be used as logic level input for shutdown control or as an analog monitor for input supply undervoltage protection, etc. IC is enabled when RUN/SHDN pin rising edge exceeds 1.25V. 15mV of hysteresis helps assure stable mode switching. All internal functions are disabled in shutdown mode. If this function is not desired, connect RUN/SHDN to 12VIN (typically through a 100k resistor). See Applications Information. PGND (Pin 12): Power Ground. References the output switch and internal driver control circuits. Connect with low impedance trace to VIN decoupling capacitor negative (ground) terminal. GATE (Pin 13): Driver Output. Connect to gate of external power FET switch. 12VIN (Pin 14): 12V Power Supply Input. Bypass with at least 1µF to PGND. SYNC (Pin 15): Oscillator Synchronization Pin with TTL-Level Compatible Input. Input drives internal rising edge triggered one shot; SYNC signal on/off times should be ≥1µs (10% to 90% duty cycle at 100kHz). Does not contain internal pull-up. Connect to SGND if not used. 5VREF (Pin 16): 5V Reference Output. Allows connection of external loads up to 10mA DC. Reference is not available during shutdown. Typically bypassed with at least 1µF capacitor to SGND. W BLOCK DIAGRAM SYNC GATE REFERENCE 5V 1.25V 5VREF ONE SHOT – Q S VIN RSENSE UVLO CIRCUIT R RCT OSC CT CCT + SL/ADJ + ×15 VC – + VOUT SENSE + SENSE – IC1 VOUT CURRENT SENSE AMPLIFIER VREF – IAVG + + EA VFB – – 2.5V 12VIN SS 0.5µA 1.25V RUN SHDN 12V RUN/SHDN 10µA SOFT START – PGND CIRCUIT ENABLE + SGND 1680 BD 7 LT1680 U OPERATION Basic Control Loop The LT1680 uses a constant frequency, current mode architecture. The timing of the IC is provided through an internal oscillator circuit that can be synchronized to an external clock and is programmable to operate at frequencies up to 200kHz. The oscillator creates a modified sawtooth wave at its timing node (CT) with a slow charge, rapid discharge characteristic. During typical boost converter operation, the MOSFET switch is enabled at the start of each oscillator cycle. The switch stays enabled until the current through the switched inductor, sensed via the voltage across a series sense resistor (RSENSE), is sufficient to trip the current comparator (IC1) and reset the RS latch. When the switch is disabled, the inductor current is redirected to the supply output. If the current comparator threshold is not reached throughout the entire oscillator charge period, the RS latch is bypassed and the main switch is disabled during the oscillator discharge time. This “minimum off time” protects the switch, and is typically about 1µs. The current comparator trip threshold is set on the VC pin, which is the output of a transconductance amplifier, or error amplifier (EA). The error amplifier integrates the difference between a feedback voltage (on the VFB pin) and an internal bandgap generated reference voltage of 1.25V, forming a signal that represents required load current. If the supplied current is insufficient for a given load, the output will droop, thus reducing the feedback voltage. The error amplifier responds by forcing current out of the VC pin, increasing the current comparator threshold. Thus, the circuit will servo until the provided current is equal to the required load and the average output voltage is at the value programmed by the feedback resistors. Input Average Current Limit The output of the sense amplifier is monitored by a single pole integrator comprised of an external capacitor on the IAVG pin and an output impedance of approximately 50kΩ. If this averaged value signal exceeds a level corresponding to 120mV across the external sense resistor, the current comparator threshold is clamped and cannot continue to rise in response to the error amplifier. Thus, if average input current requirements exceed 120mV/RSENSE, the 8 supply will current limit and the output voltage will fall out of regulation. The average current limit circuit monitors the sense amplifier output without slope compensation or ripple current contributions. Therefore, the average input current limit threshold is unaffected by duty cycle. Undervoltage Lockout The LT1680 employs an undervoltage lockout circuit (UVLO) that monitors the 12VIN supply rail. This circuit disables the output drive capability of the LT1680 if the 12V supply drops below 9V. Unstable mode switching is prevented through 350mV of UVLO threshold hysteresis. Shutdown The LT1680 can be put into low current shutdown by pulling the RUN/SHDN pin low, disabling all circuit functions. The shutdown threshold is a bandgap referred voltage of 1.25V typical. Use of a precision threshold on the shutdown circuit enables use of this pin for undervoltage protection of the VIN supply and/or power supply sequencing. Soft Start The LT1680 incorporates a soft start function that operates by slowly increasing current limit. This limit is controlled by internally clamping the VC pin to a low voltage that climbs with time as an external capacitor on the SS pin is charged with about 10µA. This forces a graceful climb of output current source capability, and thus a graceful increase in output voltage until steadystate regulation is achieved. The soft start timing capacitor is clamped to ground during shutdown and during undervoltage lockout, yielding a graceful output recovery from either condition. 5V Internal Reference Power for the oscillator timing elements and most other internal LT1680 circuits is derived from an internal 5V reference, accessible at the 5VREF pin. This supply pin can be loaded with up to 10mA DC (20mA pulsed) for convenient biasing of local elements such as control logic, etc. LT1680 U OPERATION Slope Compensation For duty cycles greater than 50%, slope compensation is required to prevent current mode duty cycle instability in the regulator control loop. The LT1680 employs internal slope compensation that is adequate for most applica- tions. However, if additional slope compensation is desired, it is available through the SL/ADJ pin. Excessive slope compensation will cause reduction in maximum load current capability and is generally not desirable. U U W U APPLICATIONS INFORMATION RSENSE Selection for Input Current Limit RSENSE generates a voltage that is proportional to the inductor current for use by the LT1680 current sense amplifier. The value of RSENSE is based on the required input current. The average current limit function has a typical threshold of 120mV/RSENSE, or: RSENSE = 120mV/ILIMIT Operation with VSENSE common mode voltage below 4.5V may slightly degrade current limit accuracy. See Average Current Limit Threshold Tolerance vs Common Mode Voltage in the Typical Performance Characteristics section for more information. Output Voltage Programming Output voltage is programmed through a resistor feedback network to the VFB pin (Pin 7) on the LT1680. This pin is the inverting input of the error amplifier, which is internally referenced to 1.25V. The divider is ratioed to provide 1.25V at the VFB pin when the output is at its desired value. Output voltage is thus set following the relation: VOUT = 1.25V(1 + R2/R1) when an external resistor divider is connected to the output as shown in Figure 1. VOUT R2 LT1680 VFB SGND 7 R1 6 1680 F01 If high value feedback resistors are used, the input bias current of the VFB pin (1µA maximum) could cause a slight increase in output voltage. A Thevenin resistance at the VFB pin of < 5k is recommended. Oscillator Components RCT and CCT The LT1680 oscillator creates a modified sawtooth at its timing node (CT) with a slow charge, rapid discharge characteristic. The discharge time (tDISCH) corresponds to the minimum off time of the PWM controller. This limits maximum duty cycle (DCMAX) to: DCMAX = 1 – (tDISCH)(fO) This relation corresponds to the minimum value of the timing resistor (RCT), which can be determined according to the following relation (RCT vs DCMAX graph appears in the Typical Performance Characteristics section): RCT(MIN) ≈ [(0.8)(10 – 3)(1 – DCMAX)] – 1 Values for RCT > 15k yield maximum duty cycles above 90%. Given a timing resistor value, the value of the timing capacitor (CCT) can then be determined for desired operating frequency (fO) using the relation: (1/ fO ) – (100) 10– 9 CCT ≈ (RCT / 1.85) + – 31.75 (2.5) 10 – (3.375 / RCT ) A plot of Operating Frequency vs RCT and CCT is shown in Figure 2. Typical 100kHz operational values are CCT = 1000pF and RCT = 16.9k. Figure 1. Programming LT1680 Output Voltage 9 LT1680 U W U U APPLICATIONS INFORMATION and a soft start timing capacitor CSS, the start-up delay time to full available average current will be: 200 CCT = 0.68nF OSCILLATOR FREQUENCY (kHz) 180 CCT = 1nF tSS = (1.8)(105)(CSS) 160 CCT = 1.5nF 140 CCT = 2.2nF Shutdown Function—Input Undervoltage Detect and Threshold Hysteresis 120 100 80 60 40 3 7 11 15 19 23 27 31 35 39 43 47 TIMING RESISTOR (kΩ) 1680 F02 Figure 2. Operating Frequency vs RCT, CCT Average Current Limit The average current limit function is implemented using an external capacitor (CAVG) connected from IAVG to SGND. This capacitor forms a single pole integrator with the 50kΩ output impedance of the IAVG pin. The integrator corner frequency is typically set 1 to 2 orders of magnitude below the oscillator frequency and follows the relation: f– 3dB = (3.2)(10 – 6)/CAVG The average current limit function can be disabled by shorting the IAVG pin directly to SGND. In some applications it is theoretically possible for the average current limit circuit to overdrive the error amplifier output (VC pin) beyond the operating range of the current sense comparator. These applications include those where open-loop system operation occurs, such as boost regulators in output short-circuit condition, or in systems with poor signal ground integrity. The potential for this overdrive can be eliminated by connecting an external clamp diode between the IAVG and VC pins (anode to IAVG and cathode to VC). Connection of this diode will have no adverse effects in any system and is recommended. This clamp is required for all boost converter topologies. Soft Start Programming The LT1680 current control pin (VC) limits inductor current to zero at voltages less than ≈0.7V through full average current limit at VC ≈ 2.5V, yielding 1.8V over the full regulation range of average load current. With the SS pin at 0V, the VC pin is clamped to its zero inductor current level. Given the typical soft start charge current of 10µA 10 The LT1680 RUN/SHDN pin uses a bandgap generated reference threshold of about 1.25V. This precision threshold allows use of the RUN/SHDN pin for both logic-level shutdown applications and analog monitoring applications such as power supply sequencing. Because an LT1680 controlled converter is a power transfer device, a voltage that is lower than expected on the input supply could require currents that exceed the sourcing capabilities of that supply, causing the system to lockup in an undervoltage state. Input supply start-up protection can be achieved by enabling the RUN/SHDN pin using a resistor divider from the input supply to ground. Setting the divider output to 1.25V when the supply is almost fully enabled prevents the LT1680 regulator from drawing large currents until the input supply is able to supply the required power. If additional hysteresis is desired for the enable function, an external feedback resistor can be used from the LT1680 regulator output. If connection to the regulator output is not desired, the 5VREF internal supply pin can be used. Figure 3 shows an input supply sequencing configuration on a 24V input converter. This configuration yields an enable condition of 90% VIN (~ 21.5V) with about 10% threshold hysteresis. The shutdown function can be disabled by connecting the RUN/SHDN pin to the 12VIN rail. This pin is internally clamped to 2.5V through a 20k series input resistance and will therefore draw 0.5mA when tied directly to 12V. This VIN 24V 160k 16 390k LT1680 11 10k 5VREF RUN/SHDN 1680 F03 Figure 3. Input Supply Sequencing Programming LT1680 U W U U APPLICATIONS INFORMATION additional current can be minimized by making the connection through an external resistor (100k is typically used). MINIMUM SHUTDOWN CONTROL LIMIT (mV) When shutting down the LT1680, the RUN/SHDN pin voltage must remain between the shutdown threshold (~1.13V) and a minimum shutdown control limit voltage (see Figure 4) for a least 25µs. If a digital input or fast moving clamp is used, this can be achieved by forcing a shutdown control voltage above the minimum limit or by using a simple integrator to increase the fall time of the input signal. A single pole integrator stage must have a τ ≥ (7)(10 – 5). 800 DIGITAL INPUT R1 10k RUN/SHDN C1 10nF LT1680 1680 F06 Figure 6. Digital Input Shutdown Integration Control Figure 7 is an example of an integrator stage coupled with a 24V input power supply sequencing circuit similar to that shown in Figure 3. The integrator stage allows use of an active shutdown clamp for implementation of both usercontrolled shutdown and input power supply sequencing protection. VIN 24V R1 160k R3 390k 5VREF R4 10k 700 LT1680 RUN/SHDN SHDN R2 10k C1 10nF 1680 F07 600 Figure 7. Input Supply Sequencing with User-Controlled Shutdown 500 – 40 – 20 0 20 40 60 TEMPERATURE (°C) 80 1680 F04 Figure 4. Minimum Shutdown Control Limit vs Temperature Figure 5 is an example of a digital control input clamp. A logic high signal pulls the RUN/SHDN pin above its turnon threshold through the diode. When a shutdown (logic low) signal is received, the RUN/SHDN pin is forced to 0.95V via the resistor divider until shutdown is fully established and the 5VREF voltage collapses. Oscillator Synchronization The LT1680 oscillator generates a modified sawtooth waveform at the CT pin between low and high thresholds of 0.8V (vl) and 2.5V (vh) respectively. The oscillator can be synchronized by driving a TTL level pulse into the SYNC pin. This pin connects to a one shot circuit that reduces the oscillator high threshold to 2V for about 200ns. The SYNC input signal should have minimum on/off times of ≥1µs. SYNC 2.5V 5VREF 1N914 DIGITAL INPUT R1 43k (vh) 2V LT1680 VCT RUN/SHDN R2 10k 1680 F05 (vl) 0.8V FREE RUN SYNCHRONIZED 1680 F08 Figure 5. Digital Input Shutdown Level Control Figure 6 is an example of a digital control integration stage at the RUN/SHDN input. The integrator has a τ = (10)(103) • (10)(10 –9) = (1.0)(10 – 4). This circuit technique, however, delays initiation of controller shutdown about 125µs from the reception of the shutdown signal (5V – 0V transition). Figure 8. Free Run and Synchronized Oscillator Waveforms (at CT Pin) Inductor Selection The inductor for an LT1680 converter is selected based on output power, operating frequency and efficiency require- 11 LT1680 U W U U APPLICATIONS INFORMATION ments. Generally, the selection of inductor value can be reduced to desired maximum ripple current in the inductor (∆I). For a boost converter, the minimum inductor value for a given operating ripple current can be determined using the following relation: L MIN = ( ) (∆I)(fO)(VOUT ) VIN VOUT – VIN Given an inductor value (L), the peak inductor current is the sum of the average inductor current (IAVG) and half the inductor ripple current (∆I), or: IPK = IAVG + ( ) (2)(L)(fO)(VOUT ) VIN VOUT – VIN The inductor core type is determined by peak current and efficiency requirements. The inductor core must withstand this peak current without saturating, and the series winding resistance and core losses should be kept as small as is practical to maximize conversion efficiency. The LT1680 peak current threshold is 40% greater than the average limit threshold. Slope compensation effects reduce this margin as duty cycle increases. This margin must be maintained to prevent peak current limit from corrupting the programmed value for average current limit. Programming the peak ripple current to less than 15% of the desired average current limit value will assure proper operation of the average current limit feature through 90% duty cycle (see Slope Compensation). Slope Compensation Current mode switching regulators that operate with a duty cycle greater than 50% and have continuous inductor current can exhibit duty cycle instability. While a regulator will not be damaged and may even continue to function acceptably during this type of subharmonic oscillation, an irritating high-pitched squeal is usually produced. The criterion for current mode duty cycle instability is met when the increasing slope of the inductor ripple current is less than the decreasing slope, which is the case at duty cycles greater than 50%. This condition is illustrated in Figure 9a. The inductor ripple current starts 12 at I1, the beginning of each oscillator switch cycle. Current increases at a rate S1 until the current reaches the control trip level I2. The controller servo loop then disables the switch and inductor current begins to decrease at a rate S2. If the current switch point (I2) is perturbed slightly and increased by ∆I, the cycle time ends such that the minimum current point is increased by a factor of 1 + (S2/S1) to start the next cycle. On each successive cycle, this error is multiplied by a factor of S2/ S1. Therefore, if S2/S1 is ≥ 1, the system is unstable. Subharmonic oscillations can be eliminated by augmenting the increasing ripple current slope (S1) in the control loop. This is accomplished by adding an artificial ramp on the inductor current waveform internal to the IC (with a slope SX) as shown in Figure 9b. If the sum of the slopes S1 + SX is greater than S2, this condition for subharmonic oscillation no longer exists. ∆I T1 S1 + SX I2 I1 0 S1 S2 S1 S2 OSCILLATOR PERIOD 0 TIME a b 1680 F09 Figure 9. Inductor Current at DC > 50% and Slope Compensation Adjusted Signal For boost topologies, the required additional current waveform slope, or “Slope Compensation,” follows the relation: SX ≥ (S1)(2DC – 1) (1– DC) For duty cycles less than 50% (DC < 0.5), SX is negative and is not required. For duty cycles greater than 50%, SX takes on values dependent on S1 and duty cycle. S1 is simply VIN/ L. This leads to a minimum inductance requirement for a given VIN, duty cycle and slope compensation (SX) of: VIN (2DC – 1) S L MIN = X 1 – DC The LT1680 contains an internal slope compensation ramp that has an equivalent current referred value of: LT1680 U W U U APPLICATIONS INFORMATION fO SX = 0.084 RSENSE Amp/s where fO is oscillator frequency and RSENSE is the external current sense resistor. This yields a minimum inductance requirement of: (V )(R )(2DC – 1) L MIN ≥ IN SENSE [(0.084)(fO)(1− DC )] SX = A down side of slope compensation is that, since the IC servo loop senses an increase in perceived inductor current, the internal current limit functions are affected such that the maximum current capability of a regulator is reduced by the same amount as the effective current referred slope compensation. The LT1680, however, uses a current limit scheme that is independent of the slope compensation effects (Average Current Limiting). This provides operation at any duty cycle with no reduction in current sourcing capability, provided ripple current peak amplitude is less than 15% of the current limit value. For example, if the converter is set up to average current limit at 10A, as long as the peak inductor current is less than 11.5A, duty cycles up to 90% can be achieved without compromising the average current limit value. If an inductor smaller than the minimum required for internal slope compensation (calculated above as LMIN) is desired, additional slope compensation is necessary. The LT1680 provides this capability through the SL/ADJ pin. MAXIMUM PEAK RIPPLE CURRENT (IPK/IAVG) This feature is implemented by referencing this pin via a resistor divider from the 5VREF pin to ground. The additional slope compensation will be affected at the point in the oscillator waveform (at pin CT) corresponding to the voltage set by the resistor divider. Additional slope compensation can be calculated using the relation: 1.45 (2500)(fO) (RTH )(RSENSE ) Amp/s where RTH is the Thevenin resistance of the resistor divider. Actual compensation will actually be somewhat greater due to internal curvature correction circuitry that imposes an exponential increase in the slope compensation waveform, further increasing the effective compensation slope up to 20% for a given setting. Design example: VIN = 20V VOUT = 80V (DC = 0.75) RSENSE = 0.01Ω fO = 100kHz L = 20µH The minimum inductor usable with no additional slope compensation is: LMIN ≥ (20V)(0.01Ω)(1.5 – 1) = 47.6µH (0.084)(100000)(1– 0.75) Since L = 20µH is less than LMIN, additional slope compensation is necessary. The total slope compensation required is: 1.40 20V (1.5 – 1) 20µH SX ≥ = (2)(106 ) 1 – 0.75 1.35 1.30 1.25 Amp/s Subtracting the internally generated slope compensation and solving for the required effective resistance at SL/ADJ yields: 1.20 1.15 1.10 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 DUTY CYCLE 1680 F10 Figure 10. Maximum Peak Ripple Current (Normalized) vs Duty Cycle for Average Current Limit REQ ≤ (2500)(fO ) = 21.5k 6 (2) 10 (RSENSE ) – (0.084)(fO) 13 LT1680 U U W U APPLICATIONS INFORMATION Setting the resistor divider reference voltage to 2V assures that the additional compensation waveform will be enabled at a 75% duty cycle. As shown in Figure 11a, using RSL1 = 45k and RSL2 = 30k sets the desired reference voltage and has a RTH of 18k, which meets both design requirements. Figure 11b shows the slope compensation effective waveforms both with and without the SL/ADJ external resistors. 16 RSL1 45k RSL2 30k 5VREF LT1680 1 SL/ADJ 1680 F11a Figure 11a. External Slope Compensation Resistors In a typical LT1680 boost converter, the switch current is equal to the inductor current, but is chopped according to duty cycle (DC). The conduction loss (PLOSS) for a given FET RDS(ON) can be calculated using the relation: PLOSS ≈ (DC)(RDS(ON))(IAVG2 + [∆I2/12]) where IAVG = average inductor current and ∆I = peak-topeak inductor ripple current. The output diode is often a major source of power loss in switching regulators and selection of adequately rated diodes is important. In a boost converter, when the output voltage is significantly higher than the input voltage, the peak diode current becomes much higher than average output currents and diode current ratings must be observed with caution. The peak diode current is: ID(PEAK) = IAVG + ∆I/2 2.5V and the average power dissipation (PD) in the diode is: 2V PD = (IOUT)(Vf) where Vf is the forward voltage of the diode at peak current. The output diode must also be rated for maximum reverse voltages exceeding VOUT. 0.8V DC = 0.75 (0.084 + 0.139)(fO) RSENSE (0.084)(fO) RSENSE 1680 F11b Figure 11b. Slope Compensation Waveforms Power MOSFET and Output Rectifying Diode Selection LT1680 converter system parameters that dictate selection criteria for the switch MOSFET and output rectifying diode include maximum load current (IOUT), inductor average current (IAVG) and inductor ripple current (∆I), and maximum input and output voltages. The switch MOSFETs selected must have a maximum operating VDSS exceeding the maximum output voltage (VOUT). VGS rated operating maximums must exceed the 12VIN supply voltage. Once voltage requirements have been determined, switch conduction resistance (RDS(ON)) can be determined based on allowable power dissipation. 14 CIN and COUT Supply Decoupling Capacitor Selection The large currents typical of LT1680 applications require special consideration for the regulator input and output supply decoupling capacitors. Under normal steady state boost operation, output current provided by the converter is a square wave of duty cycle VIN/ VOUT, the average value being equal to the required DC load current (IOUT). The continuity of the load current is maintained by the output bypass capacitors. To prevent excessive output voltage ripple and undue capacitor heating (and associated catastrophic failure), low ESR output capacitors sized for the maximum RMS current must be used. This maximum capacitor RMS current follows the relation: V IRMS ≈ IOUT OUT – 1 VIN 1/ 2 Capacitor ripple current ratings are often based on only 2000 hours (3 months) lifetime; it is advisable to derate either the ESR or temperature rating of capacitors for increased MTBF. LT1680 U U W U APPLICATIONS INFORMATION The input bypass capacitors generally have less ripple current than the output bypass capacitors as the input current in a boost converter is continuous. Input bypass capacitor selection can be made using ripple current ratings. Peak-to-peak ripple current is equal to the inductor ripple current (∆IL). Efficiency Considerations and Heat Dissipation High output power applications create an inherent concern regarding power dissipation in regulator components. Although high efficiencies are achieved using the LT1680, the power dissipated in the regulator climbs to relatively high values when the load draws large amounts of power. Even at 90% efficiency, a 500W application has conversion loss of 55W. I2R dissipation in the MOSFET switch, sense resistor and inductor series resistance can generate substantial conversion loss under high current conditions. Generally, the dominant I2R loss is evidenced in the FET switch, which is proportional to the steady-state duty cycle, or conduction time of the switch. For example, in a 5V to 48V boost converter, the duty cycle is: DC = 1 – (VIN / VOUT) DC = 1 – 5/48 ≈ 90% The FET switch conducts inductor current for almost 90% of the cycle time, and thus may require increased consideration for dissipating I2R power. U PACKAGE DESCRIPTION Gate Drive Buffer The LT1680 is designed to drive relatively large capacitive loads. However, in certain applications, efficiency improvements can be realized by adding an external buffer stage to drive the gate of the FET switch. When the switch gate loads the driver output such that rise/fall times exceed 100ns, buffers can sometimes result in efficiency gains. Buffers can also reduce effects of back injection into the gate driver output due to coupling of switch node transitions through the switch FET CMILLER. Optimizing Transient Response– Compensation Component Values The dominant compensation point for an LT1680 converter is the VC pin (Pin 5), or error amplifier output. This pin connects to an external series RC network, RVC and CVC. The infinite permutations of input/output filtering, capacitor ESR, input voltage, load current, etc. make for an empirical method of optimizing loop response for a specific set of conditions. Loop response can be observed by injecting a step change in load current. This can be achieved by using a switchable load. With the load switching, the transient response of the output voltage can be observed with an oscilloscope. Iterating through RC combinations will yield optimized response. Refer to Application Note 19 in the 1990 Linear Applications Handbook, Volume 1 for more information. Dimensions in inches (millimeters) unless otherwise noted. N Package 16-Lead PDIP (Narrow 0.300) (LTC DWG # 05-08-1510) 0.130 ± 0.005 (3.302 ± 0.127) 0.300 – 0.325 (7.620 – 8.255) 0.009 – 0.015 (0.229 – 0.381) ( +0.035 0.325 –0.015 +0.889 8.255 –0.381 ) 0.770* (19.558) MAX 0.045 – 0.065 (1.143 – 1.651) 0.020 (0.508) MIN 0.065 (1.651) TYP 0.125 (3.175) MIN 0.100 ± 0.010 (2.540 ± 0.254) 0.018 ± 0.003 (0.457 ± 0.076) 16 15 14 13 12 11 10 1 2 3 4 5 6 7 9 0.255 ± 0.015* (6.477 ± 0.381) 8 N16 1197 *THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS. MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.010 INCH (0.254mm) Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights. 15 LT1680 U TYPICAL APPLICATION – 48V to 5V 30W Forward Converter 33Ω + 24k 220µF* 35V – 48V INPUT • 1.5nF 220µF* 35V + 1µF 63V L1 20µH MBR2045CT 220µF* 35V 1k 33Ω MBR2045CT + • *SANYO CV-GX **SANYO OS-CON ALL RESISTORS 1.4W, 1% UNLESS INDICATED OTHERWISE 5V 6A OUT • 220µF* 35V • 24k + • + • T1 INPUT COM 300pF 1.5nF 0.033µF 50Ω 1W 330µF** 6.3V OUTPUT COM 0.015Ω 1W IRF640 4.22k 10Ω MBR0520LT1 24k 9 78.7k BAV21 11 + 1M • 0.1µF 220µF 35V 5VREF 4.75k IAVG 2 SS 3 4 VFB SGND PGND VREF VC 5 6 12 8 0.22µF 0.1µF 16k 20k 2N3904 7 2.2nF 2N7000 SL/ADJ LT1680 CT 16 1µF 1 SYNC GATE 12VIN 7.5k 15 13 SENSE – RUN/SHDN 14 L1 10 SENSE + Q7 2N5401 1nF 0.1µF 20k 1k L1: PHILIPS EFD20-3F3-E63-S (CORE SET, AI = 63nH/T2) OUTPUT 18T BIFILAR 22AWG BIAS 54T BIFILAR 32AWG T1: COILTRONICS VP5-1200, 1:1:1:1:1:1 (SIX WINDINGS EACH 77µH) 1.2k 1680 TA03 U PACKAGE DESCRIPTION Dimensions in inches (millimeters) unless otherwise noted. SW Package 16-Lead Plastic Small Outline (Wide 0.300) (LTC DWG # 05-08-1620) 0.291 – 0.299** (7.391 – 7.595) 0.010 – 0.029 × 45° (0.254 – 0.737) 0.093 – 0.104 (2.362 – 2.642) 0.398 – 0.413* (10.109 – 10.490) 0.037 – 0.045 (0.940 – 1.143) 16 15 14 13 12 11 10 9 0° – 8° TYP 0.009 – 0.013 (0.229 – 0.330) NOTE 1 0.050 (1.270) TYP 0.016 – 0.050 (0.406 – 1.270) 0.004 – 0.012 (0.102 – 0.305) 0.394 – 0.419 (10.007 – 10.643) NOTE 1 0.014 – 0.019 (0.356 – 0.482) TYP NOTE: 1. PIN 1 IDENT, NOTCH ON TOP AND CAVITIES ON THE BOTTOM OF PACKAGES ARE THE MANUFACTURING OPTIONS. THE PART MAY BE SUPPLIED WITH OR WITHOUT ANY OF THE OPTIONS *DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE **DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE 1 2 3 4 5 6 7 8 S16 (WIDE) 0396 RELATED PARTS PART NUMBER DESCRIPTION COMMENTS LT1268 7.5A, 150kHz Switching Regulator Integrated Switch Can Be Used in Isolated Flyback Mode LT1270A 10A, 60kHz Switching Regulator Integrated Switch Can Be Used in Isolated Flyback Mode LT1339 High Power Synchronous DC/DC Controller Operation to 60V, No Shoot-Through N-Channel Output Drivers LT1370 500kHz, 6A Boost Switching Regulator Integrated Switch, Regulates Positive or Negative Outputs LT1371 500kHz, 3A Boost Switching Regulator Integrated Switch, Regulates Positive or Negative Outputs 16 Linear Technology Corporation 1630 McCarthy Blvd., Milpitas, CA 95035-7417 ● (408) 432-1900 FAX: (408) 434-0507● TELEX: 499-3977 ● www.linear-tech.com 1680f LT/TP 0298 4K • PRINTED IN USA LINEAR TECHNOLOGY CORPORATION 1997