MOTOROLA 2N5555

Order this document
by 2N5555/D
SEMICONDUCTOR TECHNICAL DATA
N–Channel — Depletion
1 DRAIN
3
GATE
2 SOURCE
MAXIMUM RATINGS
Rating
Symbol
Value
Unit
Drain – Source Voltage
VDS
25
Vdc
Drain – Gate Voltage
VDG
25
Vdc
Gate – Source Voltage
VGS
25
Vdc
Forward Gate Current
IGF
10
mAdc
Total Device Dissipation @ TC = 25°C
Derate above 25°C
PD
350
2.8
mW
mW/°C
Junction Temperature Range
TJ
– 65 to +150
°C
Storage Temperature Range
Tstg
– 65 to +150
°C
1
2
3
CASE 29–04, STYLE 5
TO–92 (TO–226AA)
ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise noted)
Symbol
Min
Max
Unit
V(BR)GSS
25
—
Vdc
Gate Reverse Current (VGS = 15 Vdc, VDS = 0)
IGSS
—
1.0
nAdc
Drain Cutoff Current (VDS = 12 Vdc, VGS = – 10 V)
Drain Cutoff Current (VDS = 12 Vdc, VGS = – 10 V, TA = 100°C)
ID(off)
—
—
10
2.0
nAdc
µAdc
IDSS
15
—
mAdc
VGS(f)
—
1.0
Vdc
Drain–Source On–Voltage
(ID = 7.0 mAdc, VGS = 0)
VDS(on)
—
1.5
Vdc
Static Drain–Source On Resistance
(ID = 0.1 mAdc, VGS = 0)
rDS(on)
—
150
Ohms
rds(on)
—
150
Ohms
Input Capacitance
(VDS = 15 Vdc, VGS = 0, f = 1.0 MHz)
Ciss
—
5.0
pF
Reverse Transfer Capacitance
(VDS = 0, VGS = 10 Vdc, f = 1.0 MHz)
Crss
—
1.2
pF
(VDD = 10 Vdc, ID(on)
( ) = 7.0 mAdc,
VGS(on) = 0,
0 VGS(off) = –10
10 Vdc)
Vd ) (See
(S Figure
Fi
1)
td(on)
—
5.0
ns
tr
—
5.0
ns
(VDD = 10 Vdc, ID(on)
( ) = 7.0 mAdc,
VGS(on) = 0,
0 VGS(off) = –10
10 Vdc)
Vd ) (See
(S Figure
Fi
1)
td(off)
—
15
ns
tf
—
10
ns
Characteristic
OFF CHARACTERISTICS
Gate – Source Breakdown Voltage (IG = 10 µAdc, VDS = 0)
ON CHARACTERISTICS
Zero – Gate –Voltage Drain Current(1)
(VDS = 15 Vdc, VGS = 0)
Gate–Source Forward Voltage
(IG(f) = 1.0 mAdc, VDS = 0)
SMALL– SIGNAL CHARACTERISTICS
Small–Signal Drain–Source “ON” Resistance
(VGS = 0, ID = 0, f = 1.0 kHz)
SWITCHING CHARACTERISTICS
Turn–On Delay Time
Rise Time
Turn–Off Delay Time
Fall Time
1. Pulse Test: Pulse Width < 300 µs, Duty Cycle < 3.0%.
Motorola Small–Signal Transistors, FETs and Diodes Device Data
 Motorola, Inc. 1997
1
2N5555
PULSE WIDTH
90%
VDD
TEKTRONIX
567
SAMPLING
SCOPE
50 OHM
COAXIAL
CABLE
1.0 k
10 k
PULSE
GENERATOR
(50 OHMS)
INPUT
50%
10%
INPUT PULSE
RISE TIME
50 OHM COAXIAL CABLE
1.0 k
VGS(on)
90%
50%
10%
VGS(off)
INPUT PULSE
FALL TIME
Rin =
50 OHMS
50
td(on)
OUTPUT
td(off)
10%
INPUT PULSE
RISE TIME < 1.0 ns
FALL TIME < 1.0 ns
NOMINAL VALUE OF “ON” PULSE WIDTH = 400 ns
DUTY CYCLE ≤ 1.0%
GENERATOR SOURCE IMPEDANCE = 50 OHMS
10%
90%
90%
tr
tf
Figure 1. Switching Times Test Circuit
POWER GAIN
24
f = 100 MHz
PG , POWER GAIN (dB)
20
16
12
400 MHz
Tchannel = 25°C
VDS = 15 Vdc
VGS = 0 V
8.0
4.0
2.0
0
4.0
6.0
8.0
10
ID, DRAIN CURRENT (mA)
12
14
Figure 2. Effects of Drain Current
NEUTRALIZING
COIL
INPUT
TO 50 Ω
SOURCE
C2
L1
C1
C4
C5
Rg′
Adjust VGS for
ID = 50 mA
VGS < 0 Volts
*L2
*L3
TO 500 Ω
LOAD
L2
CASE
L3
C6
C7
VGS
*L1
C3
NOTE:
COMMON
VDS
+15 V
ID = 5.0 mA
The noise source is a hot–cold body
(AIL type 70 or equivalent) with a
test receiver (AIL type 136 or equivalent).
17 turns, (approx. — depends upon circuit layout) AWG #28
enameled copper wire, close wound on 9/32″ ceramic coil
form. Tuning provided by a powdered iron slug.
4–1/2 turns, AWG #18 enameled copper wire, 5/16″ long,
3/8″ I.D. (AIR CORE).
3–1/2 turns, AWG #18 enameled copper wire, 1/4″ long,
3/8″ I.D. (AIR CORE).
**L1
**L2
**L3
VALUE
Reference
Designation
100 MHz
400 MHz
C1
7.0 pF
1.8 pF
C2
1000 pF
17 pF
C3
3.0 pF
1.0 pF
C4
1–12 pF
0.8–8.0 pF
C5
1–12 pF
0.8–8.0 pF
C6
0.0015 µF
0.001 µF
C7
0.0015 µF
0.001 µF
L1
3.0 µH*
0.2 µH**
L2
0.15 µH*
0.03 µH**
L3
0.14 µH*
0.022 µH**
6 turns, (approx. — depends upon circuit layout) AWG #24
enameled copper wire, close wound on 7/32″ ceramic coil
form. Tuning provided by an aluminum slug.
1 turn, AWG #16 enameled copper wire, 3/8″ I.D.
(AIR CORE).
1/2 turn, AWG #16 enameled copper wire, 1/4″ I.D.
(AIR CORE).
Figure 3. 100 MHz and 400 MHz Neutralized Test Circuit
2
Motorola Small–Signal Transistors, FETs and Diodes Device Data
2N5555
NOISE FIGURE
(Tchannel = 25°C)
10
6.5
ID = 5.0 mA
VDS = 15 V
VGS = 0 V
5.5
NF, NOISE FIGURE (dB)
NF, NOISE FIGURE (dB)
8.0
6.0
f = 400 MHz
4.0
2.0
4.5
f = 400 MHz
3.5
2.5
100 MHz
0
100 MHz
1.5
0
2.0
4.0 6.0 8.0
10
12
14
16
VDS, DRAIN–SOURCE VOLTAGE (VOLTS)
18
0
20
4.0
6.0
8.0
10
ID, DRAIN CURRENT (mA)
2.0
Figure 4. Effects of Drain–Source Voltage
12
14
Figure 5. Effects of Drain Current
INTERMODULATION CHARACTERISTICS
Pout , OUTPUT POWER PER TONE (dB)
+ 40
3RD ORDER INTERCEPT
+ 20
VDS = 15 Vdc
f1 = 399 MHz
f2 = 400 MHz
0
– 20
– 40
– 60
– 80
– 100
FUNDAMENTAL
OUTPUT @ IDSS,
0.25 IDSS
– 120
– 140
– 160
– 120
– 100
3RD ORDER IMD
OUTPUT @ IDSS,
0.25 IDSS
– 80
– 60
– 40
– 20
Pin, INPUT POWER PER TONE (dB)
0
+ 20
Figure 6. Third Order Intermodulation Distortion
Motorola Small–Signal Transistors, FETs and Diodes Device Data
3
2N5555
COMMON SOURCE CHARACTERISTICS
30
20
grs , REVERSE TRANSADMITTANCE (mmhos)
brs , REVERSE SUSCEPTANCE (mmhos)
gis, INPUT CONDUCTANCE (mmhos)
bis, INPUT SUSCEPTANCE (mmhos)
ADMITTANCE PARAMETERS
(VDS = 15 Vdc, Tchannel = 25°C)
bis @ IDSS
10
7.0
5.0
3.0
gis @ IDSS
2.0
gis @ 0.25 IDSS
1.0
0.7
0.5
0.3
10
bis @ 0.25 IDSS
20
30
50 70 100
200 300
f, FREQUENCY (MHz)
500 700 1000
5.0
3.0
2.0
brs @ IDSS
1.0
0.7
0.5
0.25 IDSS
0.3
0.2
0.1
0.07
0.05
grs @ IDSS, 0.25 IDSS
10
20
gfs @ IDSS
gfs @ 0.25 IDSS
3.0
2.0
1.0
0.7
0.5
|bfs| @ IDSS
|bfs| @ 0.25 IDSS
500 700 1000
5.0
bos @ IDSS and 0.25 IDSS
2.0
1.0
0.5
0.2
gos @ IDSS
0.1
0.05
gos @ 0.25 IDSS
0.02
0.01
20
30
50 70 100
200 300
f, FREQUENCY (MHz)
500 700 1000
Figure 9. Forward Transadmittance (yfs)
4
50 70 100
200 300
f, FREQUENCY (MHz)
10
10
7.0
5.0
0.3
0.2
10
30
Figure 8. Reverse Transfer Admittance (yrs)
gos, OUTPUT ADMITTANCE (mhos)
bos, OUTPUT SUSCEPTANCE (mhos)
gfs, FORWARD TRANSCONDUCTANCE (mmhos)
|b fs|, FORWARD SUSCEPTANCE (mmhos)
Figure 7. Input Admittance (yis)
20
10
20
30
50 70 100
200 300
f, FREQUENCY (MHz)
500 700 1000
Figure 10. Output Admittance (yos)
Motorola Small–Signal Transistors, FETs and Diodes Device Data
2N5555
COMMON SOURCE CHARACTERISTICS
S–PARAMETERS
(VDS = 15 Vdc, Tchannel = 25°C, Data Points in MHz)
30°
20°
10°
0°
1.0
40°
350°
100
340°
330°
320°
40°
310°
50°
20°
10°
330°
0.4
320°
310°
ID = IDSS, 0.25 IDSS
300
0.8
900
500
ID = IDSS
60°
800
300°
400
60°
500
0.7
600
0.6
300°
0.1
500
70°
290°
400
700
800
700
800
290°
0.2
700
600
600
90°
340°
0.3
400
80°
350°
300
200
50°
70°
0°
200
100
0.9
30°
ID = 0.25 IDSS
280°
80°
300
280°
0.0
200
900
270°
90°
100°
260°
100°
260°
110°
250°
110°
250°
120°
240°
120°
240°
130°
230°
130°
230°
140°
220°
140°
220°
900
150°
160°
170°
180°
190°
200°
210°
150°
160°
Figure 11. S11s
30°
20°
10°
0°
350°
170°
340°
330°
30°
20°
10°
80°
90°
700
110°
0.4
800
600
100°
210°
0°
350°
340°
330°
100 200
ID = 0.25 IDSS
300
1.0
400
100 200
500
300
600
400
700
0.9
500
800
600
ID = IDSS
700
900
800
900
0.8
310°
50°
300°
60°
290°
70°
280°
80°
270°
90°
270°
260°
100°
260°
250°
110°
250°
240°
120°
240°
230°
130°
230°
220°
140°
220°
320°
310°
300°
0.7
290°
900
700
600
200°
40°
0.5
60°
900
190°
320°
0.6
50°
800
180°
Figure 12. S12s
40°
70°
270°
100
500
0.3
ID = 0.25 IDSS
500
0.3
100
400
400
280°
0.6
300
200
0.4
100
0.5
300
120°
ID = IDSS
200
130°
0.6
140°
150°
160°
170°
180°
190°
200°
210°
Figure 13. S21s
Motorola Small–Signal Transistors, FETs and Diodes Device Data
150°
160°
170°
180°
190°
200°
210°
Figure 14. S22s
5
2N5555
COMMON GATE CHARACTERISTICS
ADMITTANCE PARAMETERS
(VDG = 15 Vdc, Tchannel = 25°C)
10
7.0
5.0
grg , REVERSE TRANSADMITTANCE (mmhos)
brg , REVERSE SUSCEPTANCE (mmhos)
gig, INPUT CONDUCTANCE (mmhos)
big, INPUT SUSCEPTANCE (mmhos)
20
gig @ IDSS
3.0
grg @ 0.25 IDSS
2.0
1.0
0.7
0.5
big @ IDSS
big @ 0.25 IDSS
0.3
0.2
10
20
30
50 70 100
200 300
f, FREQUENCY (MHz)
500 700 1000
0.5
0.3
brg @ IDSS
0.2
0.1
0.07
0.05
0.25 IDSS
0.03
0.02
0.01
0.007
0.005
gig @ IDSS, 0.25 IDSS
10
10
7.0
5.0
gfg @ IDSS
3.0
gfg @ 0.25 IDSS
2.0
1.0
0.7
0.5
bfg @ IDSS
0.3
brg @ 0.25 IDSS
0.2
50 70 100
200 300
f, FREQUENCY (MHz)
500 700 1000
1.0
0.7
0.5
bog @ IDSS, 0.25 IDSS
0.3
0.2
0.1
0.07
0.05
gog @ IDSS
0.03
0.02
gog @ 0.25 IDSS
0.1
0.01
10
20
30
50 70 100
200 300
f, FREQUENCY (MHz)
500 700 1000
Figure 17. Forward Transfer Admittance (yfg)
6
30
Figure 16. Reverse Transfer Admittance (yrg)
gog, OUTPUT ADMITTANCE (mmhos)
bog, OUTPUT SUSCEPTANCE (mmhos)
gfg , FORWARD TRANSCONDUCTANCE (mmhos)
bfg , FORWARD SUSCEPTANCE (mmhos)
Figure 15. Input Admittance (yig)
20
10
20
30
50 70 100
200 300
f, FREQUENCY (MHz)
500 700 1000
Figure 18. Output Admittance (yog)
Motorola Small–Signal Transistors, FETs and Diodes Device Data
2N5555
COMMON GATE CHARACTERISTICS
S–PARAMETERS
(VDS = 15 Vdc, Tchannel = 25°C, Data Points in MHz)
30°
20°
10°
0°
350°
340°
330°
30°
0.7
40°
100
310°
50°
300°
60°
290°
70°
280°
80°
0°
350°
340°
330°
320°
0.04
200
300
0.03
400
100
500
200
0.5
ID = IDSS
0.4
310°
600
300
60°
70°
40°
10°
ID = 0.25 IDSS
0.6
50°
320°
20°
0.02
700
400
500
300°
800
600
900
0.01
290°
700
80°
800
0.3
900
90°
270°
100°
260°
90°
250°
270°
500
600
100°
ID = IDSS
110°
280°
0.0
100
110°
700
600
700
260°
ID = 0.25 IDSS
250°
0.01
800
120°
240°
120°
240°
800
0.02
900
130°
230°
130°
230°
900
140°
220°
150°
160°
170°
180°
190°
200°
140°
210°
20°
10°
0°
350°
150°
160°
170°
340°
330°
30°
20°
10°
40°
320°
0°
1.5
1.0
100
100
0.4
50°
180°
190°
200°
210°
340°
330°
Figure 20. S12g
0.5
40°
220°
0.04
Figure 19. S11g
30°
0.03
ID = IDSS
350°
300
200
500
320°
400
700
600
800
0.9
900
310°
50°
300°
60°
290°
70°
280°
80°
270°
90°
270°
100°
260°
100°
260°
110°
250°
110°
250°
120°
240°
120°
240°
130°
230°
130°
230°
140°
220°
140°
220°
100
ID = IDSS, 0.25 IDSS
0.3
0.8
60°
0.2
70°
310°
ID = 0.25 IDSS
80°
0.1
300°
0.7
290°
280°
0.6
900
90°
900
150°
160°
170°
180°
190°
200°
210°
Figure 21. S21g
Motorola Small–Signal Transistors, FETs and Diodes Device Data
150°
160°
170°
180°
190°
200°
210°
Figure 22. S22g
7
2N5555
PACKAGE DIMENSIONS
A
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. CONTOUR OF PACKAGE BEYOND DIMENSION R
IS UNCONTROLLED.
4. DIMENSION F APPLIES BETWEEN P AND L.
DIMENSION D AND J APPLY BETWEEN L AND K
MINIMUM. LEAD DIMENSION IS UNCONTROLLED
IN P AND BEYOND DIMENSION K MINIMUM.
B
R
P
L
F
SEATING
PLANE
K
DIM
A
B
C
D
F
G
H
J
K
L
N
P
R
V
D
X X
G
J
H
V
C
SECTION X–X
1
N
N
CASE 029–04
(TO–226AA)
ISSUE AD
INCHES
MIN
MAX
0.175
0.205
0.170
0.210
0.125
0.165
0.016
0.022
0.016
0.019
0.045
0.055
0.095
0.105
0.015
0.020
0.500
–––
0.250
–––
0.080
0.105
–––
0.100
0.115
–––
0.135
–––
MILLIMETERS
MIN
MAX
4.45
5.20
4.32
5.33
3.18
4.19
0.41
0.55
0.41
0.48
1.15
1.39
2.42
2.66
0.39
0.50
12.70
–––
6.35
–––
2.04
2.66
–––
2.54
2.93
–––
3.43
–––
STYLE 5:
PIN 1. DRAIN
2. SOURCE
3. GATE
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the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit, and
specifically disclaims any and all liability, including without limitation consequential or incidental damages. “Typical” parameters which may be provided in Motorola
data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals”
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8
◊
2N5555/D
Motorola Small–Signal Transistors, FETs and Diodes Device
Data