ONSEMI J310

MOTOROLA
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by J308/D
SEMICONDUCTOR TECHNICAL DATA
JFET VHF/UHF Amplifiers
J308
N–Channel — Depletion
J309
1 DRAIN
J310
3
GATE
Motorola Preferred Devices
2 SOURCE
MAXIMUM RATINGS
Rating
Symbol
Value
Unit
Drain – Source Voltage
VDS
25
Vdc
Gate–Source Voltage
VGS
25
Vdc
Forward Gate Current
IGF
10
mAdc
Total Device Dissipation @ TA = 25°C
Derate above 25°C
PD
350
2.8
mW
mW/°C
Junction Temperature Range
TJ
– 65 to +125
°C
Storage Temperature Range
Tstg
– 65 to +150
°C
1
2
3
CASE 29–04, STYLE 5
TO–92 (TO–226AA)
ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise noted)
Characteristic
Symbol
Min
Typ
Max
Unit
V(BR)GSS
– 25
—
—
Vdc
—
—
—
—
–1.0
–1.0
nAdc
µAdc
– 1.0
– 1.0
– 2.0
—
—
—
– 6.5
– 4.0
– 6.5
12
12
24
—
—
—
60
30
60
—
—
1.0
—
—
—
0.7
0.7
0.5
—
—
—
OFF CHARACTERISTICS
Gate – Source Breakdown Voltage
(IG = –1.0 µAdc, VDS = 0)
Gate Reverse Current
(VGS = –15 Vdc, VDS = 0, TA = 25°C)
(VGS = –15 Vdc, VDS = 0, TA = +125°C)
Gate Source Cutoff Voltage
(VDS = 10 Vdc, ID = 1.0 nAdc)
IGSS
VGS(off)
J308
J309
J310
Vdc
ON CHARACTERISTICS
Zero – Gate –Voltage Drain Current(1)
(VDS = 10 Vdc, VGS = 0)
IDSS
J308
J309
J310
Gate–Source Forward Voltage
(VDS = 0, IG = 1.0 mAdc)
VGS(f)
mAdc
Vdc
SMALL– SIGNAL CHARACTERISTICS
Common–Source Input Conductance
(VDS = 10 Vdc, ID = 10 mAdc, f = 100 MHz)
Re(yis)
J308
J309
J310
mmhos
Common–Source Output Conductance
(VDS = 10 Vdc, ID = 10 mAdc, f = 100 MHz)
Re(yos)
—
0.25
—
mmhos
Common–Gate Power Gain
(VDS = 10 Vdc, ID = 10 mAdc, f = 100 MHz)
Gpg
—
16
—
dB
1. Pulse Test: Pulse Width
v 300 µs, Duty Cycle v 3.0%.
Motorola Small–Signal Transistors, FETs and Diodes Device Data
 Motorola, Inc. 1997
1
J308 J309 J310
ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise noted) (Continued)
Characteristic
Symbol
Min
Typ
Max
Unit
Common–Source Forward Transconductance
(VDS = 10 Vdc, ID = 10 mAdc, f = 100 MHz)
Re(yfs)
—
12
—
mmhos
Common–Gate Input Conductance
(VDS = 10 Vdc, ID = 10 mAdc, f = 100 MHz)
Re(yig)
—
12
—
mmhos
8000
10000
8000
—
—
—
20000
20000
18000
—
—
250
—
—
—
13000
13000
12000
—
—
—
—
—
—
150
100
150
—
—
—
SMALL– SIGNAL CHARACTERISTICS (continued)
Common–Source Forward Transconductance
(VDS = 10 Vdc, ID = 10 mAdc, f = 1.0 kHz)
Common–Source Output Conductance
(VDS = 10 Vdc, ID = 10 mAdc, f = 1.0 kHz)
Common–Gate Forward Transconductance
(VDS = 10 Vdc, ID = 10 mAdc, f = 1.0 kHz)
Common–Gate Output Conductance
(VDS = 10 Vdc, ID = 10 mAdc, f = 1.0 kHz)
µmhos
gfs
J308
J309
J310
gos
µmhos
gfg
J308
J309
J310
µmhos
gog
J308
J309
J310
µmhos
Gate–Drain Capacitance
(VDS = 0, VGS = –10 Vdc, f = 1.0 MHz)
Cgd
—
1.8
2.5
pF
Gate–Source Capacitance
(VDS = 0, VGS = –10 Vdc, f = 1.0 MHz)
Cgs
—
4.3
5.0
pF
Noise Figure
(VDS = 10 Vdc, ID = 10 mAdc, f = 450 MHz)
NF
—
1.5
—
dB
Equivalent Short–Circuit Input Noise Voltage
(VDS = 10 Vdc, ID = 10 mAdc, f = 100 Hz)
en
—
10
—
nVń ǸHz
FUNCTIONAL CHARACTERISTICS
2
Motorola Small–Signal Transistors, FETs and Diodes Device Data
J308 J309 J310
50 Ω
SOURCE
50 Ω
LOAD
U310
C3
L2P
L1
L2S
C2
C1
C4
C6
C5
C7
1.0 k
RFC
+VDD
C1 = C2 = 0.8 – 10 pF, JFD #MVM010W.
C3 = C4 = 8.35 pF Erie #539–002D.
C5 = C6 = 5000 pF Erie (2443–000).
C7 = 1000 pF, Allen Bradley #FA5C.
RFC = 0.33 µH Miller #9230–30.
L1 = One Turn #16 Cu, 1/4″ I.D. (Air Core).
L2P = One Turn #16 Cu, 1/4″ I.D. (Air Core).
L2S = One Turn #16 Cu, 1/4″ I.D. (Air Core).
60
60
TA = – 55°C
50
50
+ 25°C
IDSS
+ 25°C
40
40
30
30
+150°C
20
20
+ 25°C
– 55°C
10
–5.0
+150°C 10
30
20
+150°C
15
+ 25°C
– 55°C
10
+150°C
0
5.0
4.0
Yos
VGS(off) = – 2.3 V =
VGS(off) = – 5.7 V =
0
10
10
120
RDS
CAPACITANCE (pF)
Yos, OUTPUT ADMITTANCE (µ mhos)
Yfs , FORWARD TRANSCONDUCTANCE (µmhos)
100
1.0 k
1.0
2.0
Figure 3. Forward Transconductance
versus Gate–Source Voltage
Yfs
10 k
3.0
VGS, GATE–SOURCE VOLTAGE (VOLTS)
1.0 k
Yfs
+ 25°C
25
Figure 2. Drain Current and Transfer
Characteristics versus Gate–Source Voltage
100 k
TA = – 55°C
VDS = 10 V
f = 1.0 MHz
5.0
0
0
–1.0
–4.0
–3.0
–2.0
ID – VGS, GATE–SOURCE VOLTAGE (VOLTS)
IDSS – VGS, GATE–SOURCE CUTOFF VOLTAGE (VOLTS)
35
96
7.0
72
Cgs
4.0
48
24
Cgd
R DS , ON RESISTANCE (OHMS)
VDS = 10 V
IDSS, SATURATION DRAIN CURRENT (mA)
70
70
I D , DRAIN CURRENT (mA)
Yfs , FORWARD TRANSCONDUCTANCE (mmhos)
Figure 1. 450 MHz Common–Gate Amplifier Test Circuit
1.0
100
0.01
1.0
0.1 0.2 0.3 0.5 1.0 2.0 3.0 5.0 10 20 30 50 100
ID, DRAIN CURRENT (mA)
Figure 4. Common–Source Output
Admittance and Forward Transconductance
versus Drain Current
Motorola Small–Signal Transistors, FETs and Diodes Device Data
0
10
9.0
8.0
7.0
6.0
5.0
4.0
3.0
2.0
1.0
0
0
VGS, GATE SOURCE VOLTAGE (VOLTS)
Figure 5. On Resistance and Junction
Capacitance versus Gate–Source Voltage
3
J308 J309 J310
|S21|, |S11|
0.85 0.45
2.4
0.79 0.39
|S12|, |S22|
0.060 1.00
S22
VDS = 10 V
ID = 10 mA
TA = 25°C
24
3.0
0.048 0.98
S21
Y11
18
1.8
Y21
12
1.2
0.73 0.33
VDS = 10 V
ID = 10 mA
TA = 25°C
0.67 0.27
0.024 0.94
0.61 0.21
0.6
0.012 0.92
S12
Y12
0
100
200
300
500
f, FREQUENCY (MHz)
700
0.55 0.15
100
1000
Figure 6. Common–Gate Y Parameter
Magnitude versus Frequency
θ22
160°
40°
200
300
500
f, FREQUENCY (MHz)
θ11, θ12
– 20° 120°
– 40°
0.90
86°
– 40° 100°
85°
– 60°
80°
– 120° 84°
– 80°
60°
– 100°
40°
– 120°
20°
100
θ21, θ22
0
θ11
– 20°
θ21
700 1000
Figure 7. Common–Gate S Parameter
Magnitude versus Frequency
θ12, θ22
– 20° 87°
θ21, θ11
180° 50°
170°
0.036 0.96
S11
Y22
6.0
Y12 (mmhos)
|Y11|, |Y21 |, |Y22 | (mmhos)
30
θ21
θ22
– 20°
– 60°
– 80°
30°
– 40°
– 100°
20°
140°
10°
θ12
θ11
130°
0°
100
– 140°
VDS = 10 V
ID = 10 mA
TA = 25°C
200
300
500
f, FREQUENCY (MHz)
– 180°
– 200° 82°
1000
Figure 8. Common–Gate Y Parameter
Phase–Angle versus Frequency
8.0
7.0
21
6.0
18
15
Gpg
4.0
12
NF
3.0
9.0
2.0
6.0
1.0
3.0
6.0
8.0
θ11
200
300
500
f, FREQUENCY (MHz)
700
– 80°
– 100°
1000
26
VDD = 20 V
f = 450 MHz
BW ≈ 10 MHz
CIRCUIT IN FIGURE 1
5.0
0
4.0
10 12
14 16
18
ID, DRAIN CURRENT (mA)
20
Figure 10. Noise Figure and
Power Gain versus Drain Current
4
24
22
0
24
NF, NOISE FIGURE (dB)
6.0
VDS = 10 V
ID = 10 mA
TA = 25°C
Figure 9. S Parameter Phase–Angle
versus Frequency
G pg , POWER GAIN (dB)
NF, NOISE FIGURE (dB)
7.0
– 60°
θ12
– 160° 83°
700
θ21
22
5.0
4.0
3.0
2.0
18
Gpg
VDS = 10 V
ID = 10 mA
TA = 25°C
CIRCUIT IN FIGURE 1
14
10
NF
G pg , POWER GAIN (dB)
150°
6.0
1.0
2.0
0
50
100
200 300
f, FREQUENCY (MHz)
500 700 1000
Figure 11. Noise Figure and Power Gain
versus Frequency
Motorola Small–Signal Transistors, FETs and Diodes Device Data
J308 J309 J310
C1
C6
U310
S
D
G
C3
L1
INPUT
RS = 50 Ω
C4
L3
OUTPUT
RL = 50 Ω
C5
C2
L2
L4
VS
C1 = 1–10 pF Johanson Air variable trimmer.
C2, C5 = 100 pF feed thru button capacitor.
C3, C4, C6 = 0.5–6 pF Johanson Air variable
trimmer.
L1 = 1/8″ x 1/32″ x 1–5/8″ copper bar.
L2, L4 = Ferroxcube Vk200 choke.
L3 = 1/8″ x 1/32″ x 1–7/8″ copper bar.
VD
SHIELD
BW (3 dB) – 36.5 MHz
ID – 10 mAdc
VDS – 20 Vdc
Device case grounded
IM test tones – f1 = 449.5 MHz, f2 = 450.5 MHz
Figure 12. 450 MHz IMD Evaluation Amplifier
Amplifier power gain and IMD products are a function of the load impedance. For the amplifier design shown above with C4 and
C6 adjusted to reflect a load to the drain resulting in a nominal power gain of 9 dB, the 3rd order intercept point (IP) value is
29 dBm. Adjusting C4, C6 to provide larger load values will result in higher gain, smaller bandwidth and lower IP values. For
example, a nominal gain of 13 dB can be achieved with an intercept point of 19 dBm.
OUTPUT POWER PER TONE (dBm)
+40
+20
0
–20
–40
U310 JFET
VDS = 20 Vdc
ID = 10 mAdc
F1 = 449.5 MHz
F2 = 450.5 MHz
3RD ORDER INTERCEPT POINT
FUNDAMENTAL OUTPUT
Example of intercept point plot use:
Assume two in–band signals of –20 dBm at the amplifier input.
They will result in a 3rd order IMD signal at the output of
–90 dBm. Also, each signal level at the output will be
–11 dBm, showing an amplifier gain of 9.0 dB and an
intermodulation ratio (IMR) capability of 79 dB. The gain and
IMR values apply only for signal levels below comparison.
–60
–80
3RD ORDER IMD OUTPUT
–100
–120
–120
–100
–60
–40
–20
–80
INPUT POWER PER TONE (dBm)
0
+20
Figure 13. Two Tone 3rd Order Intercept Point
Motorola Small–Signal Transistors, FETs and Diodes Device Data
5
J308 J309 J310
PACKAGE DIMENSIONS
A
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. CONTOUR OF PACKAGE BEYOND DIMENSION R
IS UNCONTROLLED.
4. DIMENSION F APPLIES BETWEEN P AND L.
DIMENSION D AND J APPLY BETWEEN L AND K
MINIMUM. LEAD DIMENSION IS UNCONTROLLED
IN P AND BEYOND DIMENSION K MINIMUM.
B
R
P
L
F
SEATING
PLANE
K
DIM
A
B
C
D
F
G
H
J
K
L
N
P
R
V
D
X X
G
J
H
V
C
SECTION X–X
1
N
N
CASE 029–04
(TO–226AA)
ISSUE AD
6
INCHES
MIN
MAX
0.175
0.205
0.170
0.210
0.125
0.165
0.016
0.022
0.016
0.019
0.045
0.055
0.095
0.105
0.015
0.020
0.500
–––
0.250
–––
0.080
0.105
–––
0.100
0.115
–––
0.135
–––
MILLIMETERS
MIN
MAX
4.45
5.20
4.32
5.33
3.18
4.19
0.41
0.55
0.41
0.48
1.15
1.39
2.42
2.66
0.39
0.50
12.70
–––
6.35
–––
2.04
2.66
–––
2.54
2.93
–––
3.43
–––
STYLE 5:
PIN 1. DRAIN
2. SOURCE
3. GATE
Motorola Small–Signal Transistors, FETs and Diodes Device Data
J308 J309 J310
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the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit, and
specifically disclaims any and all liability, including without limitation consequential or incidental damages. “Typical” parameters which may be provided in Motorola
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Opportunity/Affirmative Action Employer.
Motorola Small–Signal Transistors, FETs and Diodes Device Data
7
J308 J309 J310
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8
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Motorola Small–Signal Transistors, FETs and Diodes DeviceJ308/D
Data