Order this document by MMBF5484LT1/D SEMICONDUCTOR TECHNICAL DATA N–Channel 2 SOURCE Motorola Preferred Device 3 GATE 1 DRAIN 3 MAXIMUM RATINGS Rating Drain–Gate Voltage Reverse Gate–Source Voltage Forward Gate Current Symbol Value Unit VDG 25 Vdc VGS(r) 25 Vdc IG(f) 10 mAdc 200 2.8 mW mW/°C 1 2 Continuous Device Dissipation at or Below TC = 25°C Linear Derating Factor PD Storage Channel Temperature Range Tstg – 65 to +150 °C Symbol Max Unit Total Device Dissipation FR– 5 Board(1) TA = 25°C Derate above 25°C PD 225 mW 1.8 mW/°C Thermal Resistance, Junction to Ambient RqJA 556 °C/W TJ, Tstg – 55 to +150 °C CASE 318 – 08, STYLE 10 SOT– 23 (TO – 236AB) THERMAL CHARACTERISTICS Characteristic Junction and Storage Temperature DEVICE MARKING MMBF5484LT1 = 6B ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise noted) Characteristic Symbol Min Max Unit V(BR)GSS – 25 — Vdc — — – 1.0 – 0.2 nAdc µAdc VGS(off) – 0.3 – 3.0 Vdc IDSS 1.0 5.0 mAdc Forward Transfer Admittance (VDS = 15 Vdc, VGS = 0, f = 1.0 kHz) |Yfs| 3000 6000 µmhos Output Admittance (VDS = 15 Vdc, VGS = 0, f = 1.0 kHz) |yos| — 50 µmhos OFF CHARACTERISTICS Gate–Source Breakdown Voltage (IG = –1.0 µAdc, VDS = 0) Gate Reverse Current (VGS = – 20 Vdc, VDS = 0) (VGS = – 20 Vdc, VDS = 0, TA = 100°C) Gate Source Cutoff Voltage (VDS = 15 Vdc, ID = 10 nAdc) IGSS ON CHARACTERISTICS Zero–Gate–Voltage Drain Current (VDS = 15 Vdc, VGS = 0) SMALL– SIGNAL CHARACTERISTICS 1. FR– 5 = 1.0 0.75 0.062 in. Thermal Clad is a trademark of the Bergquist Company Preferred devices are Motorola recommended choices for future use and best overall value. Motorola Small–Signal Transistors, FETs and Diodes Device Data Motorola, Inc. 1996 1 MMBF5484LT1 ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise noted) (Continued) Characteristic Symbol Min Max Unit Input Capacitance (VDS = 15 Vdc, VGS = 0, f = 1.0 MHz) Ciss — 5.0 pF Reverse Transfer Capacitance (VDS = 15 Vdc, VGS = 0, f = 10 MHz) Crss — 1.0 pF Output Capacitance (VDS = 15 Vdc, VGS = 0, f = 1.0 MHz) Coss — 2.0 pF SMALL– SIGNAL CHARACTERISTICS (Continued) FUNCTIONAL CHARACTERISTICS Noise Figure (VDS = 15 Vdc, ID = 1.0 mAdc, YG′ = 1.0 mmhos) (RG = 1.0 kΩ, f = 100 MHz) (VDS = 15 Vdc, VGS = 0, YG′ = 1.0 µmhos) (RG = 1.0 MΩ, f = 1.0 kHz) NF Common Source Power Gain (VDS = 15 Vdc, ID = 1.0 mAdc, f = 100 MHz) Gps dB — 3.0 — 2.5 16 25 dB POWER GAIN 24 f = 100 MHz PG , POWER GAIN (dB) 20 16 12 400 MHz Tchannel = 25°C VDS = 15 Vdc VGS = 0 V 8.0 4.0 0 2.0 4.0 6.0 8.0 10 ID, DRAIN CURRENT (mA) 12 14 Figure 1. Effects of Drain Current 2 Motorola Small–Signal Transistors, FETs and Diodes Device Data MMBF5484LT1 NEUTRALIZING COIL INPUT TO 50 Ω SOURCE C2 L1 C4 C5 Rg′ *L2 *L3 7.0 pF 1.8 pF C2 1000 pF 17 pF TO 500 Ω LOAD L2 C6 C7 COMMON VDS +15 V VGS *L1 400 MHz C1 CASE L3 Adjust VGS for ID = 50 mA VGS < 0 Volts 100 MHz C3 C1 NOTE: ID = 5.0 mA The noise source is a hot–cold body (AIL type 70 or equivalent) with a test receiver (AIL type 136 or equivalent). 17 turns, (approx. — depends upon circuit layout) AWG #28 enameled copper wire, close wound on 9/32″ ceramic coil form. Tuning provided by a powdered iron slug. 4–1/2 turns, AWG #18 enameled copper wire, 5/16″ long, 3/8″ I.D. (AIR CORE). 3–1/2 turns, AWG #18 enameled copper wire, 1/4″ long, 3/8″ I.D. (AIR CORE). **L1 **L2 **L3 VALUE Reference Designation C3 3.0 pF 1.0 pF C4 1–12 pF 0.8–8.0 pF C5 1–12 pF 0.8–8.0 pF C6 0.0015 µF 0.001 µF C7 0.0015 µF 0.001 µF L1 3.0 µH* 0.2 µH** L2 0.15 µH* 0.03 µH** L3 0.14 µH* 0.022 µH** 6 turns, (approx. — depends upon circuit layout) AWG #24 enameled copper wire, close wound on 7/32″ ceramic coil form. Tuning provided by an aluminum slug. 1 turn, AWG #16 enameled copper wire, 3/8″ I.D. (AIR CORE). 1/2 turn, AWG #16 enameled copper wire, 1/4″ I.D. (AIR CORE). Figure 2. 100 MHz and 400 MHz Neutralized Test Circuit NOISE FIGURE (Tchannel = 25°C) 6.5 10 ID = 5.0 mA NF, NOISE FIGURE (dB) NF, NOISE FIGURE (dB) VDS = 15 V VGS = 0 V 5.5 8.0 6.0 f = 400 MHz 4.0 2.0 4.5 f = 400 MHz 3.5 2.5 100 MHz 100 MHz 1.5 0 0 2.0 4.0 6.0 8.0 10 12 14 16 VDS, DRAIN–SOURCE VOLTAGE (VOLTS) 18 0 20 4.0 6.0 8.0 10 ID, DRAIN CURRENT (mA) 2.0 Figure 3. Effects of Drain–Source Voltage 12 14 Figure 4. Effects of Drain Current INTERMODULATION CHARACTERISTICS Pout , OUTPUT POWER PER TONE (dB) + 40 3RD ORDER INTERCEPT + 20 VDS = 15 Vdc f1 = 399 MHz f2 = 400 MHz 0 – 20 – 40 – 60 – 80 – 100 FUNDAMENTAL OUTPUT @ IDSS, 0.25 IDSS – 120 – 140 – 160 – 120 – 100 3RD ORDER IMD OUTPUT @ IDSS, 0.25 IDSS – 80 – 60 – 40 – 20 Pin, INPUT POWER PER TONE (dB) 0 + 20 Figure 5. Third Order Intermodulation Distortion Motorola Small–Signal Transistors, FETs and Diodes Device Data 3 MMBF5484LT1 COMMON SOURCE CHARACTERISTICS 30 20 grs , REVERSE TRANSADMITTANCE (mmhos) brs , REVERSE SUSCEPTANCE (mmhos) gis, INPUT CONDUCTANCE (mmhos) bis, INPUT SUSCEPTANCE (mmhos) ADMITTANCE PARAMETERS (VDS = 15 Vdc, Tchannel = 25°C) bis @ IDSS 10 7.0 5.0 3.0 gis @ IDSS 2.0 gis @ 0.25 IDSS 1.0 0.7 0.5 0.3 10 bis @ 0.25 IDSS 20 30 50 70 100 200 300 f, FREQUENCY (MHz) 500 700 1000 5.0 3.0 2.0 brs @ IDSS 1.0 0.7 0.5 0.25 IDSS 0.3 0.2 0.1 0.07 0.05 grs @ IDSS, 0.25 IDSS 10 20 gfs @ IDSS gfs @ 0.25 IDSS 3.0 2.0 1.0 0.7 0.5 |bfs| @ IDSS |bfs| @ 0.25 IDSS 500 700 1000 5.0 bos @ IDSS and 0.25 IDSS 2.0 1.0 0.5 0.2 gos @ IDSS 0.1 0.05 gos @ 0.25 IDSS 0.02 0.01 20 30 50 70 100 200 300 f, FREQUENCY (MHz) 500 700 1000 Figure 8. Forward Transadmittance (yfs) 4 50 70 100 200 300 f, FREQUENCY (MHz) 10 10 7.0 5.0 0.3 0.2 10 30 Figure 7. Reverse Transfer Admittance (yrs) gos, OUTPUT ADMITTANCE (mhos) bos, OUTPUT SUSCEPTANCE (mhos) gfs, FORWARD TRANSCONDUCTANCE (mmhos) |b fs|, FORWARD SUSCEPTANCE (mmhos) Figure 6. Input Admittance (yis) 20 10 20 30 50 70 100 200 300 f, FREQUENCY (MHz) 500 700 1000 Figure 9. Output Admittance (yos) Motorola Small–Signal Transistors, FETs and Diodes Device Data MMBF5484LT1 COMMON SOURCE CHARACTERISTICS S–PARAMETERS (VDS = 15 Vdc, Tchannel = 25°C, Data Points in MHz) 30° 20° 10° 0° 1.0 40° 350° 100 340° 330° 320° 40° 310° 50° 20° 10° 330° 0.4 320° 310° ID = IDSS, 0.25 IDSS 300 0.8 900 500 ID = IDSS 60° 800 300° 400 60° 500 0.7 600 0.6 300° 0.1 500 70° 290° 400 700 800 700 800 290° 0.2 700 600 600 90° 340° 0.3 400 80° 350° 300 200 50° 70° 0° 200 100 0.9 30° ID = 0.25 IDSS 280° 80° 300 280° 0.0 200 900 270° 90° 100° 260° 100° 260° 110° 250° 110° 250° 120° 240° 120° 240° 130° 230° 130° 230° 140° 220° 140° 220° 900 150° 160° 170° 180° 190° 200° 210° 150° 160° Figure 10. S11s 30° 20° 10° 0° 350° 170° 340° 330° 30° 20° 10° 80° 90° 700 110° 0.4 800 600 100° 210° 0° 350° 340° 330° 100 200 ID = 0.25 IDSS 300 1.0 400 100 200 500 300 600 400 700 0.9 500 800 600 ID = IDSS 700 900 800 900 0.8 310° 50° 300° 60° 290° 70° 280° 80° 270° 90° 270° 260° 100° 260° 250° 110° 250° 240° 120° 240° 230° 130° 230° 220° 140° 220° 320° 310° 300° 0.7 290° 900 700 600 200° 40° 0.5 60° 900 190° 320° 0.6 50° 800 180° Figure 11. S12s 40° 70° 270° 100 500 0.3 ID = 0.25 IDSS 500 0.3 100 400 400 280° 0.6 300 200 0.4 100 0.5 300 120° ID = IDSS 200 130° 0.6 140° 150° 160° 170° 180° 190° 200° 210° Figure 12. S21s Motorola Small–Signal Transistors, FETs and Diodes Device Data 150° 160° 170° 180° 190° 200° 210° Figure 13. S22s 5 MMBF5484LT1 COMMON GATE CHARACTERISTICS ADMITTANCE PARAMETERS (VDG = 15 Vdc, Tchannel = 25°C) 10 7.0 5.0 grg , REVERSE TRANSADMITTANCE (mmhos) brg , REVERSE SUSCEPTANCE (mmhos) gig, INPUT CONDUCTANCE (mmhos) big, INPUT SUSCEPTANCE (mmhos) 20 gig @ IDSS 3.0 grg @ 0.25 IDSS 2.0 1.0 0.7 0.5 big @ IDSS big @ 0.25 IDSS 0.3 0.2 10 20 30 50 70 100 200 300 f, FREQUENCY (MHz) 500 700 1000 0.5 0.3 brg @ IDSS 0.2 0.1 0.07 0.05 0.25 IDSS 0.03 0.02 0.01 0.007 0.005 gig @ IDSS, 0.25 IDSS 10 10 7.0 5.0 gfg @ IDSS 3.0 gfg @ 0.25 IDSS 2.0 1.0 0.7 0.5 bfg @ IDSS 0.3 brg @ 0.25 IDSS 0.2 50 70 100 200 300 f, FREQUENCY (MHz) 500 700 1000 1.0 0.7 0.5 bog @ IDSS, 0.25 IDSS 0.3 0.2 0.1 0.07 0.05 gog @ IDSS 0.03 0.02 gog @ 0.25 IDSS 0.1 0.01 10 20 30 50 70 100 200 300 f, FREQUENCY (MHz) 500 700 1000 Figure 16. Forward Transfer Admittance (yfg) 6 30 Figure 15. Reverse Transfer Admittance (yrg) gog, OUTPUT ADMITTANCE (mmhos) bog, OUTPUT SUSCEPTANCE (mmhos) gfg , FORWARD TRANSCONDUCTANCE (mmhos) bfg , FORWARD SUSCEPTANCE (mmhos) Figure 14. Input Admittance (yig) 20 10 20 30 50 70 100 200 300 f, FREQUENCY (MHz) 500 700 1000 Figure 17. Output Admittance (yog) Motorola Small–Signal Transistors, FETs and Diodes Device Data MMBF5484LT1 COMMON GATE CHARACTERISTICS S–PARAMETERS (VDS = 15 Vdc, Tchannel = 25°C, Data Points in MHz) 30° 20° 10° 0° 350° 340° 330° 30° 0.7 40° 100 310° 50° 300° 60° 290° 70° 280° 80° 0° 350° 340° 330° 320° 0.04 200 300 0.03 400 100 500 200 0.5 ID = IDSS 0.4 310° 600 300 60° 70° 40° 10° ID = 0.25 IDSS 0.6 50° 320° 20° 0.02 700 400 500 300° 800 600 900 0.01 290° 700 80° 800 0.3 900 90° 270° 100° 260° 90° 250° 270° 500 600 100° ID = IDSS 110° 280° 0.0 100 110° 700 600 700 260° ID = 0.25 IDSS 250° 0.01 800 120° 240° 120° 240° 800 0.02 900 130° 230° 130° 230° 900 140° 220° 150° 160° 170° 180° 190° 200° 140° 210° 20° 10° 0° 350° 150° 160° 170° 340° 330° 30° 20° 10° 40° 320° 0° 1.5 1.0 100 100 0.4 50° 180° 190° 200° 210° 340° 330° Figure 19. S12g 0.5 40° 220° 0.04 Figure 18. S11g 30° 0.03 ID = IDSS 350° 300 200 500 320° 400 700 600 800 0.9 900 310° 50° 300° 60° 290° 70° 280° 80° 270° 90° 270° 100° 260° 100° 260° 110° 250° 110° 250° 120° 240° 120° 240° 130° 230° 130° 230° 140° 220° 140° 220° 100 ID = IDSS, 0.25 IDSS 0.3 0.8 60° 0.2 70° 310° ID = 0.25 IDSS 80° 0.1 300° 0.7 290° 280° 0.6 900 90° 900 150° 160° 170° 180° 190° 200° 210° Figure 20. S21g Motorola Small–Signal Transistors, FETs and Diodes Device Data 150° 160° 170° 180° 190° 200° 210° Figure 21. S22g 7 MMBF5484LT1 INFORMATION FOR USING THE SOT–23 SURFACE MOUNT PACKAGE MINIMUM RECOMMENDED FOOTPRINT FOR SURFACE MOUNTED APPLICATIONS Surface mount board layout is a critical portion of the total design. The footprint for the semiconductor packages must be the correct size to insure proper solder connection interface between the board and the package. With the correct pad geometry, the packages will self align when subjected to a solder reflow process. 0.037 0.95 0.037 0.95 0.079 2.0 0.035 0.9 0.031 0.8 inches mm SOT–23 SOT–23 POWER DISSIPATION The power dissipation of the SOT–23 is a function of the pad size. This can vary from the minimum pad size for soldering to a pad size given for maximum power dissipation. Power dissipation for a surface mount device is determined by TJ(max), the maximum rated junction temperature of the die, RθJA, the thermal resistance from the device junction to ambient, and the operating temperature, TA . Using the values provided on the data sheet for the SOT–23 package, PD can be calculated as follows: PD = TJ(max) – TA RθJA The values for the equation are found in the maximum ratings table on the data sheet. Substituting these values into the equation for an ambient temperature TA of 25°C, one can calculate the power dissipation of the device which in this case is 225 milliwatts. PD = 150°C – 25°C 556°C/W = 225 milliwatts The 556°C/W for the SOT–23 package assumes the use of the recommended footprint on a glass epoxy printed circuit board to achieve a power dissipation of 225 milliwatts. There are other alternatives to achieving higher power dissipation from the SOT–23 package. Another alternative would be to use a ceramic substrate or an aluminum core board such as Thermal Clad. Using a board material such as Thermal Clad, an aluminum core board, the power dissipation can be doubled using the same footprint. 8 SOLDERING PRECAUTIONS The melting temperature of solder is higher than the rated temperature of the device. When the entire device is heated to a high temperature, failure to complete soldering within a short time could result in device failure. Therefore, the following items should always be observed in order to minimize the thermal stress to which the devices are subjected. • Always preheat the device. • The delta temperature between the preheat and soldering should be 100°C or less.* • When preheating and soldering, the temperature of the leads and the case must not exceed the maximum temperature ratings as shown on the data sheet. When using infrared heating with the reflow soldering method, the difference shall be a maximum of 10°C. • The soldering temperature and time shall not exceed 260°C for more than 10 seconds. • When shifting from preheating to soldering, the maximum temperature gradient shall be 5°C or less. • After soldering has been completed, the device should be allowed to cool naturally for at least three minutes. Gradual cooling should be used as the use of forced cooling will increase the temperature gradient and result in latent failure due to mechanical stress. • Mechanical stress or shock should not be applied during cooling. * Soldering a device without preheating can cause excessive thermal shock and stress which can result in damage to the device. Motorola Small–Signal Transistors, FETs and Diodes Device Data MMBF5484LT1 PACKAGE DIMENSIONS A L 3 B S 1 V STYLE 10: PIN 1. DRAIN 2. SOURCE 3. GATE 2 G C D H K J NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. MAXIMUM LEAD THICKNESS INCLUDES LEAD FINISH THICKNESS. MINIMUM LEAD THICKNESS IS THE MINIMUM THICKNESS OF BASE MATERIAL. DIM A B C D G H J K L S V INCHES MIN MAX 0.1102 0.1197 0.0472 0.0551 0.0350 0.0440 0.0150 0.0200 0.0701 0.0807 0.0005 0.0040 0.0034 0.0070 0.0180 0.0236 0.0350 0.0401 0.0830 0.0984 0.0177 0.0236 MILLIMETERS MIN MAX 2.80 3.04 1.20 1.40 0.89 1.11 0.37 0.50 1.78 2.04 0.013 0.100 0.085 0.177 0.45 0.60 0.89 1.02 2.10 2.50 0.45 0.60 CASE 318–08 ISSUE AE SOT–23 (TO–236AB) Motorola Small–Signal Transistors, FETs and Diodes Device Data 9 MMBF5484LT1 Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation consequential or incidental damages. “Typical” parameters which may be provided in Motorola data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. Motorola does not convey any license under its patent rights nor the rights of others. Motorola products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the Motorola product could create a situation where personal injury or death may occur. Should Buyer purchase or use Motorola products for any such unintended or unauthorized application, Buyer shall indemnify and hold Motorola and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that Motorola was negligent regarding the design or manufacture of the part. Motorola and are registered trademarks of Motorola, Inc. Motorola, Inc. is an Equal Opportunity/Affirmative Action Employer. How to reach us: USA / EUROPE / Locations Not Listed: Motorola Literature Distribution; P.O. Box 20912; Phoenix, Arizona 85036. 1–800–441–2447 or 602–303–5454 JAPAN: Nippon Motorola Ltd.; Tatsumi–SPD–JLDC, 6F Seibu–Butsuryu–Center, 3–14–2 Tatsumi Koto–Ku, Tokyo 135, Japan. 03–81–3521–8315 MFAX: [email protected] – TOUCHTONE 602–244–6609 INTERNET: http://Design–NET.com ASIA/PACIFIC: Motorola Semiconductors H.K. Ltd.; 8B Tai Ping Industrial Park, 51 Ting Kok Road, Tai Po, N.T., Hong Kong. 852–26629298 10 ◊ *MMBF5484LT1/D* MMBF5484LT1/D Motorola Small–Signal Transistors, FETs and Diodes Device Data