® LOW SAMPLING RATE OPERATION FOR BURR-BROWN AUDIO DATA CONVERTERS AND CODECS TM By Robert Martin and Hajime Kawai PURPOSE This application bulletin describes the operation and performance of Burr-Brown’s PCM digital audio products when using low sampling frequencies. INTRODUCTION For most consumer audio applications, customers using Burr-Brown’s PCM digital audio products will operate at a standard audio sampling frequency, such as 44.1kHz, 48kHz, or 96kHz. However, there are applications where lower sample rates are either desirable or required. These applications include computer audio, telephones, intercom systems, speech processing, video teleconferencing, and modems. For these applications, sample rates from 8kHz to 22.05kHz are very common. Although Burr-Brown concentrates its PCM design efforts to obtain specified performance using sampling frequencies in the 32kHz to 96kHz range, most PCM products can support sampling rates as low as 4kHz while achieving near typical dynamic performance. The following sections will examine the low sampling frequency operation and performance of Burr-Brown’s PCM products, with emphasis on understanding the operational and performance limitations, as well as circuit design considerations for these applications. pass filters used for digital-to-analog (D/A) post filtering and analog-to-digital (A/D) anti-aliasing filtering. These filters are required in order to limit the output and input signal bandwidth. DYNAMIC LOGIC AND ITS EFFECT ON MINIMUM SAMPLE RATE FOR DELTA-SIGMA CONVERTERS Delta-sigma data converters utilize dynamic logic circuits, especially in their oversampling digital filter sections. Figures 1 and 2 show the equivalent circuit and transistor level circuit diagram of a dynamic logic register. The dynamic φ1 φ2 VI VO Parastic Capacitor Basic Concept of Dynamic Register FIGURE 1. Simple Equivalent Circuit for Dynamic Register. p-ch CLK1 GENERAL CONSIDERATIONS FOR DELTA-SIGMA DATA CONVERTERS For delta-sigma data converters, theoretical dynamic performance is given by the performance of the digital filter, modulator, and output amplifier sections. Delta-sigma data converters use high oversampling rates, such as 64fS, or 64 times the desired sample rate. This oversampling in the digital filter and modulator section automatically tracks with changes in sample frequency, fS. Overall performance of the digital filter and modulator remains relatively constant over the range of usable sampling frequencies. Circuitry external to the data converter also impacts the overall dynamic performance. These circuits include low VI p-ch p-ch n-ch n-ch n-ch CLK2 VO Parastic Capacitor FIGURE 2. Transistor Level Circuit Diagram of Dynamic Register. The information provided herein is believed to be reliable; however, BURR-BROWN assumes no responsibility for inaccuracies or omissions. BURR-BROWN assumes no responsibility for the use of this information, and all use of such information shall be entirely at the user’s own risk. Prices and specifications are subject to change without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. BURR-BROWN does not authorize or warrant any BURR-BROWN product for use in life support devices and/or systems. © 1999 Burr-Brown Corporation AB-148 Printed in U.S.A. May, 1999 MINIMUM SAMPLE RATE FOR SIGN MAGNITUDE D/A CONVERTERS register relies upon the charge stored on a parasitic capacitance and the clocks which are used to transfer the stored state from the input to the output of the register. The clock rate is directly related to the sampling rate of the converter. Sign magnitude D/A converters, like the PCM1704, do not employ delta-sigma conversion techniques and are similar to conventional R-2R ladder DACs. These converters do not have a low sampling frequency limit since they use a simple latched serial interface and employ no digital filtering or oversampling modulator circuitry. These converters can be operated at rates down to DC. For more information, refer to the “Stopped Clock Operation” sections of the PCM1702 and PCM1704 data sheets. The parasitic capacitance value associated with the dynamic register is very small. Additionally, there are leakage currents associated with the MOS devices in the register, even when they are turned off. Given the effects of these leakage currents, charge on the capacitor can only be held for a small amount of time. Since the clocks used for the dynamic register track with the sampling frequency, lower sampling rates translate into a longer storage period. This in turn leads to a larger amount of stored charge being dissipated due to leakage current. If the sampling rate becomes too low, so much of the charge is dissipated that it can result in data errors and non-functional behavior. Table I shows the minimum sample rate for Burr-Brown’s delta-sigma data converters and CODECs. Most can operate with a sampling frequency as low as 4kHz, due to the limitations of dynamic logic described in the previous paragraphs. The PCM1723 and PCM1727 can operate at a minimum sample frequency of 16kHz, due to the limitations of the on-chip Phase Locked Loop (PLL) circuitry used to generate audio system clocks. DIGITAL AND ANALOG FILTERING AT LOW SAMPLING FREQUENCIES For delta-sigma data converters, the frequency response of the on-chip digital interpolation and decimation filters is dictated by the sampling rate, fS, where passband and stopband frequencies track with changes in fS. Since the filter response tracks with sampling frequency, the digital filter maintains its characteristics at lower sampling frequencies. As an example, Figure 3 shows the overall frequency response of the interpolation filter used in the PCM1716 stereo DAC. Using this plot, the frequency response of the digital interpolation filter can be determined for any sampling frequency over the 4kHz to 96kHz range. However, the RC continuous time analog filter used in the output stage of D/A converters, as well as the input anti-alias filter used at the input of A/D converters, have a fixed frequency response that does not track with sampling frequency. Figures 4 shows the overall and passband frequency response of the internal output filter for our D/A converters. Figure 5 shows the overall and passband frequency response of the internal anti-aliasing filter for our A/D converters. SAMPLING FREQUENCY (kHz)(1,2) MIN MAX PCM1704 n/a 768 PCM1716 4 96 PCM1717 4 48 PCM1718 4 48 PCM1719 4 48 PCM1720 4 96 PCM1723(3) 16 96 PCM1725 4 96 PCM1727(3) 16 96 PCM1728 4 96 PCM1733 4 96 PCM1800 4 48 PCM3000 4 48 PCM3001 4 48 PCM3002 4 48 PCM3003 4 48 PCM3006 4 48 OVERALL FREQUENCY CHARACTERISTIC (Sharp Roll-Off) 0 –20 –40 Amplitude (dB) PRODUCT NOTES: (1) AC specifications are not guaranteed over the entire frequency range. (2) Maximum sampling frequency is limited by internal timing requirements. (3) Minimum sampling frequency is limited by on-chip Phase Locked Loop. –60 –80 –100 –120 –140 Table I. Minimum and Maximum Sampling Frequencies for PCM Products. –160 0 0.5 1 1.5 2 2.5 3 Frequency (x fS) FIGURE 3. PCM1716 Digital Filter Response. 2 3.5 4 20 1 0 Level (dB) Level (dB) 0.5 –20 –40 0 –60 –0.5 –80 –100 –1 1 10 100 1k 10k 100k 1M 10M 1 10 Log Frequency (Hz) 100 1k 10k 100k Log Frequency (Hz) a. Passband Response b. Overall Response FIGURE 4. Frequency Response of DAC Output Filter. ANTI-ALIASING FILTER OVERALL FREQUENCY RESPONSE (CEXT = 470pF, 1000pF) 0 ANTI-ALIASING FILTER PASSBAND FREQUENCY RESPONSE (CEXT = 470pF, 1000pF) 0.2 470pF 470pF 0.0 Amplitude (dB) Amplitude (dB) –10 –20 –30 1000pF –40 –0.2 –0.4 1000pF –0.6 –0.8 –0.1 –50 0 10 100 1k 10k 100k 1M 0 10M 10 1k 10k 100k b. Passband Response for PCM1800, PCM3000, PCM3001 a. Overall Response for PCM1800, PCM3000, PCM3001 ANTI-ALIASING FILTER OVERALL FREQUENCY RESPONSE ANTI-ALIASING FILTER PASSBAND FREQUENCY RESPONSE 0 0.2 0.0 Amplitude (dB) –10 Amplitude (dB) 100 Frequency (Hz) Frequency (Hz) –20 –30 –40 –0.2 –0.4 –0.6 –0.8 –50 –1.0 0 10 100 1k 10k 100k 1M 10M 0 Frequency (Hz) 10 100 1k 10k Frequency (Hz) d. Passband Response for PCM3002, PCM3003, PCM3006 c. Overall Response for PCM3002, PCM3003, PCM3006 FIGURE 5. Frequency Response of ADC Anti-Aliasing Filter. 3 100k Using D/A converters at low sampling rates (fS = 4kHz to 16kHz), the noise spectrum above the Nyquist frequency (fS/2) is audible, and is not affected by the analog filter since the spectrum is well within its passband. Figure 6 shows an example where the PCM1717 stereo DAC is being operated with fS = 8kHz. The delta-sigma modulator noise and sampling spectrum are clearly visible in these photos. External low pass filtering is required to attenuate the frequency spectrum above the Nyquist frequency. 4kHz 8kHz Figure 7 shows another example where the PCM1716 is operated with fS = 8kHz. The sampling spectrum is not present due to the improved stopband attenuation of the PCM1716’s digital interpolation filter. However, the deltasigma modulator noise is clearly present. Once again, an external lowpass filter is necessary to attenuate the out-ofband noise spectrum to an acceptable level. The amount of filtering required will be determined by the out-of-band noise requirements for a given application. 16kHz 4kHz 8kHz 16kHz –60dB Sampling Spectrum b. –60dB Output a. Full-Scale Output FIGURE 6. PCM1717 Output Spectrum with fS = 8kHz. 4kHz 8kHz 16kHz 4kHz 8kHz b. –60dB Output a. Full-Scale Output FIGURE 7. PCM1716 Output Spectrum with fS = 8kHz. 4 16kHz Figure 8 shows a simple 2nd-order multiple feedback (MFB) active filter design that can be used to build a DAC post filter. Multiple 2nd-order sections, along with simple 1storder RC sections, may be cascaded to create higher order filters as needed in order to obtain the desired out-of-band noise performance for a given application. However, care For delta-sigma A/D converters, a simple single-pole RC filter is used as an anti-aliasing filter, due to the high oversampling rate used by the modulator circuit. For the PCM1800, PCM3000, and PCM3001, this filter is comprised of two on-chip resistors and an external capacitor, as shown in Figure 9. When operating with low sample rates, the value of the external capacitor should be adjusted in order to safely bandlimit the input signal. The formulas for calculating the cut-off frequency of the filter and determining the necessary external capacitor value for a given cut-off frequency are also shown in Figure 9. The cut-off frequency itself is dependent upon the desired input bandwidth for a given application. C1 R2 R1 should be taken when designing higher order filters to preserve phase relationships critical in certain audio applications, such as surround sound processing. Refer to BurrBrown application bulletin AB-034 for more details regarding multiple feedback (MFB) and Sallen-Key active filter design. R3 VIN VOUT C2 FIGURE 8. Second-Order Lowpass Filter (multipule feedback type). CEXT 470pF CINPL 22 1.0µF + 1 VINL 1kΩ VREF2 + 4.7µF 3 4.7µF + 2 CINNL 30kΩ 1kΩ 4 21 REFCOM VREF VREF1 fCO = 1 4π (1kΩ) CEXT CEXT = 1 4π (1kΩ) fCO FIGURE 9. Input Circuit and Filter for PCM1800, PCM3000, PCM3001. 5 (+) (–) Delta-Sigma Modulator SUMMARY For the PCM3002, PCM3003, and PCM3006, the anti-alias filter is entirely on-chip, therefore, its component values cannot be altered by the user. An external RC filter is required to band limit the input for lower sampling rates. Figure 10 shows an example of adding a simple RC lowpass filter to the input of these CODECs. This application bulletin shows that the application spectrum of Burr-Brown’s PCM digital audio products can be extended to systems requiring sampling frequencies as low as 4kHz. Typical dynamic performance can be obtained at lower sampling rates provided that sufficient low pass filtering is used by the system designer. Filter requirements should be evaluated using Burr-Brown’s DEM-PCMxxxx demonstration boards and audio measurement equipment prior to finalizing the filter design so that the required dynamic performance is achieved in the final product. DYNAMIC PERFORMANCE AT LOW SAMPLING FREQUENCIES In order to properly measure dynamic performance at low sampling frequencies, the measurement bandwidth must be limited to the Nyquist bandwidth (fS/2). For fS = 8kHz, the measurement bandwidth must be limited to 4kHz. With this bandlimit, dynamic performance will be the same as that measured for standard sampling frequencies, such as data sheet specifications given with fS = 44.1kHz or 48kHz. Table II shows measurement results of THD+N for several PCM audio D/As using a 3rd-order lowpass filter and a “brickwall” 4kHz lowpass filter. The results clearly show that dynamic performance at low sampling frequency can match that of standard audio sampling rates, given that band limiting to the Nyquist frequency is provided. For practical applications, the choice of lowpass filter order is dependent upon the actual dynamic performance (THD+N, dynamic range, SNR) and out-of-band noise level required by the system specifications. R 1.0µF VINR + PRODUCT FILTER MEASURED THD+N(1,2) PCM1717 3rd-Order(3) 4kHz BW(4) 0.0265% 0.0028% PCM1716 (16-bit data) 3rd-Order 4kHz BW 0.005% 0.0021% PCM1716 (20-bit data) 3rd-Order 4kHz BW 0.005% 0.0019% NOTES: (1) fS = 8kHz, f IN = 1kHz at 0dB level. (2) Measurements taken with Shibasoku 725 Distortion Analyzer (400Hz HPF, 30 kHz LPF, 20kHz BW limit). (3) 3rd-order refers to 3rd-order lowpass filter with 4kHz passband. (4) 4kHz BW refers to a “brickwall” lowpass filter with 4kHz passband. TABLE II. Measured Performance with fS = 8kHz. 30kΩ 1 C (+) (–) VCOM VREFL + 4.7µF + VREFR 21 4 5 4.7µF VREF + 4.7µF fCO = 1 for external filter 2π RC FIGURE 10. Input Circuit and Filter for PCM3002, PCM3003, PCM3006. 6 Delta-Sigma Modulator