Revised April 2002 CD4094BC 8-Bit Shift Register/Latch with 3-STATE Outputs General Description Features The CD4094BC consists of an 8-bit shift register and a 3-STATE 8-bit latch. Data is shifted serially through the shift register on the positive transition of the clock. The output of the last stage (QS) can be used to cascade several devices. Data on the QS output is transferred to a second output, Q′S, on the following negative clock edge. ■ Wide supply voltage range: 3.0V to 18V ■ High noise immunity: 0.45 VDD (typ.) ■ Low power TTL compatibility: Fan out of 2 driving 74L or 1 driving 74LS ■ 3-STATE outputs The output of each stage of the shift register feeds a latch, which latches data on the negative edge of the STROBE input. When STROBE is HIGH, data propagates through the latch to 3-STATE output gates. These gates are enabled when OUTPUT ENABLE is taken HIGH. Ordering Code: Order Number Package Number Package Description CD4094BCWM M16B 16-Lead Small Outline Intergrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide CD4094BCN N16E 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Connection Diagram Top View Truth Table Clock Output Strobe Data Enable X = Don't Care = HIGH-to-LOW = LOW-to-HIGH Parallel Outputs Q1 QN Serial Outputs QS (Note 1) Q′Σ No Change 0 X X Hi-Z Hi-Z Q7 0 X X Hi-Z Hi-Z No Change Q7 1 0 X Q7 No Change 1 1 0 0 QN−1 Q7 No Change 1 1 1 1 QN−1 Q7 No Change 1 1 1 No Change No Change No Change No Change No Change Q7 Note 1: At the positive clock edge, information in the 7th shift register stage is transferred to Q8 and QS. © 2002 Fairchild Semiconductor Corporation DS005983 www.fairchildsemi.com CD4094BC 8-Bit Shift Register/Latch with 3-STATE Outputs October 1987 CD4094BC Block Diagram www.fairchildsemi.com 2 Recommended Operating Conditions (Note 3) (Note 3) −0.5 to +18 VDC Supply Voltage (VDD) Input Voltage (VIN) Input Voltage (VIN) −65°C to +150°C Storage Temperature Range (TS) 700 mW Small Outline 500 mW −55°C to +125°C Note 2: “Absolute Maximum Ratings” are those values beyond which the safety of the device cannot be guaranteed; they are not meant to imply that the devices should be operated at these limits. The tables of “Recommended Operating Conditions” and “Electrical Characteristics” provide conditions for actual device operation. Lead Temperature (TL) Note 3: VSS = 0V unless otherwise specified. 260°C (Soldering, 10 seconds) 0 to VDD VDC Operating Temperature Range (TA) Power Dissipation (PD) Dual-In-Line +3.0 to +15 VDC DC Supply Voltage (VDD) −0.5 to VDD +0.5 VDC DC Electrical Characteristics (Note 3) Symbol IDD VOL Parameter Min VIH IOL IOH IIN IOZ Min Typ +125°C Max Min Max Quiescent VDD = 5.0V 5.0 5.0 150 VDD = 10V 10 10 300 VDD = 15V 20 20 600 0.05 LOW Level VDD = 5.0V Output Voltage VDD = 10V |IO| ≤ 1.0 µA HIGH Level VDD = 5.0V Output Voltage VDD = 10V |IO| ≤ 1 µA VDD = 15V VIL Max Device Current VDD = 15V VOH +25°C 55°C Conditions 0.05 0 0.05 0.05 0 0.05 0.05 0.05 0 0.05 0.05 4.95 4.95 5.0 4.95 9.95 9.95 10.0 9.95 14.95 14.95 15.0 14.95 VDD = 5.0V, VO = 0.5V or 4.5V 1.5 1.5 Input Voltage VDD = 10V, VO = 1.0V or 9.0V 3.0 3.0 3.0 VDD = 15V, VO = 1.5V or 13.5V 4.0 4.0 4.0 V 1.5 HIGH Level VDD = 5.0V, VO = 0.5V or 4.5V 3.5 3.5 Input Voltage VDD = 10V, VO = 1.0V or 9.0V 7.0 7.0 7.0 VDD = 15V, VO = 1.5V or 13.5V 11.0 11.0 11.0 LOW Level VDD = 5.0V, VO = 0.4V 0.64 0.51 0.88 Output Current VDD = 10V, VO = 0.5V 1.6 1.3 2.25 0.9 (Note 4) VDD = 15V, VO = 1.5V 4.2 3.4 8.8 2.4 HIGH Level VDD = 5.0V, VO = 4.6V −0.64 −0.51 0.88 −0.36 Output Current VDD = 10V, VO = 9.5V −1.6 −1.3 2.25 −0.9 (Note 4) VDD = 15V, VO = 13.5V −4.2 −3.4 8.8 −2.4 3-STATE Output µA V LOW Level Input Current Units V 3.5 V 0.36 mA mA VDD = 15V, VIN = 0V −0.1 −0.1 VDD = 15V, VIN = 15V 0.1 0.1 −1.0 1.0 VDD = 15V, VIN = 0V or 15V 0.3 ±0.3 ±9 µA µA Leakage Current Note 4: IOH and IOL are tested one output at a time. 3 www.fairchildsemi.com CD4094BC Absolute Maximum Ratings(Note 2) CD4094BC AC Electrical Characteristics (Note 5) TA = 25°C, CL = 50 pF Symbol tPHL, tPLH tPHL, tPLH tPHL, tPLH tPHL, tPLH tPHZ tPLZ tPZH tPZL tTHL, tTLH tSU tr , tf tPC tPS fmax CIN Typ Max Propagation Delay Parameter VDD = 5.0V 300 600 Clock to QS VDD = 10V 125 250 VDD = 15V 95 190 Propagation Delay VDD = 5.0V 230 460 Clock to Q′Σ VDD = 10V 110 220 VDD = 15V 75 150 Propagation Delay Clock VDD = 5.0V 420 840 to Parallel Out VDD = 10V 195 390 VDD = 15V 135 270 Propagation Delay Strobe VDD = 5.0V 290 580 to Parallel Out VDD = 10V 145 290 VDD = 15V 100 200 Propagation Delay HIGH VDD = 5.0V 140 280 Level to HIGH Impedance VDD = 10V 75 150 VDD = 15V 55 110 Propagation Delay LOW VDD = 5.0V 140 280 Level to HIGH Impedance VDD = 10V 75 150 VDD = 15V 55 110 Propagation Delay HIGH VDD = 5.0V 140 280 Impedance to HIGH Level VDD = 10V 75 150 VDD = 15V 55 110 Propagation Delay HIGH VDD = 5.0V 140 280 Impedance to LOW Level VDD = 10V 75 150 VDD = 15V 55 110 Transition Time Conditions Min VDD = 5.0V 100 200 VDD = 10V 50 100 VDD = 15V 40 80 Set-Up Time VDD = 5.0V 80 40 Data to Clock VDD = 10V 40 20 VDD = 15V 20 10 Maximum Clock Rise VDD = 5.0V 1 and Fall Time VDD = 10V 1 VDD = 15V 1 VDD = 5.0V 200 100 Pulse Width VDD = 10V 100 50 VDD = 15V 83 40 Minimum Strobe VDD = 5.0V 200 100 Pulse Width VDD = 10V 80 40 VDD = 15V 70 35 VDD = 5.0V 1.5 3.0 VDD = 10V 3.0 6.0 VDD = 15V 4.0 8.0 Input Capacitance Any Input 5.0 Note 5: AC Parameters are guaranteed by DC correlated testing. www.fairchildsemi.com 4 ns ns ns ns ns ns ns ns ns ns ms Minimum Clock Maximum Clock Frequency Units ns ns MHz 7.5 pF CD4094BC Timing Diagram Test Circuits and Timing Diagrams for 3-STATE 5 www.fairchildsemi.com CD4094BC Physical Dimensions inches (millimeters) unless otherwise noted 16-Lead Small Outline Intergrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide Package Number M16B www.fairchildsemi.com 6 CD4094BC 8-Bit Shift Register/Latch with 3-STATE Outputs Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide Package Number N16E Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications. 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