MAXIM MAX14521EETG+

19-4477; Rev 0; 2/09
KIT
ATION
EVALU
E
L
B
A
IL
AVA
Quad, High-Voltage EL Lamp Driver
with I2C Interface
The MAX14521E is a quad-output high-voltage DC-AC
converter that drives four electroluminescent (EL)
lamps. The device features a 2.7V to 5.5V input range
that allows the device to accept a variety of voltage
sources such as single-cell lithium-ion (Li+) batteries.
The lamp outputs of the device generate up to 300VP-P
for maximum lamp brightness. The high-voltage outputs
are ESD protected up to ±15kV Human Body Model
(HBM), ±6kV Contact Discharge, and ±8kV Air Gap
Discharge, as specified in IEC 61000-4-2.
The MAX14521E uses a high-voltage full-bridge output
stage to convert the high voltage generated by the
boost converter to a sinusoidal output waveform. The
MAX14521E utilizes a high-frequency spread-spectrum
oscillator to reduce the amount of EMI/EFI generated by
the boost-converter circuit.
The MAX14521E provides an I2C interface to set the
boost converter and EL output switching frequencies
through an 8-bit register and the peak output voltages
with 5 bits of resolution. The MAX14521E also provides
an adjustable automatic ramping feature that slowly
increases or decreases the peak output voltage when a
change is made to the output amplitude. The slew rate
of the automatic ramp is set with 3 bits of resolution
through the I2C interface and it is independent for each
channel. The MAX14521E features an audio auxiliary
input AUX that modulates the EL output voltage and frequency for dynamic lighting effects.
The MAX14521E is available in a small, 4mm x 4mm,
24-pin TQFN package, and specified over the extended -40°C to +85°C operating temperature range.
Applications
Features
♦ 300VP-P Maximum Output for Highest Brightness
♦ ESD-Protected EL Lamp Outputs
±15kV Human Body Model
±6kV IEC 61000-4-2 Contact ESD Protection
±8kV IEC 61000-4-2 Air Gap Discharge
♦ 2.7V to 5.5V Input Voltage Range
♦ I2C Interface for Control of Brightness, EL
Frequency, Boost Frequency, Shape
♦ Sinusoidal Output for Low Audible Noise
♦ Individual Dimming Control
♦ Individually Adjustable Output Brightness
Ramping Rate
♦ ±3% EL Output Frequency Accuracy for Truest EL
Panel Color
♦ Audio Input for Dynamic Lighting Effects
♦ Spread-Spectrum Boost Converter
♦ 100nA Shutdown Current
♦ Space-Saving, 4mm x 4mm, 24-Pin TQFN Package
Ordering Information
PART
TEMP RANGE
PIN-PACKAGE
MAX14521EETG+
-40°C to +85°C
24 TQFN-EP*
+Denotes a lead(Pb)-free/RoHS-compliant package.
*EP = Exposed pad.
Keypad Backlighting
Typical Operating Circuit
LCD Backlighting
PDAs
Smartphones
VDD
Automotive Instruments Clusters
0.1μF
VBAT
LX
D
Pin Configuration appears on last page
RSN
20Ω
10μF
CCS
3
6
5
CSN
330pF
10
TO BASEBAND/PMIC
EL LAMP1
9
11
7
8
CS
VDD
EL1
1
EL LAMP1
PGND
EL2
EL LAMP1
LX
SDA
MAX14521E
EL3
19
EL LAMP1
SCL
EL4
A0
A1
COM
12
RB
23
17
21
13
GND
AUX
AUDIO
LINE-IN
15
________________________________________________________________ Maxim Integrated Products
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642,
or visit Maxim’s website at www.maxim-ic.com.
1
MAX14521E
General Description
MAX14521E
Quad, High-Voltage EL Lamp Driver
with I2C Interface
ABSOLUTE MAXIMUM RATINGS
(All voltages referenced to GND, unless otherwise noted.)
VDD ........................................................................-0.3V to +6.0V
CS, EL1, EL2, EL3, EL4, COM..............................-0.3V to +160V
LX ...........................................................................-0.3V to +33V
RB, A0, A1, AUX....................................................-0.3V to +6.0V
SCL, SDA....................................................-0.3V to (VDD + 0.3V)
Continuous Power Dissipation (TA = +70°C)
24-Pin TQFN-EP (derate 27.8mW/°C above +70°C)..2222mW
Package Junction-to-Ambient Thermal Resistance (θJA)
(Note 1) ........................................................................36°C/W
Package Junction-to-Case Thermal Resistance (θJC)
(Note 1) ..........................................................................3°C/W
Operating Temperature Range ...........................-40°C to +85°C
Storage Temperature Range .............................-65°C to +150°C
Junction Temperature ......................................................+150°C
Lead Temperature (soldering, 10s) .................................+300°C
Note 1: Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a fourlayer board. For detailed information on package thermal considerations, refer to www.maxim-ic.com/thermal-tutorial.
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(VDD = +2.7V to +5.5V, total CLAMP = 10nF, CCS = 3.3nF, tapped inductor = 2.3µH/115µH, 1:7 ratio (ISAT = 0.7A, RS = 1Ω),
TA = -40°C to +85°C, unless otherwise noted. Typical values are at TA = +25°C and VDD = 3.7V.) (Note 2)
PARAMETER
SYMBOL
Input Voltage
VDD
Battery Voltage
VBAT
Input Supply Current
Shutdown Supply Current
Shutdown Tapped-Inductor
Supply Current
Undervoltage Lockout
UVLO Hysteresis
IDD
ISHDN
CONDITIONS
MIN
TYP
MAX
UNITS
5.5
V
13.2
V
350
900
µA
25
100
2.7
(Note 3)
All channels on, 300VP-P, fEL = 200Hz, sinewave output shape
RB, A0, A1 = 0V or VDD;
SCL = SDA = GND or
VDD; not toggling
TA = +25°C
TA = -40°C to
+85°C
300
ILX_SHDN
VUV
2100
VDD rising
1.6
VUV_HYST
2.0
2.5
70
nA
nA
V
mV
EL OUTPUTS (EL_, COM)
Peak-to-Peak Output Voltage
VP-P
Max Average Output Voltage
VAVG
VEL_ - VCOM; EL_ _[4:0] = 01000; VDD = 3.7V
66
78
90
VEL_ - VCOM; EL_ _[4:0] = 10000; VDD = 3.7V
136
154
172
VEL_ - VCOM; EL_ _[4:0] = 11111; VDD = 3.7V
268
300
320
VEL_ - VCOM
V
1
V
EL_ High-Side Switch
On-Resistance
RONHS_EL_
1270
Ω
EL_ Low-Side Switch
On-Resistance
RONLS_EL_
700
Ω
COM High-Side Switch
On-Resistance
RONHS_COM
390
Ω
COM Low-Side Switch
On-Resistance
RONLS_COM
175
Ω
2
_______________________________________________________________________________________
Quad, High-Voltage EL Lamp Driver
with I2C Interface
(VDD = +2.7V to +5.5V, total CLAMP = 10nF, CCS = 3.3nF, tapped inductor = 2.3µH/115µH, 1:7 ratio (ISAT = 0.7A, RS = 1Ω),
TA = -40°C to +85°C, unless otherwise noted. Typical values are at TA = +25°C and VDD = 3.7V.) (Note 2)
PARAMETER
SYMBOL
MAX
UNITS
-1
+1
µA
ILKGLS_EL_
-1
+1
µA
COM High-Side Switch OffLeakage
ILKGHS_COM
-1
+1
µA
COM Low-Side Switch OffLeakage
ILKGLS_COM
-1
+1
µA
EL_ High-Side Switch OffLeakage
ILKGHS_EL_
EL_ Low-Side Switch OffLeakage
CONDITIONS
TYP
TA = +25°C
194
200
206
TA = -40°C to +85°F
186
200
212
TA = +25°C
388
400
412
TA = -40°C to +85°F
376
400
424
EL_ _[4:0] = 01000; VDD = 3.7V
33
39
45
EL_ _[4:0] = 10000; VDD = 3.7V
68
77
86
EL_ _[4:0] = 11111; VDD = 3.7V
134
150
160
fEL_LR
FEL[7:0] = 1000
0000; VDD = 3.7V
fEL_HR
FEL[7:0] = 1011
1111; VDD = 3.7V
EL Lamp Switching Frequency
MIN
Hz
BOOST CONVERTER
Peak Output Voltage
Tapped-Inductor Center
Switching Frequency
Vcs
fSW
FSW[4:0] = 10000
400
FSW[4:0] = 11111
800
FSW[4:0] = 00000 (default)
800
FSW[4:0] = 01111
1600
Tapped-Inductor Switching
Frequency Spreading Factor
SF
SS[1:0] = 01, 10, or 11
Tapped-Inductor Switching
Frequency Modulation Frequency
fM
SS[1:0] = 11
Switch On-Resistance
RLX
ISINK = 25mA, VDD = 3.7V
LX Current
ILX
VLX = 30V
CS Input Current
ICS
No load, VCS = 150V
V
kHz
8
%
fSW/128
kHz
3
-1
Ω
+10
µA
27
µA
CONTROL INPUT AUX
Input Range
AUXRNG
Input Capacitance
AUXCAP
0
VDD
10
V
pF
CONTROL INPUT RB
Input Logic-Low Voltage
VIL_RB
Input Logic-High Voltage
VIH_RB
Input Hysteresis
IHYS_RB
Input Leakage Current
ILKG_RB
Input Capacitance
0.5
1.5
V
130
VRB = 5.5V or 0
-1
CIN
V
mV
+1
10
µA
pF
I2C INTERFACE LOGIC (SDA, SCL, A1, AND A0) (Figure 1)
Input Logic-Low Voltage
VIL
Input Logic-High Voltage
VIH
Input Hysteresis
IHYS
0.5
1.5
V
V
130
mV
_______________________________________________________________________________________
3
MAX14521E
ELECTRICAL CHARACTERISTICS (continued)
MAX14521E
Quad, High-Voltage EL Lamp Driver
with I2C Interface
ELECTRICAL CHARACTERISTICS (continued)
(VDD = +2.7V to +5.5V, total CLAMP = 10nF, CCS = 3.3nF, tapped inductor = 2.3µH/115µH, 1:7 ratio (ISAT = 0.7A, RS = 1Ω),
TA = -40°C to +85°C, unless otherwise noted. Typical values are at TA = +25°C and VDD = 3.7V.) (Note 2)
PARAMETER
Input Leakage Current
SYMBOL
CONDITIONS
ILKG
Output Low Voltage
VOL
Input/Output Capacitance
CI/O
Serial-Clock Frequency
fSCL
MIN
TYP
-1
ISINK = 3mA
MAX
UNITS
+1
µA
0.4
10
V
pF
400
kHz
Clock Low Period
tLOW
1.3
µs
Clock High Period
tHIGH
0.6
µs
Bus Free Time
tBUF
1.3
µs
START Setup Time
tSU,STA
0.6
µs
START Hold Time
tHD,STA
0.6
µs
STOP Setup Time
tSU,STO
0.6
µs
Data In Setup Time
tSU,DAT
100
Data In Hold Time
tHD,DAT
0
ns
900
ns
Receive SCL/SDA Minimum Rise
Time
tR
20 +
0.1CB
ns
Receive SCL/SDA Maximum Rise
Time
tR
300
ns
Receive SCL/SDA Minimum Fall
Time
tF
20 +
0.1CB
ns
Receive SCL/SDA Maximum Fall
Time
tF
300
ns
Transmit SDA Fall Time
tF
SCL/SDA Noise Suppression
Time
tI
CB = 400pF
20 +
0.1CB
300
50
ns
ns
ESD PROTECTION
Human Body Model
EL_, COM
±15
IEC 61000-4-2 Contact Discharge
±6
IEC 61000-4-2 Air Gap Discharge
±8
kV
THERMAL PROTECTION
Thermal Shutdown
TSHDN
160
°C
Thermal Shutdown Hysteresis
THYST
12
°C
Note 2: All parameters are 100% production tested at TA = +25°C and TA = +85°C, unless otherwise noted. Parameters at -40°C are
guaranteed by design.
Note 3: See the fSW Selection section when VBAT is above 5.5V.
4
_______________________________________________________________________________________
Quad, High-Voltage EL Lamp Driver
with I2C Interface
MAX14521E
SDA
tBUF
tSU, STA
tSU, DAT
tHD, STA
tHD, DAT
tLOW
tSU, STO
SCL
tHIGH
tHD, STA
tR
tF
REPEATED
START CONDITION
START
CONDITION
STOP
CONDITION
START
CONDITION
Figure 1. I2C Timing Specifications
Typical Operating Characteristics
(VDD = 3.7V, total CLAMP = 10nF, CCS = 3.3nF, LX = 2.3µH/115µH, 1:7 ratio, (ISAT = 0.7A, RS = 1Ω), TA = +25°C, sine-wave output,
fSW = 800kHz, fEL = 200Hz, unless otherwise noted.)
10
0
3.1
3.5
3.9
4.3
4.7
5.5
10
35
60
TOTAL INPUT CURRENT vs. LOAD
SHUTDOWN CURRENT
vs. SUPPLY VOLTAGE
VDD = 3.3V
fSW = 400kHz
VEL = 200VP-P
80
40
0
20
40
60
TOTAL COMBINED LOAD (nF)
80
20
400
600
800
1000
1200
1400
1600
SHUTDOWN CURRENT vs. TEMPERATURE
1.5
1
0.5
100
10
1
0.1
0
0
40
BOOST CONVERTER FREQUENCY (kHz)
MAX14521E toc05
VDD = 5V
fSW = 700kHz
60
85
2
SHUTDOWN CURRENT (nA)
160
120
-15
TEMPERATURE (°C)
VEL = 250VP-P, fSW = 800kHz,
UNLESS OTHERWISE NOTED
POINT WHERE SET
VEL DECREASES AS
FREQUENCY INCREASES
0
-40
SUPPLY VOLTAGE (V)
200
TOTAL INPUT CURRENT (mA)
5.1
MAX14521E toc04
2.7
VFI = 300VP-P
VFI = 200VP-P
MAX14521E toc06
20
80
TOTAL INPUT CURRENT (mA)
30
VFI = 300VP-P
SHUTDOWN CURRENT (nA)
40
60
56
52
48
44
40
36
32
28
24
20
16
12
8
4
0
MAX14521E toc02
50
TOTAL INPUT CURRENT (mA)
VFI = 300VP-P
VFI = 200VP-P
MAX14521E toc01
TOTAL INPUT CURRENT (mA)
60
TOTAL INPUT CURRENT
vs. BOOST CONVERTER FREQUENCY
TOTAL INPUT CURRENT
vs. TEMPERATURE
MAX14521E toc03
TOTAL INPUT CURRENT
vs. SUPPLY VOLTAGE
2.7
3.1
3.5
3.9
4.3
4.7
SUPPLY VOLTAGE (V)
5.1
5.5
-40
-15
10
35
60
85
TEMPERATURE (°C)
_______________________________________________________________________________________
5
Typical Operating Characteristics (continued)
(VDD = 3.7V, total CLAMP = 10nF, CCS = 3.3nF, LX = 2.3µH/115µH, 1:7 ratio, (ISAT = 0.7A, RS = 1Ω), TA = +25°C, sine-wave output,
fSW = 800kHz, fEL = 200Hz, unless otherwise noted.)
PEAK-TO-PEAK OUTPUT VOLTAGE
vs. TEMPERATURE
210
200
190
CLOAD = 20nF
180
170
200
195
160
3.5
3.9
4.3
4.7
5.1
35
60
AVERAGE OUTPUT VOLTAGE
vs. TEMPERATURE
-300
-400
-500
-600
-700
-800
0
-100
-200
-400
-500
-600
-700
-800
-900
-1000
-1000
3.1
3.5
3.9
4.3
4.7
5.1
5.5
MAX14521E toc09
50
0
8
16
24
32
1000
900
800
700
600
500
400
300
200
100
0
-40
-15
10
35
60
85
0
64
128
192
256
SUPPLY VOLTAGE (V)
TEMPERATURE (°C)
FEL[7:0] CODE (DECIMAL VALUE)
EL SWITCHING FREQUENCY
vs. SUPPLY VOLTAGE
EL SWITCHING FREQUENCY
vs. TEMPERATURE
BOOST CONVERTER FREQUENCY
vs. FSW[4:0]
195
VFI = 200VP-P
205
200
195
3.1
3.5
3.9
4.3
4.7
SUPPLY VOLTAGE (V)
5.1
5.5
1600
1400
1200
1000
800
600
400
200
0
190
190
1800
BOOST CONVERTER FREQUENCY (kHz)
200
MAX14521E toc14
205
210
EL SWITCHING FREQUENCY (Hz)
MAX14521E toc13
210
2.7
100
EL SWITCHING FREQUENCY vs. FEL[7:0]
-300
-900
150
85
MAX14521E toc11
-200
200
EL_ _[4:0] CODE (DECIMAL VALUE)
AVERAGE OUTPUT VOLTAGE
vs. SUPPLY VOLTAGE
MAX14521E toc10
AVERAGE OUTPUT VOLTAGE (mV)
10
TEMPERATURE (°C)
-100
2.7
-15
SUPPLY VOLTAGE (V)
0
6
-40
5.5
EL SWITCHING FREQUENCY (Hz)
3.1
AVERAGE OUTPUT VOLTAGE (mV)
2.7
250
0
190
150
300
MAX14521E toc12
CLOAD = 10nF
205
MAX14521E toc15
220
VFI = 200VP-P
350
PEAK-TO-PEAK OUTPUT VOLTAGE (V)
230
PEAK-TO-PEAK OUTPUT VOLTAGE vs. CODE
MAX14521E toc08
VFI = 200VP-P
240
210
PEAK-TO-PEAK OUTPUT VOLTAGE (V)
PEAK-TO-PEAK OUTPUT VOLTAGE (V)
250
MAX14521E toc07
PEAK-TO-PEAK OUTPUT VOLTAGE
vs. SUPPLY VOLTAGE
EL SWITCHING FREQUENCY (Hz)
MAX14521E
Quad, High-Voltage EL Lamp Driver
with I2C Interface
-40
-15
10
35
TEMPERATURE (°C)
60
85
0
4
8
12
16
20
24
FSW[4:0] CODE (DECIMAL VALUE)
_______________________________________________________________________________________
28
32
Quad, High-Voltage EL Lamp Driver
with I2C Interface
1000
500
0
1.5
1
0.5
0
2
4
6
8
RBW = 100Hz
fSW = 1.6MHz
VEL = 300VP-P
SS[1:0] = 00
-20
-40
-60
-80
-100
0
0
MAX14521E toc18
MAX14521E toc17
VFI = 200VP-P
BOOST CONVERTER MAGNITUDE (dBV)
RAMP TIME (ms)
1500
2
NORMALIZED BRIGHTNESS
MAX14521E toc16
2000
2.7
3.1
3.5
3.9
4.3
4.7
5.1
0
5.5
10
SUPPLY VOLTAGE (V)
BOOST CONVERTER MAGNITUDE vs.
FREQUENCY (SPREAD SPECTRUM ENABLED)
SCOPE SHOT WITH SL[1:0] = 00
SCOPE SHOT WITH SL[1:0] = 01
MAX14521E toc21
MAX14521E toc20
MAX14521E toc19
RBW = 100Hz
fSW = 1.6MHz
VEL = 300VP-P
SS[1:0] = 10
-20
100
FREQUENCY (MHz)
RT_ _[2:0] CODE (DECIMAL VALUE)
0
BOOST CONVERTER MAGNITUDE (dBV)
BOOST CONVERTER MAGNITUDE vs.
FREQUENCY (SPREAD SPECTRUM DISABLED)
NORMALIZED BRIGHTNESS
vs. SUPPLY VOLTAGE
RAMP TIME vs. CODE
MAX14521E
Typical Operating Characteristics (continued)
(VDD = 3.7V, total CLAMP = 10nF, CCS = 3.3nF, LX = 2.3µH/115µH, 1:7 ratio, (ISAT = 0.7A, RS = 1Ω), TA = +25°C, sine-wave output,
fSW = 800kHz, fEL = 200Hz, unless otherwise noted.)
-40
Math Freq
201.7 Hz
Math Freq
201.3 Hz
Math Pk-Pk
205 V
Math Pk-Pk
208 V
-60
-80
-100
0
10
100
FREQUENCY (MHz)
SCOPE SHOT WITH SL[1:0] = 11
SCOPE SHOT WITH SL[1:0] = 10
RAMPING TIME
MAX14521E toc23
MAX14521E toc22
MAX14521E toc24
Math Freq
201.8 Hz
Math Freq
202.0 Hz
Math Pk-Pk
208 V
Math Pk-Pk
208 V
Math Pk-Pk
298 V
VEL
50V/div
1s/div
_______________________________________________________________________________________
7
MAX14521E
Quad, High-Voltage EL Lamp Driver
with I2C Interface
Pin Description
PIN
NAME
FUNCTION
1
EL1
High-Voltage EL Panel Output 1. Connect EL1 to segment 1 of the EL lamp.
2, 4, 16, 18,
20, 22, 24
N.C.
No Connection. Not internally connected.
3
CS
Feedback Connection. Connect CS to the output of the boost converter (cathode of the rectifying diode).
5
LX
Internal Switching DMOS Drain Connection. Connect LX to the middle terminal of the tapped inductor.
6
PGND
7
A0
Address Input 0. Address inputs allow up to four connections on one common bus. Connect A0 to
GND or VDD.
8
A1
Address Input 1. Address inputs allow up to four connections on one common bus. Connect A1 to
GND or VDD.
9
VDD
10
SDA
Open-Drain, Serial Data Input/Output. SDA requires an external pullup resistor.
11
SCL
Serial-Clock Input. SCL requires an external pullup resistor.
12
RB
Reset Input. Drive RB low to clear all registers to zero and put the device into a low-power shutdown
mode. The device does not respond to I2C communications when RB is held low.
13
AUX
Audio Effects Input. Modulates amplitude/frequency of the EL output with the AUX input voltage amplitude.
14
I.C.
Internally Connected. Connect I.C. to GND.
15
GND
Ground
17
EL4
High-Voltage EL Panel Output 4. Connect EL4 to segment 4 of the EL lamp.
19
EL3
High-Voltage EL Panel Output 3. Connect EL3 to segment 3 of the EL lamp.
21
COM
23
EL2
High-Voltage EL Panel Output 2. Connect EL2 to segment 2 of the EL lamp.
—
EP
Exposed Pad. Connect EP to GND.
Power Ground. Connect to GND.
Input Supply Voltage
High-Voltage COM Output. Connect COM to common terminal of the EL lamp.
Detailed Description
The MAX14521E is a quad-output high-voltage DC-AC
converter that drives four EL lamps. The device features a 2.7V to 5.5V input range that allows the device
to accept a variety of sources such as single-cell Li+
batteries. The lamp outputs of the device generate up
to 300VP-P for maximum lamp brightness.
The MAX14521E utilizes a high-frequency spreadspectrum boost converter that reduces the amount of
EMI/EFI generated by the circuit. The boost-converter
switching frequency is set with an 8-bit register through
the I2C interface. The MAX14521E uses a high-voltage
full-bridge output stage to convert the high voltage generated by the boost converter to an AC waveform suitable for driving an EL lamp. An internal register
controlled through the I2C interface sets the shape of
the EL output waveshape.
8
The EL output switching frequency for all outputs is set
with an 8-bit register through the I2C interface. The
MAX14521E provides a serial digital interface that
allows the user to set the peak voltage of each output
independently with 5 bits of resolution. The MAX14521E
also provides an adjustable automatic ramping feature
that slowly increases or decreases the peak output voltage when the set value is changed. The slew rate of the
ramp is set with 3 bits of resolution through the I2C
interface and it is independent for each channel. The
MAX14521E features an audio auxiliary input AUX that
modulates the EL output voltage and frequency for
dynamic lighting effects.
The high-voltage outputs are ESD protected up to
±15kV Human Body Model, ±8kV Air Gap Discharge,
and ±6kV Contact Discharge, as specified in
IEC 61000-4-2.
_______________________________________________________________________________________
Quad, High-Voltage EL Lamp Driver
with I2C Interface
THERMAL
SHUTDOWN
VSENSE
SHAPE CONTROL
DMOS DRIVER
FEL OSC
NO-OPERATION
SIGNAL
HALF
H-BRIDGE
MAX14521E
HIGH
ESD
PROT
COM
HALF
H-BRIDGE
fSW OSCILLATOR
HIGH
ESD
PROT
EL1
HALF
H-BRIDGE
CS
HIGH
ESD
PROT
EL2
HALF
H-BRIDGE
SPREAD SPECTRUM
AND SOFT-START
VDD
PGND
HIGH
ESD
PROT
EL3
HALF
H-BRIDGE
LX
HIGH
ESD
PROT
EL4
UVLO
SHDN
AUX
EL PEAK
CONTROL
PWM
CONVERTER
I2C
RB
SDA
SCL
EL Output Voltage
The shape, slope, frequency, ramp-on/-off times, and
peak-to-peak voltage of the MAX14521E lamp outputs
are programmed using internal registers.
The MAX14521E is capable of producing output waveforms with varying shapes and slew rates. The user
sets the shape and slew rate of the output using bits in
the EL shape registers.
The MAX14521E EL lamp output frequency uses an
internal EL oscillator to set the desired frequency. The
output frequency is adjusted by the FEL[7:0] bits of the
EL output frequency register. The EL frequency
increases and decreases linearly with FEL[7:0].
A1
A0
GND
The peak-to-peak voltage of the EL lamp output is varied from 0 to 300VP-P by programming the EL_ _[4:0]
bits of the EL ramping time and EL peak voltage registers. The peak-to-peak voltage increases and decreases linearly with EL_ _[4:0].
The MAX14521E also features a slow fade-on and slow
fade-off time feature programmed by the RT_ _ [2:0]
bits of the EL ramping time and EL peak voltage registers. This slow fade-on/-off feature causes the peak-topeak voltage of the EL outputs to slowly rise from the
previously set value to the maximum set value. This feature also causes the peak-to-peak voltage of the EL
outputs to fall from the maximum set value to zero when
the device is placed into shutdown. The slow rise and
fall of the peak-to-peak EL output voltage creates a soft
fade-on and fade-off of the EL lamp.
_______________________________________________________________________________________
9
MAX14521E
Functional Diagram
MAX14521E
Quad, High-Voltage EL Lamp Driver
with I2C Interface
Boost Converter
Auxiliary Audio Input (AUX)
The MAX14521E boost converter consists of an external-tapped inductor from VDD to the LX input, an internal DMOS switch, an external diode from the secondary
of the tapped inductor to the CS output, an external
capacitor from the CS output to GND, and an EL lamp
connected to the EL lamp outputs. When the DMOS
switch is turned on, LX is connected to GND, and the
inductor is charged. When the DMOS switch is turned
off, the energy stored in the inductor is transferred to
the capacitor CCS and the EL lamp.
Note: The MAX14521E exhibits high-voltage spikes on
the LX node. The addition of a snubber circuit to the LX
node protects the device by suppressing the highvoltage spikes. The values of RSN and CSN should be
optimized for the specific tapped inductor used.
Typical values are RSN = 20Ω and CSN = 330pF.
The MAX14521E boost-converter frequency uses an
internal oscillator to set the frequency of the boost converter. The oscillator frequency is adjusted by the
FSW[4:0] bits of the boost-converter frequency register.
The boost converter increases and decreases linearly
with FSW[3:0].
The MAX14521E uses an auxiliary input AUX that
accepts an audio signal to produce visual effects on
the EL outputs. The frequency and amplitude modulation (FR_AM) bit is set to modulate the EL output voltage or frequency. The AUX audio signal modulates the
EL output voltage when FR_AM is set to 0 and modulates the EL output frequency when FR_AM is set to 1.
To further reduce the amount of EMI/EFI generated by
the circuit, the boost-converter frequency can be modulated (see the SS[1:0] bits of the boost-converter frequency register). Enabling modulation spreads the
switching energy of the oscillator in the frequency
domain, thus decreasing EMI.
Independent Dimming Control
The brightness of an EL lamp is proportional to the
peak-to-peak voltage applied across the lamp. The
MAX14521E provides four registers to control the EL
peak-to-peak voltage of each EL output using the
EL_ _[4:0] bits of the EL ramping time and EL peak voltage registers.
EL Output Waveshape
The MAX14521E can produce sine-wave to squarewave waveshapes on the EL output by varying the
slope of the EL output. This is achieved by using bits
SL[1:0] of the EL shape register. If the EL shape configuration is set to sine and if all EL outputs have the same
amplitude settings, then each EL output has a sinusoidal waveshape. If the EL outputs have different
amplitude settings, then the EL output with the highest
setting has a sine waveshape while the remaining EL
outputs have a clamped sine waveshape.
10
When the NO_SAMPLE bit is enabled, the voltage of
the EL outputs is proportional to the voltage at AUX. For
example, when FR_AM = 0, NO_SAMPLE = 1, and any
of the AU1, AU2, AU3, AU4 bits are set to 1, the peak
value of those particular channels follow AUX directly.
If AUX is a DC value, the EL output voltage is VEL = 250
x AUX (VP-P) with a maximum of 300VP-P.
AUX can also accept a PWM signal with a frequency
ranging from 100kHz to 10MHz, where the EL output
voltage is V EL = 300 x DutyCycle% (V P-P ). The
NO_SAMPLE bit has no effect when FR_AM = 1.
When FR_AM = 1, frequency modulation is enabled and
the AUXDIV1 and AUXDIV0 bits are used to divide the
audio frequency and apply this to the EL outputs. AU1,
AU2, AU3, and AU4 must be set to 1 to enable this feature.
Shutdown
The MAX14521E features two methods to place the
device in shutdown: 1) a reset input, RB, to clear all
registers to zero and put the device into low-power
shutdown mode, and 2) the EN bit of the system register. Using method 1, the device does not respond to
I 2 C communications when RB is held low. Using
method 2, the EL outputs are shut down; however, the
register contents remain unchanged.
Undervoltage Lockout (UVLO)
The MAX14521E has a UVLO threshold of +2.0V (typ).
When VDD falls below +2.0V (typ), the device enters a
nonoperative mode. The contents of the I2C registers
are not guaranteed below UVLO.
Thermal Protection
The MAX14521E enters a nonoperative mode if the
internal die temperature of the device reaches or
exceeds +160°C (typ). The MAX14521E is latched, and
only placing RB to 0 resets the thermal protection bit as
well as all registers.
______________________________________________________________________________________
Quad, High-Voltage EL Lamp Driver
with I2C Interface
Ten internal registers program the MAX14521E. Table 1
lists all the registers, their addresses, and power-on
reset states. All registers are read/write. Register 0x0A
is reserved as a command to update all EL peak voltage output registers. Register 0x0B is reserved and
should not be written to.
Table 1. Register Map
REGISTER
B7
B6
B5
B4
B3
B2
B1
B0
REGISTER
ADDRESS
POWER-ON
RESET STATE
REV3
REV2
REV1
REV0
0x00
0xB2
SYSTEM
Device ID
DEVID3 DEVID2 DEVID1 DEVID0
Power Mode
OVR
TEMP*
X
X
X
X
X
X
EN
0x01
0x00
FEL7
FEL6
FEL5
FEL4
FEL3
FEL2
FEL1
FEL0
0x02
0x00
X
ENDAMP
X
X
SL1
SL0
0x03
0x00
X
FSW4
EL FREQUENCY
EL Output
Frequency
EL SHAPE
Slope/Shape
SHAPE1 SHAPE0
BOOST-CONVERTER FREQUENCY
Boost-Converter
Frequency
SS1
SS0
FSW3
FSW2
FSW1
FSW0
0x04
0x00
AU4
AU3
AU2
AU1
0x05
0x00
AUDIO
Audio Effects
FR_AM
NO_
AUXDIV1 AUXDIV0
SAMPLE
EL RAMPING TIME AND EL PEAK VOLTAGE
EL1 Ramping
Time and EL
Peak Voltage**
RT1_2
RT1_1
RT1_0
EL1_4
EL1_3
EL1_2
EL1_1
EL1_0
0x06
0x00
EL2 Ramping
Time and EL
Peak Voltage**
RT2_2
RT2_1
RT2_0
EL2_4
EL2_3
EL2_2
EL2_1
EL2_0
0x07
0x00
EL3 Ramping
Time and EL
Peak Voltage**
RT3_2
RT3_1
RT3_0
EL3_4
EL3_3
EL3_2
EL3_1
EL3_0
0x08
0x00
EL4 Ramping
Time and EL
Peak Voltage**
RT4_2
RT4_1
RT4_0
EL4_4
EL4_3
EL4_2
EL4_1
EL4_0
0x09
0x00
X = Don’t Care
*Read back only.
**Send command 0Ah (update all EL ramping time and EL peak voltage registers) to have the programmed voltage effectively
applied to the EL lamp.
______________________________________________________________________________________
11
MAX14521E
I2C Registers and
Bit Descriptions
MAX14521E
Quad, High-Voltage EL Lamp Driver
with I2C Interface
Slave Address
The MAX14521E device address is set through external
inputs. The slave address consists of five fixed bits
(B7–B3, set to 11110) followed by two input programmable bits (A1 and A0).
For example: If A1 and A0 are hardwired to ground,
then the complete address is 1111000. The full address
is defined as the seven most significant bits followed by
the read/write bit. Set the read/write bit to 1 to configure
the MAX14521E to read mode. Set the read/write bit to
0 to configure the MAX14521E to write mode. The
address is the first byte of information sent to the
MAX14521E after the START condition.
System Registers (0x00, 0x01)
Device ID (DEVID3/DEVID2/DEVID1/DEVID0)
DEVID[3:0] is preprogrammed to 1011 to identify the
MAX14521E; see Table 2.
System Enable (EN)
1 = EL outputs enabled.
0 = EL outputs disabled.
EN = 1 places the MAX14521E in a normal operating
mode. Register contents are restored to values prior to
shutdown. EN = 0 disables the EL outputs and places
the device in a low-power shutdown state.
EL Frequency Register (0x02)
EL Frequency (FEL[7:0])
FEL[7:6] sets the EL frequency range of all EL outputs
and FEL[5:0] sets the EL frequency within the frequency range; see Table 4. FEL[5:0] = 000000 sets the frequency to the minimum value of the frequency range.
FEL[5:0] = 111111 sets the frequency to the maximum
value of the frequency range. EL frequency increases
linearly with FEL[5:0]; see Table 3.
Revision (REV3/REV2/REV1/REV0)
REV[3:0] is preprogrammed to the current revision of
the MAX14521E and is REV[3:0] = 0010.
System Overtemperature (OVRTEMP)
1 = Thermal shutdown temperature exceeded.
0 = Analog circuitry operating properly.
OVRTEMP = 1 turns the EL outputs off. To set
OVRTEMP to 0 and restart in default condition (all register reset), the user must place RB = 0.
Table 2. Device Identification, Status, and Enable
REGISTER
B7
B6
B5
B4
B3
B2
B1
B0
0x00
DEVID3
DEVID2
DEVID1
DEVID0
REV3
REV2
REV1
REV0
0x01
OVRTEMP
X
X
X
X
X
X
EN
X = Don’t Care
Table 3. EL Output Frequency
REGISTER
B7
B6
B5
B4
B3
B2
B1
B0
0x02
FEL7
FEL6
FEL5
FEL4
FEL3
FEL2
FEL1
FEL0
Table 4. EL Frequency Range
FEL[7:6]
12
EL FREQUENCY RANGE (Hz)
00
50–100
01
100–200
10
200–400
11
400–800
______________________________________________________________________________________
Quad, High-Voltage EL Lamp Driver
with I2C Interface
Damping Enable (ENDAMP)
1 = Active damping on LX node enabled.
0 = Active damping on LX node disabled.
ENDAMP = 1 actively damps the oscillation on the LX
pin and could reduce EMI.
EL Shape (SHAPE1/SHAPE0)
SHAPE[1:0] sets the desired EL output waveform; see
Tables 5 and 6.
EL Slew Rate (SL1/SL0)
SL[1:0] sets the slope of the EL output; see Table 7.
Boost-Converter Frequency Register
(0x04)
Spread Spectrum (SS1/SS0)
SS[1:0] sets the spread-spectrum modulation frequency to a fraction of the boost-converter frequency; see
Tables 8 and 9.
Boost-Converter Switching Frequency (FSW[4:0])
FSW4 sets the switching frequency range of the boost
converter and FSW[3:0] sets the switching frequency
within the frequency range; see Table 10. The frequency
range for FSW4 = 0 is 800kHz–1600kHz. The frequency
range for FSW4 = 1 is 400kHz–800kHz. FSW[3:0] =
0000 sets the frequency to the minimum value of the frequency range. FSW[3:0] = 1111 sets the frequency to
the maximum value of the frequency range. Boost-converter switching frequency increases linearly with
FSW[3:0].
Table 5. EL Shape Configuration
REGISTER
B7
B6
B5
B4
B3
B2
B1
B0
0x03
X
ENDAMP
X
X
SHAPE1
SHAPE0
SL1
SL0
X = Don’t Care
Table 6. EL Output Shape Configuration
Table 7. EL Slope Configuration
SHAPE[1:0]
EL OUTPUT SHAPE
SL[1:0]
EL OUTPUT SLOPE
0X
Sine
00
Sine
10
Do Not Use
01
Fast Slope
11
Do Not Use
10
Faster Slope
11
Fastest Slope
(Square Wave)
X = Don’t Care
Table 8. Boost-Converter Configurations
REGISTER
B7
B6
B5
B4
B3
B2
B1
B0
0x04
SS1
SS0
X
FSW4
FSW3
FSW2
FSW1
FSW0
X = Don’t Care
Table 9. Spread-Spectrum Configuration
SS[1:0]
SPREAD SPECTRUM
00
Disabled
01
1/8
10
1/32
11
1/128
______________________________________________________________________________________
13
MAX14521E
EL Shape Register (0x03)
MAX14521E
Quad, High-Voltage EL Lamp Driver
with I2C Interface
Audio Input Register (0x05)
Frequency and Amplitude Modulation (FR_AM)
0 = AUX input signal modulates EL output voltage.
1 = AUX input frequency modulates EL output frequency.
AUX Envelope on EL Output (NO_SAMPLE)
1 = The EL output envelope follows that of the AUX
envelope.
Set FR_AM = 0 when NO_SAMPLE = 1 and enable the
corresponding EL outputs by bits AU[4:1]. If FR_AM =
1, the NO_SAMPLE bit has no effect. If AUX is a DC
value, the EL output peak-to-peak voltage is EL_ (VP-P)
= 250 x AUX (V) with a maximum of 300VP-P. If AUX is a
PWM signal with a frequency from 100kHz to 10MHz,
the EL output voltage is VEL = 300 x DutyCycle% (VP-P).
0 = AUX is sampled every fEL cycle and the corresponding EL output cycle has zero DC average.
Table 10. Boost-Converter Frequency Range
BOOST-CONVERTER SWITCHING FREQUENCY (kHz)
FSW3
FSW2
FSW1
FSW0
FSW4 = 0
FSW4 = 1
0
0
0
0
800
400
0
0
0
1
853
427
0
0
1
0
907
453
0
0
1
1
960
480
0
1
0
0
1013
507
0
1
0
1
1067
533
0
1
1
0
1120
560
0
1
1
1
1173
587
1
0
0
0
1227
613
1
0
0
1
1280
640
1
0
1
0
1333
667
1
0
1
1
1387
693
1
1
0
0
1440
720
1
1
0
1
1493
747
1
1
1
0
1547
773
1
1
1
1
1600
800
Table 11. Audio Input Configurations
REGISTER
0x05
14
B7
B6
B5
B4
B3
B2
B1
B0
FR_AM
NO_
SAMPLE
AUXDIV1
AUXDIV0
AU4
AU3
AU2
AU1
______________________________________________________________________________________
Quad, High-Voltage EL Lamp Driver
with I2C Interface
lows COM. When EL_ _[4:0] = 11111, the EL output
has a 150V peak with respect to COM. The EL output
voltage rises linearly with EL_ _[4:0].
Audio Enable (AU4/AU3/AU2/AU1)
1 = Enable audio effect to EL output.
0 = Disable audio effect to EL output.
When FR_AM = 0 the EL outputs can be enabled
and disabled independently according to AU[4:1].
When FR_AM = 1 then all AU[4:1] bits must be set to 1
(i.e. AU[4:1] = 1111) to enable the audio effect on the
EL outputs.
I2C Interface
The MAX14521E features an I2C-compatible as a slave
device, 2-wire serial interface consisting of a serial data
line (SDA) and a serial-clock line (SCL). SDA and SCL
facilitate communication to the device at clock rates up
to 400kHz. Figure 1 shows the 2-wire interface timing
diagram. The master generates SCL and initiates data
transfer on the bus. A master device writes data to the
MAX14521E by transmitting the proper slave address
followed by the register address and then the data
word. Each transmit sequence is framed by a START
(S) or REPEATED START (Sr) condition and a STOP (P)
condition. Each word transmitted to the MAX14521E is
8 bits long and is followed by an acknowledge clock
pulse. A master reading data from the MAX14521E
transmits data on SDA in sync with the master-generated SCL pulses. The master acknowledges receipt of
each byte of data. Each read sequence is framed by a
START or REPEATED START condition, a not acknowledge, and a STOP condition. SDA operates as both an
input and an open-drain output. A pullup resistor, typically greater than 500Ω, is required on SCL if there are
multiple masters on the bus, or if the master in a singlemaster system has an open-drain SCL output. Series
resistors in line with SDA and SCL are optional. Series
resistors protect the digital inputs of the MAX14521E
from high-voltage spikes on the bus lines, and minimize
crosstalk and undershoot of the bus signals.
EL Peak Ramping Time and EL Peak
Voltage Register (0x06, 0x07, 0x08, 0x09)
EL Ramping Time (RT4_ _/RT3_ _/RT2_ _/RT1_ _)
RT_ _[2:0] sets the ramp time of each EL output; see
Table 14.
EL Peak-to-Peak Voltage (EL1_ _/EL2_ _/
EL3_ _/EL4_ _)
EL _ _[4:0] controls the peak-to-peak voltage of each
EL output. When EL _ _[4:0] = 00000, the EL output fol-
Table 12. AUX Frequency Divider
Configuration
AUXDIV[1:0]
AUX FREQUENCY DIVIDER
00
16
01
8
10
4
11
2
Table 13. EL Output Configuration
REGISTER
B7
B6
B5
B4
B3
B2
B1
B0
0x06
RT1_2
RT1_1
RT1_0
EL1_4
EL1_3
EL1_2
EL1_1
EL1_0
0x07
RT2_2
RT2_1
RT2_0
EL2_4
EL2_3
EL2_2
EL2_1
EL2_0
0x08
RT3_2
RT3_1
RT3_0
EL3_4
EL3_3
EL3_2
EL3_1
EL3_0
0x09
RT4_2
RT4_1
RT4_0
EL4_4
EL4_3
EL4_2
EL4_1
EL4_0
Table 14. Ramping Time Configuration
RT_ _[2:0]
RAMPING TIME (ms)
000
< 0.1
001
62.5
010
125
011
250
100
500
101
750
110
1000
111
2000
______________________________________________________________________________________
15
MAX14521E
Frequency Divider (AUXDIV1/AUXDIV0)
AUXDIV[1:0] sets the divisor to divide down the AUX
input frequency; see Table 12.
MAX14521E
Quad, High-Voltage EL Lamp Driver
with I2C Interface
Bit Transfer
One data bit is transferred during each SCL cycle. The
data on SDA must remain stable during the high period
of the SCL pulse. Changes in SDA while SCL is high
are control signals (see the START and STOP
Conditions section). SDA and SCL idle high when the
I2C bus is not busy.
START and STOP Conditions
SDA and SCL idle high when the bus is not in use. A
master initiates communication by issuing a START condition. A START condition is a high-to-low transition on
SDA with SCL high. A STOP condition is a low-to-high
transition on SDA while SCL is high (Figure 2). A START
condition from the master signals the beginning of a
transmission to the MAX14521E. The master terminates
transmission and frees the bus by issuing a STOP condition. The bus remains active if a REPEATED START
condition is generated instead of a STOP condition.
S
Sr
P
0 to configure the MAX14521E to write mode. The
address is the first byte of information sent to the
MAX14521E after the START condition.
Acknowledge
The acknowledge bit (ACK) is a clocked 9th bit that the
MAX14521E uses to handshake receipt each byte of
data when in write mode (see Figure 3). The
MAX14521E pull down SDA during the entire mastergenerated 9th clock pulse if the previous byte is successfully received. Monitoring ACK allows for detection
of unsuccessful data transfers. An unsuccessful data
transfer occurs if a receiving device is busy or if a system fault had occurred. In the event of an unsuccessful
data transfer, the bus master may retry communication.
The master pulls down SDA during the 9th clock cycle
to acknowledge receipt of data when the MAX14521E
are in read mode. An acknowledge is sent by the master after each read byte to allow data transfer to continue. A not acknowledge is sent when the master reads
the final byte of data from the MAX14521E followed by
a STOP condition.
SCL
CLOCK PULSE FOR
ACKNOWLEDGMENT
START
CONDITION
SDA
SCL
1
2
8
9
NOT ACKNOWLEDGE
SDA
Figure 2. START, STOP, and REPEATED START Conditions
ACKNOWLEDGE
Early STOP Conditions
The MAX14521E recognizes a STOP condition at any
point during data transmission except if the STOP condition occurs in the same high pulse as a START condition. For proper operation, do not send a STOP
condition during the same SCL high pulse as the
START condition.
Slave Address
The MAX14521E has selectable device addresses
through external inputs. The slave address consists of
five fixed bits (B7–B3, set to 11110) followed by two pin
programmable bits (A1 and A0).
For example: If A1 and A0 are hardwired to ground, the
complete address is 1111000. The full address is
defined as the seven most significant bits followed by
the read/write bit. Set the read/write bit to 1 to configure
the MAX14521E to read mode. Set the read/write bit to
16
Figure 3. Acknowledge
Write Data Format
A write to the MAX14521E includes transmission of a
START condition, the slave address with the R/W bit set
to 0, one byte of data to configure the internal register
address pointer, one or more bytes of data, and a
STOP condition. Figure 4 illustrates the proper frame
format for writing one byte of data to the MAX14521E.
Figure 5 illustrates the frame format for writing n-bytes
of data to the MAX14521E.
The slave address with the R/W bit set to 0 indicates
that the master intends to write data to the MAX14521E.
The MAX14521E acknowledge receipt of the address
byte during the master-generated 9th SCL pulse.
______________________________________________________________________________________
Quad, High-Voltage EL Lamp Driver
with I2C Interface
data byte. This autoincrement feature allows a master
to write to sequential registers within one continuous
frame. Attempting to write to register addresses higher
than 0x0B results in repeated writes of 0x0B. Figure 5
illustrates how to write to multiple registers with one
frame. The master signals the end of transmission by
issuing a STOP condition.
ACKNOWLEDGE FROM MAX14521E
B7
ACKNOWLEDGE FROM MAX14521E
SLAVE ADDRESS
S
0
B6
B5
B4
B3
B2
B1
B0
ACKNOWLEDGE FROM MAX14521E
A
REGISTER ADDRESS
A
DATA BYTE
A
R/W
P
1 BYTE
AUTOINCREMENT INTERNAL
REGISTER ADDRESS POINTER
Figure 4. Writing One Byte of Data to the MAX14521E
ACKNOWLEDGE FROM MAX14521E
ACKNOWLEDGE FROM MAX14521E
S
SLAVE ADDRESS
A
REGISTER ADDRESS
R/W
B7 B6 B5 B4 B3 B2 B1 B0
B7 B6 B5 B4 B3 B2 B1 B0
ACKNOWLEDGE FROM MAX14521E
0
ACKNOWLEDGE FROM MAX14521E
A
DATA BYTE 1
A
1 BYTE
DATA BYTE n
A
P
1 BYTE
AUTOINCREMENT INTERNAL
REGISTER ADDRESS POINTER
Figure 5. Writing n-Bytes of Data to the MAX14521E
______________________________________________________________________________________
17
MAX14521E
The second byte transmitted from the master configures the MAX14521E internal register address pointer.
The pointer tells the MAX14521E where to write the
next byte of data. An acknowledge pulse is sent by the
MAX14521E upon receipt of the address pointer data.
The third byte sent to the MAX14521E contains the
data that will be written to the chosen register. An
acknowledge pulse from the MAX14521E signals
receipt of the data byte. The address pointer autoincrements to the next register address after each received
MAX14521E
Quad, High-Voltage EL Lamp Driver
with I2C Interface
Read Data Format
register before a read command is issued. The master
presets the address pointer by first sending the
MAX14521E’s slave address with the R/W bit set to 0
followed by the register address. A REPEATED START
condition is then sent, followed by the slave address
with the R/W set to 1. The MAX14521E transmits the
contents of the specified register. The address pointer
autoincrements after transmitting the first byte.
Attempting to read from register addresses higher than
0x0B results in repeated reads of 0x0B. The master
acknowledges receipt of each read byte during the
acknowledge clock pulse. The master must acknowledge all correctly received bytes except the last byte.
The final byte must be followed by a not acknowledge
from the master and then a STOP condition. Figure 6
illustrates the frame format for reading one byte from
the MAX14521E. Figure 7 illustrates the frame format
for reading multiple bytes from the MAX14521E.
Send the slave address with the R/W set to 1 to initiate
a read operation. The MAX14521E acknowledges
receipt of its slave address by pulling SDA low during
the 9th SCL clock pulse. A START command followed
by a read command resets the address pointer to register 0x00. The first byte transmitted from the
MAX14521E will be the contents of register 0x00.
Transmitted data is valid on the rising edge of the master-generated serial clock (SCL). The address pointer
autoincrements after each read data byte. This autoincrement feature allows all registers to be read
sequentially within one continuous frame. A STOP condition can be issued after any number of read data
bytes. If a STOP condition is issued followed by another read operation, the first data byte to be read will be
from register 0x00 and subsequent reads will autoincrement the address pointer until the next STOP condition. The address pointer can be preset to a specific
S
SLAVE ADDRESS
0
NOT ACKNOWLEDGE FROM MASTER
ACKNOWLEDGE FROM MAX14521E
ACKNOWLEDGE FROM MAX14521E
A
A
REGISTER ADDRESS
R/W
ACKNOWLEDGE FROM MAX14521E
Sr
SLAVE ADDRESS
REPEATED START
1
R/W
A
DATA BYTE
A
P
1 BYTE
AUTOINCREMENT INTERNAL
REGISTER ADDRESS POINTER
Figure 6. Reading One Indexed Byte of Data from the MAX14521E
S
SLAVE ADDRESS
0
R/W
ACKNOWLEDGE FROM MAX14521E
ACKNOWLEDGE FROM MAX14521E
ACKNOWLEDGE FROM MAX14521E
A
REGISTER ADDRESS
A
Sr
REPEATED START
SLAVE ADDRESS
1
R/W
A
DATA BYTE
A
P
1 BYTE
AUTOINCREMENT INTERNAL
REGISTER ADDRESS POINTER
Figure 7. Reading n-Bytes of Indexed Data from the MAX14521E
18
______________________________________________________________________________________
Quad, High-Voltage EL Lamp Driver
with I2C Interface
HBM ESD Protection
Figure 8a shows the Human Body Model, and Figure
8b shows the current waveform it generates when discharged into a low impedance. This model consists of
a 100pF capacitor charged to the ESD voltage of interest, which is then discharged into the device through a
1.5kΩ resistor.
RD
1.5kΩ
RC
1MΩ
HIGHVOLTAGE
DC
SOURCE
Cs
100pF
IP 100%
90%
DISCHARGE
RESISTANCE
CHARGE-CURRENTLIMIT RESISTOR
LX Inductor Selection
The recommended tapped-inductor ratio is 1:7 with a
2.3µH primary inductance and 115µH secondary
inductance. For most applications, the primary series
resistance (DCR) should be below 1Ω for reasonable
efficiency. Do not exceed the inductor’s saturation current. See Table 15 for a list of recommended tappedinductors.
PEAK-TO-PEAK RINGING
(NOT DRAWN TO SCALE)
Ir
AMPERES
DEVICE
UNDER
TEST
STORAGE
CAPACITOR
36.8%
10%
0
0
Figure 8a. Human Body ESD Test Model
tRL
TIME
tDL
CURRENT WAVEFORM
Figure 8b. Human Body Current Waveform
Table 15. Inductor Vendors
INDUCTOR VALUE (µH)
VENDOR
URL
PART NUMBER
2.3/115
Coilcraft
www.coilcraft.com
GA3250-BL
2.3/115
Cooper
www.cooper.com
CTX03-18210-R
______________________________________________________________________________________
19
MAX14521E
Design Procedure
ESD Test Conditions
ESD performance depends on a number of conditions.
The MAX14521E are specified for ±15kV (HBM) typical
ESD resistance on the EL lamp outputs.
CCS Capacitor Selection
CCS is the output of the boost converter and provides
the high-voltage source for the EL lamp. Connect a
3.3nF capacitor from CS to GND and place as close to
the CS input as possible.
not exceeded. Special attention must be given to program the FSW bits properly when VBAT > 5.5V to avoid
destruction of the device. In general, it is good practice
to start from the highest f SW setting (1.6MHz) and
decrease accordingly to obtain the acquired waveshape on the EL outputs and to prevent exceeding the
saturation current of the tapped-inductor.
Diode Selection
Connect a diode, D1, from the LX node to CS to rectify
the boost voltage on CS. The diode should be a fast
recovery diode that is tolerant to +200V.
Applications Information
PCB Layout
EL Lamp Selection
Keep PCB traces as short as possible. Ensure that
bypass capacitors are as close to the device as possible. Use large ground planes where possible.
EL lamps have a capacitance of approximately 2.5nF
to 3.5nF per square inch. See the Total Input Current
vs. Load graph in the Typical Operating Characteristics
section for compatible lamp sizes.
Chip Information
Snubber Selection
PROCESS: BiCMOS-DMOS
An RSN value of 20Ω and CSN value of 330pF is sufficient for VDD < 5V and CLAMP_TOTAL < 40nF. For higher
capacitive loads on the EL output or for VDD > 5V, CSN
must be increased to keep LX spikes less than 30V.
Package Information
For the latest package outline information and land patterns, go
to www.maxim-ic.com/packages.
fSW Selection
Choose a boost-converter frequency such that the saturation current of the tapped-inductor primary coil is
PACKAGE TYPE
PACKAGE CODE
DOCUMENT NO.
24 TQFN-EP
T2444M-1
21-0139
Pin Configuration
EL3
19
N.C.
EL4
N.C.
GND
I.C.
AUX
TOP VIEW
18
17
16
15
14
13
12
RB
11
SCL
10
SDA
N.C.
20
COM
21
N.C.
22
9
VDD
EL2
23
8
A1
N.C.
24
7
A0
MAX14521E
*EP
3
4
5
6
N.C.
LX
PGND
2
CS
1
N.C.
+
EL1
MAX14521E
Quad, High-Voltage EL Lamp Driver
with I2C Interface
TQFN-EP
*EXPOSED PAD. CONNECT EP TO GND.
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
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© 2009 Maxim Integrated Products
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