19-2858; Rev 2; 2/94 8 x 8 Video Crosspoint Switch ________________________Applications Video Test Equipment ____________________________Features ♦ ♦ ♦ ♦ ♦ ♦ Routes Any Input Channel to Any Output Channel Switches Standard Video Signals Serial or Parallel Digital Interface Expandable for Larger Switch Matrices 80dB All-Channel Off Isolation at 5MHz 8 Internal Buffers with: 250V/µs Slew Rate, Three-State Output Capability, Power-Saving Disable Feature, 35MHz Bandwidth ______________Ordering Information PART TEMP. RANGE 0°C to +70°C 40 Plastic DIP MAX456CQH MAX456C/D 0°C to +70°C 0°C to +70°C 44 PLCC Dice* Ordering Information continued on last page. * Dice are specified at TA = +25°C, DC parameters only. _________________Pin Configurations TOP VIEW D1/SER OUT 1 40 V+ D0/SER IN 2 Video Security Systems A2 3 Video Editing A1 4 ________Typical Application Circuit 39 OUT0 38 D2 MAX456 IN0 5 WR LATCH INPUT SELECT OR SERIAL I/O 75Ω 75Ω MAX456 OUTPUT SELECT 35 OUT2 IN1 7 MAX470 AV = 2 A2 A1 A0 34 V- LOAD 8 33 OUT3 IN2 9 32 AGND DGND 10 31 OUT4 IN3 11 30 AGND DGND 12 29 OUT5 IN4 13 28 AGND EDGE/LEVEL 14 27 OUT6 IN5 15 8X8 T-SWITCH MATRIX 26 V+ V+ 16 D3 D2 D1/SER OUT D0/SER IN 25 OUT7 IN6 17 24 CE SER/PAR 18 23 CE IN7 19 AV = 2 MAX470 37 OUT1 36 D3 A0 6 8 INPUT CHANNELS PIN-PACKAGE MAX456CPL 22 LATCH V- 20 PLCC on last page 21 WR DIP ________________________________________________________________ Maxim Integrated Products Call toll free 1-800-998-8800 for free samples or literature. 1 MAX456 _______________General Description The MAX456 is the first monolithic CMOS 8 x 8 video crosspoint switch that significantly reduces component count, board space, and cost. The crosspoint switch contains a digitally controlled matrix of 64 T-switches that connect eight video input signals to any, or all, output channels. Each matrix output connects to eight internal, high-speed (250V/µs), unity-gain-stable buffers capable of driving 400Ω and 20pF to ±1.3V. For applications requiring increased drive capability, the MAX456 outputs can be connected directly to two MAX470 quad, gain-of-two video buffers, which are capable of driving 75Ω loads. Three-state output capability and internal, programmable active loads make it feasible to parallel multiple MAX456s and form larger switch matrices. In the 40-pin DIP package, crosstalk (70dB at 5MHz) is minimized, and board area and complexity are simplified by using a straight-through pinout. The analog inputs and outputs are on opposite sides, and each channel is separated by a power-supply line or quiet digital logic line. MAX456 8 x 8 Video Crosspoint Switch ABSOLUTE MAXIMUM RATINGS Total Supply Voltage (V+ to V-) ...........................................+12V Positive Supply Voltage V+ Referred to AGND......-0.3V to +12V Negative Supply Voltage V- Referred to AGND .....-12V to +0.3V DGND Voltage.........................................................AGND ±0.3V Buffer Short Circuit to Ground when Not Exceeding Package Power Dissipation .............Indefinite Analog Input Voltage ............................(V+ + 0.3V) to (V- - 0.3V) Digital Input Voltage .............................(V+ + 0.3V) to (V- - 0.3V) Input Current, Power On or Off Digital Inputs.................................................................±20mA Analog Inputs ...............................................................±50mA Continuous Power Dissipation (TA = +70°C) 40-Pin Plastic DIP (derate 11.3mW/°C above +70°C)....889mW 40-Pin CERDIP (derate 20.0mW/°C above +70°C)....1600mW 44-Pin PLCC (derate 13.3mW/°C above +70°C) .......1066mW Operating Temperature Ranges: MAX456C _ _ ......................................................0°C to +70°C MAX456E _ _ ...................................................-40°C to +85°C Storage Temperature Range .............................-65°C to +160°C Lead Temperature (soldering, 10 sec) ............................+300°C Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. ELECTRICAL CHARACTERISTICS (V+ = 5.0V, V- = -5.0V, -1.3V ≤ V IN ≤ +1.3V; LOAD = +5V; internal load resistors on; AGND = DGND = 0V; T A = +25°C, unless otherwise noted.) PARAMETER Input Voltage Range Voltage Gain Buffer Offset Voltage Offset Voltage Drift CONDITIONS Internal load resistors on, no external load, VIN = 0V to 1V MIN -1.3 TYP MAX 1.3 TA = +25°C 0.99 1.0 1.01 TA = TMIN to TMAX 0.98 1.0 1.02 V/V TA = +25°C ±7 TA = TMIN to TMAX ±12 TA = TMIN to TMAX 20 Operating Supply Voltage Supply Current, All Buffers On (No External Load) Supply Current, All Buffers Off ±4.5 TA = +25°C TA = TMIN to TMAX 1.5 TA = TMIN to TMAX ±4.5V to ±5.5V, DC measurement TA = TMIN to TMAX Internal load resistors off, all buffers off, TA = TMIN to TMAX TA = +25°C 250 TA = TMIN to TMAX 200 Buffer Output Voltage Swing Internal load resistors on, no external load ±1.3 Digital Input Current TA = TMIN to TMAX 50 ±100 nA 600 765 IOH = -0.4mA Ω V µA Ω 2.4 Serial mode, –——– SER/PAR = 5V mA nA 0.8 IOL = 1.6mA mA dB 10 Input Logic High Threshold 2 400 V ±10 ±1 Input Logic Low Threshold SER OUT Output Logic High 64 ±0.1 Output Impedance at DC SER OUT Output Logic Low 3.0 4 Analog Input Current Internal Amplifier Load Resistor (LOAD Pin = 5V) 45 60 TA = +25°C mV µV/°C ±5.5 39 Power-Supply Rejection Ratio Output Leakage Current UNITS V V V 0.4 4 _______________________________________________________________________________________ V 8 x 8 Video Crosspoint Switch (V+ = 5.0V, V- = -5.0V, -1.3V ≤ V IN ≤ +1.3V, LOAD = +5V, internal load resistors on, AGND = DGND = 0V, T A = +25°C, unless otherwise noted.) PARAMETER XDYNAMIC SPECIFICATIONS (Note 1) CONDITIONS Output-Buffer Slew Rate Internal load resistors on, 10pF load Single-Channel Crosstalk 5MHz, VIN = 2VP-P (Note 2) All-Channel Crosstalk MIN TYP MAX UNITS 250 V/µs 70 dB 5MHz, VIN = 2VP-P (Notes 2, 3) 57 dB All-Channel Off Isolation 5MHz, VIN = 2VP-P (Note 2) 80 dB -3dB Bandwidth 10pF load, VIN = 2VP-P (Note 2) 35 MHz Differential Phase Error (Note 4) 1.0 deg Differential Gain Error (Note 4) 0.5 Input Noise DC to 40MHz 0.3 Input Capacitance All buffer inputs grounded 6 pF Buffer Input Capacitance Additional capacitance for each output buffer connected to channel input 2 pF Output Capacitance Output buffer off 7 pF 60 25 % 1.0 mVRMS SWITCHING CHARACTERISTICS (Note 1) (Figure 4, V+ = 5.0V, V- = -5.0V, -1.3V ≤ V IN ≤ +1.3V, LOAD = +5V, internal load resistors on, AGND = DGND = 0V, TA = TMIN to TMAX, unless otherwise noted.) PARAMETER Chip-Enable to Write Setup SYMBOL tCE CONDITIONS MIN 0 TYP MAX UNITS ns Write Pulse Width High tWH 80 ns Write Pulse Width Low tWL 80 ns Data Setup tDS Data Hold Parallel mode 240 32-bit serial mode 160 ns tDH 0 ns Latch Pulse Width tL 80 ns Latch Delay tD 80 Switch Break-Before-Make Delay tON - tOFF LATCH Edge to Switch Off tOFF LATCH Edge to Switch On tON Note 1: Note 2: Note 3: Note 4: LATCH on ns 15 ns 35 ns 50 ns Guaranteed by design. See Dynamic Test Circuits on page 11. 3dB typical crosstalk improvement when RS = 0Ω. Input test signal: 3.58MHz sine wave of amplitude 40IRE superimposed on a linear ramp (0 to 100IRE). IRE is a unit of video-signal amplitude developed by the International Radio Engineers. 140IRE = 1.0V. _______________________________________________________________________________________ 3 MAX456 ELECTRICAL CHARACTERISTICS MAX456 8 x 8 Video Crosspoint Switch ______________________________________________________________Pin Description PIN NAME FUNCTION DIP PLCC — 1, 12, 23, 34 N.C. 1 2 D1/SER OUT 2 3 D0/SER IN 3, 4, 6 4, 5, 7 A2, A1, A0 5, 7, 9, 11, 13, 15, 17, 19 6, 8, 10, 13, 15, 17, 19, 21 IN0–IN7 8 9 LOAD Asynchronous control line. When LOAD = 1, all the 400Ω internal active loads are on. When LOAD = 0, external 400Ω loads must be used. The buffers MUST have a resistive load to maintain stability. 10, 12 11, 14 DGND Digital Ground Pins. Both DGND pins must have the same potential and be bypassed to AGND. DGND should be within ±0.3V of AGND. 14 16 –————– EDGE/LEVEL When this control line is high, the 2nd-rank registers are loaded with the rising edge of the LATCH line. If this control line is low, the 2nd-rank registers are transparant when LATCH is low, passing data directly from the 1st-rank registers to the decoders. 16, 26, 40 18, 29, 44 V+ 18 20 ——– SER/PAR 20, 34 22, 38 V- 21 24 WR 22 25 LATCH 23 26 —– CE 24 27 CE 25, 27, 29, 31, 33, 35, 37, 39 28, 30, 32, 35, 37, 39, 41, 43 OUT7-OUT0 28, 30, 32 31, 33, 36 AGND 36 40 D3 38 42 D2 No connect. Not internally connected. ——– Parallel Data Bit D1 when SER/PAR = 0V. Serial Output for cascading ——– multiple parts when SER/PAR = 5V. ——– Parallel Data Bit D0 when SER/PAR = 0V. A Serial Input when ——– SER/PAR = 5V. Output Buffer Address Lines Video lnput Lines All V+ pins must be tied to each other and bypassed to AGND separately (Figure 2). 5V = 32-Bit Serial, 0V = 7-Bit Parallel Both V- pins must be tied to each other and bypassed to AGND separately (Figure 2). WRITE in the serial mode, shifts data in. In the parallel mode, WR loads data into the 1st-rank registers. Data is latched on the rising edge. –————– If EDGE/LEVEL = 5V, data is loaded from the 1st-rank registers to the 2nd–————– rank registers on the rising edge of LATCH. If EDGE/LEVEL = 0V, data is loaded while LATCH = 0V. In addition, data is loaded during the execution of parallel-mode functions 1011 through 1110, or if LATCH = 5V during the execution of the parallel-mode "software-LATCH" command (1111). –—— —— ————— —– –—– Chip Enable. When CE = 0V and CE = 5V, the WR line is enabled. –—– Chip Enable. When CE = 0V and CE = 5V, the WR line is enabled. Output Buffers 7-0 (Note 1) Analog Ground must be at 0.0V since the gain resistors of the buffers are tied to these 3 pins. –——– Parallel Data Bit D3 when SER/ PAR = 0V. When D3 = 0V, D0-D2 specifies the input channel to be connected to buffer. When D3 = 5V, then D0-D2 –——– specify control codes. D3 is not used when SER/ PAR = 5V. –——– Parallel Data Bit D2 when SER/ PAR = 0V. Not used when –——– SER/ PAR = 5V. Note 1: Buffer inputs are internally grounded with a 1000 or 1001 command from the D3-D0 lines. AGND must be at 0.0V since the gain setting resistors of the buffers are internally tied to AGND. 4 _______________________________________________________________________________________ 8 x 8 Video Crosspoint Switch ___________________Digital Interface Output Buffers The desired switch state can be loaded in a 7-bit parallel-interface mode or 32-bit serial-interface mode (see Table 3 and Figures 4-6). All action associated with the WR line occurs on its rising edge. The same is true for –——— —– the LATCH line if EDGE/LEVEL is high. Otherwise, the second-rank–— registers update while LATCH is low ———– (when EDGE/ –—– LEVEL is low). WR is logically ANDed with CE and C E to allow active-high or active-low chip enable. The MAX456 video crosspoint switch consists of 64 T-switches in an 8 x 8 grid (Figure 1). The 8 matrix outputs are followed by 8 wideband buffers optimized for driving 400Ω and 20pF loads. Each buffer has an internal active load on the output that can be readily shut off via the LOAD input (off when LOAD = 0V). The shut-off is useful when two or more MAX456 circuits are connected in parallel to create more input channels. With more input channels, only one set of buffers can be active and only one set of loads can be driven. And, when active, the buffer must have either 1) an internal load, 2) the internal load of another buffer in another MAX456, or 3) an external load. Each MAX456 output can be disabled under logic control. When a buffer is disabled, its output enters a highimpedance state. In multichip parallel applications, the disable function prevents inactive outputs from loading lines driven by other devices. Disabling the inactive buffers reduces power consumption. The MAX456 outputs connect easily to MAX470 quad, gain-of-two buffers when 75Ω loads must be driven. Power-On RESET The MAX456 has an internal power-on reset (POR) circuit that remains low for 5µs when power is applied. POR also remains low if the total supply voltage is less than 4V. The POR disables all buffer outputs at power-up, but the switch matrix is not preset to any initial condition. The desired switch state should be programmed before the buffer outputs are enabled. 7-Bit Parallel Mode In the parallel-interface mode, the 7 data bits A2-A0 and D3-D0 specify an output channel (A2-A0) and the input channel to which it connects (D3-D0). The data is loaded on the rising edge of WR. The 8 input channels are selected by 0000 through 0111 (D3-D0). The remaining 8 codes (1000-1111) control other MAX456 functions, as listed in Table 1. 32-Bit –——– Serial-Interface Mode In serial mode (SER/PAR = high), all first-rank registers are loaded with data, making it unnecessary to specify an output address (A2, A1, A0). The input data format is D3-D0, starting with OUT0 and ending with OUT7 for 32 total bits. Only codes 0000 through 1010 are valid. Code 1010 disables a buffer, while code 1001 enables it. After data is shifted into the 32-bit first-rank register, it is transferred to the second rank by the LATCH line (see Table 2). _______________________________________________________________________________________ 5 MAX456 _______________Detailed Description MAX456 8 x 8 Video Crosspoint Switch Table 1. Parallel-Interface Mode Functions A2-A0 D3-D0 FUNCTION 0000 to 0111 Selects Output Buffer, OUT0 to OUT7 Connect the buffer selected by A2-A0 to the input channel selected by D3-D0. 1000 Connect the buffer selected by A2-A0 to DGND. Note, if the buffer output is on, its output is its offset voltage. 1011 Shut off the buffer selected by A2-A0, and retain 2nd-rank contents. 1100 Turn on the buffer selected by A2-A0, or restore the previously connected channel. 1101 Turn off all buffers, or leave 2nd-rank registers unchanged. 1110 Turn on all buffers, or restore the previously connected channels. 1111 Send a pulse to the 2nd-rank registers to load them with the contents of the 1st-rank registers. When latch is held high, this "software-LATCH" command performs the same function as pulsing LATCH low. 1001 and 1010 Do not use these codes in the parallel-interface mode. These codes are for the serialinterface mode only. Table 2. Serial-Interface Mode Functions D3-D0 0000 to 0111 6 FUNCTION Connect the selected buffer to the input channel selected by D3-D0. 1000 Connect the input of the selected buffer to GND. Note, if the buffer output remains on, its input is its offset voltage. 1001 Turn on the selected buffer and connect its input to GND. Use this code to turn on buffers after power is applied. The default power-up state is all buffers disabled. 1010 Shut off the selected buffer at the specified channel, and erase data stored in the 2nd rank of registers. The 2nd rank now holds the command word 1010. 1011 to 1111 Do not use these codes in the serial-interface mode. They inhibit the latching of the 2nd-rank registers, which prevents proper data loading. _______________________________________________________________________________________ 8 x 8 Video Crosspoint Switch IN2 IN4 IN3 IN5 IN6 IN7 MAX456 IN1 IN0 OUTPUT BUFFERS A=1 OUT0 400Ω MAX456 8x8 SWITCH MATRIX LOAD A=1 SER/PAR 2nd-RANK REGISTERS LATCH EDGE/LEVEL 1st-RANK REGISTERS WR CE CE V+ A1 A0 A2 D0/SER IN OUT7 D2 400Ω V- AGND DGND D3 D1/SER OUT Figure 1. MAX456 Functional Diagram Table 3. Input/Output Line Configurations SERIAL/ PARALLEL D3 D2 D1 D0 A2-A0 H X X Serial Output Serial Input X L H Parallel Input Parallel Input Parallel Input Output Buffer Address Parallel Mode, D0-D2 = Control Code L L Parallel Input Parallel Input Parallel Input Output Buffer Address Parallel Mode, D0-D2 = Input Address COMMENT 32-Bit Serial Mode Note : X = Don't Care, H = 5V, L = 0V _______________________________________________________________________________________ 7 MAX456 8 x 8 Video Crosspoint Switch ________________Typical Application Figure 2 shows a typical application of the MAX456 with MAX470 quad, gain-of-two buffers at the outputs to drive 75Ω loads. This application shows the MAX456 digital-switch control interface set up in the 7-bit parallel mode. The MAX456 uses 7 data lines and 2 control lines (WR and LATCH). Two additional lines may be needed to control CE and LOAD when using multiple MAX456s. The input/output information is presented to the chip at A2-A0 and D3-D0 by a parallel printer port. The data is stored in the 1st-rank registers on the rising edge of WR. When the LATCH line goes high, the switch configuration is loaded into the 2nd-rank registers, and all 8 outputs enter the new configuration at the same time. Each 7-bit word updates only one output buffer at a time. If several buffers are to be updated, the data is individually loaded into the 1st-rank registers. Then, a single LATCH pulse is used to reconfigure all channels simultaneously. The short Basic program in Figure 3 loads programming data into the MAX456 from any IBM PC or compatible. It uses the computer’s “LPT1” output to interface to the circuit, then automatically finds the address for LPT1 and displays a table of valid input values to be used. The program does not keep track of previous commands, but it does display the last data sent to LPT1, which is written and latched with each transmission. MAX470 5 IN0 8-INPUT VIDEO CHANNELS DB-25 14 18 19 20 21 22 23 24 25 1 2 3 4 5 6 7 8 7 9 11 13 15 17 19 22 21 2 1 38 36 6 4 3 OUT0 39 1 IN0 OUT0 16 37 35 33 31 29 27 25 24 14 8 40 26 3 IN1 6 IN2 8 IN3 AV = 2 OUT1 14 OUT2 11 OUT3 9 IN1 IN2 IN3 IN4 IN5 IN6 IN7 OUT1 OUT2 OUT3 OUT4 MAX456 OUT5 OUT6 OUT7 CE EDGE/LEVEL LOAD LATCH V+ WR V+ D0/SER IN D1/SER OUT D2 D3 A0 A1 A2 AGND DGND VVCE SER/PAR V+ 28, 30, 32 10, 12 20 34 23 18 16 +5V V+ GND 10 75Ω 75Ω V- 2,7,15 4,5,12,13 -5V +5V -5V ALL BYPASS CAPACITORS 0.1µF CERAMIC Figure 2. Typical Application Circuit 8 _______________________________________________________________________________________ 8 x 8 Video Crosspoint Switch MAX456 Figure 3. BASIC Program for Loading Data into the MAX456 from a PC Using Figure 2's Circuit ____________________________________________________________Timing Diagrams A0-A2 VALID DATA N-1 VALID DATA N D0-D3 tDS tDH tWL tWH WR tD tL LATCH Figure 4. Write Timing for Serial- and Parallel-Interface Modes _______________________________________________________________________________________ 9 MAX456 8 x 8 Video Crosspoint Switch _______________________________________________Timing Diagrams (continued) SEE FIGURE 4 FOR WR AND LATCH TIMING DATA (N) DATA (N + 1) DATA (N + 2) WR LATCH FIRST-RANK REGISTER DATA DATA (N) SECOND-RANK REGISTER DATA (EDGE/LEVEL = Low) DATA (N) SECOND-RANK REGISTER DATA (EDGE/LEVEL = High) DATA (N + 1) DATA (N + 2) DATA (N + 1) DATA (N) DATA (N + 1) –——– Figure 5. Parallel-Interface Mode Format (SER/ PAR = Low) SEE TABLE 2 FOR INPUT DATA INPUT DATA FOR OUT1 TO OUT6 INPUT DATA FOR OUT0 SEE FIGURE 4 FOR WR AND LATCH TIMING 0D3 0D2 0D1 0D0 1D3 1D2 INPUT DATA FOR OUT7 7D3 7D2 7D1 7D0 WR LATCH SECOND-RANK REGISTER DATA (EDGE/LEVEL = Low) SECOND-RANK REGISTER DATA (EDGE/LEVEL = High) –——– Figure 6. 32-Bit Serial-Mode Interface Format (SER/PAR = High) 10 ______________________________________________________________________________________ DATA VALID DATA VALID 8 x 8 Video Crosspoint Switch IN0 OUT0 VOUT IN1 OUT1 VOUT IN2 OUT2 VOUT IN3 MAX456 OUT3 IN3 MAX456 OUT3 VOUT IN4 OUT4 IN4 OUT4 VOUT IN5 OUT5 IN5 OUT5 VOUT IN6 OUT6 IN6 OUT6 VOUT IN7 OUT7 IN7 OUT7 VOUT LOAD +5V IN0 OUT0 IN1 OUT1 IN2 OUT2 LOAD VOUT +5V VIN = 2Vp-p @ 5MHz RS = 75Ω VIN = 2Vp-p, SWEEP FREQUENCY RS = 75Ω -3dB Bandwidth (Notes 1-4) 7x 75Ω All-Channel Off Isolation (Notes 1, 5-8) IN0 OUT0 VOUT IN0 OUT0 IN1 OUT1 VOUT IN1 OUT1 IN2 IN2 OUT2 VOUT VOUT IN3 MAX456 OUT3 IN4 OUT4 VOUT IN4 IN5 OUT5 VOUT IN5 OUT5 IN6 OUT6 VOUT IN6 OUT6 IN7 IN7 OUT7 LOAD +5V VIN = 2Vp-p @ 5MHz RS = 75Ω Single-Channel Crosstalk (Notes 1, 5, 9-11) Note 1: Note 2: Note 3: Note 4: Note 5: Note 6: Note 7: Note 8: Note 9: Note 10: Note 11: Note 12: 75Ω OUT2 IN3 MAX456 OUT3 VOUT OUT4 OUT7 LOAD +5V VIN = 2Vp-p @ 5MHz RS = 75Ω All-Channel Crosstalk (Notes 1, 5, 9, 11, 12) Connect LOAD (pin 8) to +5V (internal 400Ω loads on at all outputs). Program any one input to connect to any one output (see Table 1 or 2 for programming codes). Turn on buffer at the selected output (see Table 1 or 2). Drive the selected input with VIN, and measure VOUT at the -3dB frequency at the selected output. Program each numbered input to connect to the same numbered output (IN0 to OUT0, IN1 to OUT1, etc.). See Table 1 or 2 for programming codes. Turn off all output buffers (see Table 1 or 2). Drive all inputs with VIN and measure VOUT at any output. Isolation (in dB) = 20log10 (VOUT/VIN). Turn on all output buffers (see Table 1 or 2). Drive any one input with VIN and measure VOUT at any undriven output. Crosstalk (in dB) = 20log10 (VOUT/VIN). Drive all but one input with VIN and measure VOUT at the undriven output. ______________________________________________________________________________________ 11 MAX456 _______________________________________________________Dynamic Test Circuits 44 43 42 41 40 A0 7 39 OUT2 IN1 8 38 V- LOAD 9 37 OUT3 36 AGND 35 OUT4 N.C. 12 34 N.C. IN3 13 33 AGND DGND 14 32 OUT5 IN4 15 31 AGND EDGE/LEVEL 16 30 OUT6 IN5 17 29 V+ IN2 10 DGND 11 MAX456 OUT7 CE CE LATCH WR N.C. V- IN7 SER/PAR V+ 18 19 20 21 22 23 24 25 26 27 28 ___________________Chip Topography V+ IN6 SER/PAR IN7 VWR LATCH CE CE OUT7 IN0 A1 A2 D0/SER IN D1/SER OUT V+ 0.167" OUT0 (4.242mm) D2 OUT1 D3 V+ PLCC PIN-PACKAGE 40 Plastic DIP 44 PLCC 40 CERDIP AO V+ 1 -40°C to +85°C -40°C to +85°C -40°C to +85°C IN5 EDGE/LEVEL IN4 DGND IN3 DGND IN2 LOAD IN1 N.C. 2 TEMP. RANGE MAX456EPL MAX456EQH MAX456EJL D3 D1/SER OUT 3 OUT1 D0/SER IN 4 D2 A2 5 OUT0 IN0 A1 PART 6 TOP VIEW __Ordering Information (continued) OUT6 AGND OUT5 AGND OUT4 AGND OUT3 VOUT2 ____Pin Configurations (continued) IN6 MAX456 8 x 8 Video Crosspoint Switch 0.184" (4.674mm) TRANSISTOR COUNT: 3820; SUBSTRATE CONNECTED TO V+. Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. 12 __________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 (408) 737-7600 © 1994 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products.